include/configs/vexpress_aemv8a.h

26 #define CONFIG_SYS_TEXT_BASE		0x88000000
27 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
29 #define CONFIG_SYS_TEXT_BASE		0xe0000000
30 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
36 #define V2M_PA_CS0			0x00000000
37 #define V2M_PA_CS1			0x14000000
38 #define V2M_PA_CS2			0x18000000
39 #define V2M_PA_CS3			0x1c000000
40 #define V2M_PA_CS4			0x0c000000
41 #define V2M_PA_CS5			0x10000000
48 #define V2M_BASE			0x80000000
57 #define V2M_UART0			0x7ff80000
58 #define V2M_UART1			0x7ff70000
79 #define V2M_SYS_CFGDATA			(V2M_SYSREGS + 0x0a0)
80 #define V2M_SYS_CFGCTRL			(V2M_SYSREGS + 0x0a4)
81 #define V2M_SYS_CFGSTAT			(V2M_SYSREGS + 0x0a8)
84 #define COUNTER_FREQUENCY		(0x1800000)	/* 24MHz */
88 #define GICD_BASE			(0x2f000000)
89 #define GICR_BASE			(0x2f100000)
94 #define GICD_BASE			(0x2f000000)
95 #define GICC_BASE			(0x2c000000)
97 #define GICD_BASE			(0x2C010000)
98 #define GICC_BASE			(0x2C02f000)
110 #define CONFIG_SMC911X_BASE		(0x018000000)
114 #define CONFIG_SMC91111_BASE		(0x01A000000)
118 #define CONFIG_CONS_INDEX		0
137 #define CONFIG_SYS_LOAD_ADDR		(V2M_BASE + 0x10000000)
142 #define DRAM_SEC_SIZE		0x01000000
143 #define PHYS_SDRAM_1_SIZE	0x80000000 - DRAM_SEC_SIZE
148 #define PHYS_SDRAM_2			(0x880000000)
149 #define PHYS_SDRAM_2_SIZE		0x180000000
165 				"kernel_name=norkern\0"	\
166 				"kernel_alt_name=Image\0"	\
167 				"kernel_addr=0x80080000\0" \
168 				"initrd_name=ramdisk.img\0"	\
169 				"initrd_addr=0x84000000\0"	\
170 				"fdtfile=board.dtb\0" \
171 				"fdt_alt_name=juno\0" \
172 				"fdt_addr=0x83000000\0" \
173 				"fdt_high=0xffffffffffffffff\0" \
174 				"initrd_high=0xffffffffffffffff\0" \
200 				"kernel_name=Image\0"		\
201 				"kernel_addr=0x80080000\0"	\
202 				"initrd_name=ramdisk.img\0"	\
203 				"initrd_addr=0x88000000\0"	\
204 				"fdtfile=devtree.dtb\0"		\
205 				"fdt_addr=0x83000000\0"		\
206 				"fdt_high=0xffffffffffffffff\0"	\
207 				"initrd_high=0xffffffffffffffff\0"
220 				"kernel_addr=0x80080000\0"	\
221 				"initrd_addr=0x84000000\0"	\
222 				"fdt_addr=0x83000000\0"		\
223 				"fdt_high=0xffffffffffffffff\0"	\
224 				"initrd_high=0xffffffffffffffff\0"
238 #define CONFIG_SYS_FLASH_BASE		0x08000000
243 #define CONFIG_ENV_ADDR			0x0BFC0000
244 #define CONFIG_ENV_SECT_SIZE		0x00010000
246 #define CONFIG_SYS_FLASH_BASE		0x0C000000
250 #define CONFIG_ENV_ADDR			0x0FFC0000
251 #define CONFIG_ENV_SECT_SIZE		0x00040000
262 #define FLASH_MAX_SECTOR_SIZE		0x00040000