include/configs/trats.h

22 #define CONFIG_SYS_PL310_BASE	0x10502000
27 #define CONFIG_SYS_SDRAM_BASE		0x40000000
29 #define CONFIG_SYS_TEXT_BASE		0x63300000
34 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5000000)
35 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x4800000)
37 #define CONFIG_SYS_TEXT_BASE		0x63300000
45 #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
52 #define CONFIG_SYS_MONITOR_BASE	0x00000000
83 	"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
86 	"u-boot raw 0x80 0x400;" \
87 	"/uImage ext4 0 2;" \
88 	"/modem.bin ext4 0 2;" \
89 	"/exynos4210-trats.dtb ext4 0 2;" \
90 	""PARTS_CSA" part 0 1;" \
91 	""PARTS_BOOT" part 0 2;" \
92 	""PARTS_QBOOT" part 0 3;" \
93 	""PARTS_CSC" part 0 4;" \
94 	""PARTS_ROOT" part 0 5;" \
95 	""PARTS_DATA" part 0 6;" \
96 	""PARTS_UMS" part 0 7;" \
97 	"params.bin raw 0x38 0x8;" \
98 	"/Image.itb ext4 0 2\0"
104 			"bootm 0x40007FC0 - ${fdtaddr};" \
106 		"bootm 0x40007FC0;\0" \
108 		"mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
109 		"mmc dev 0 0\0" \
111 		"mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
112 	"lpj=lpj=3981312\0" \
118 		"; run bootk\0" \
122 		"initrd=0x43000000,8M ramdisk=8192\0" \
126 		"run bootk\0" \
127 	"bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
128 	"boottrace=setenv opts initcall_debug; run bootcmd\0" \
129 	"mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
130 	"verify=n\0" \
131 	"rootfstype=ext4\0" \
133 	"meminfo=crashkernel=32M@0x50000000\0" \
134 	"nfsroot=/nfsroot/arm\0" \
135 	"bootblock=" CONFIG_BOOTBLOCK "\0" \
136 	"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
138 		"${fdtfile}\0" \
139 	"mmcdev=0\0" \
140 	"mmcbootpart=2\0" \
141 	"mmcrootpart=5\0" \
142 	"opts=always_resume=1\0" \
145 	"spladdr=0x40000100\0" \
146 	"splsize=0x200\0" \
147 	"splfile=falcon.bin\0" \
150 		   "setenv spl_imgsize 0x${spl_imgsize};" \
153 		   "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
156 		   "spl export atags 0x40007FC0;" \
163 		   "setenv spl_addr_tmp;\0" \
165 	"fdtaddr=40800000\0" \
168 #define CONFIG_SYS_SPL_ARGS_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100
190 #define KEY_PWR_STATUS_MASK		(1 << 0)
192 #define KEY_PWR_INTERRUPT_MASK		(1 << 0)
203 #define CONFIG_FB_ADDR		0x52504000