Lines Matching +full:1 +full:kib
20 #define CONFIG_DMA_COHERENT_SIZE (1 << 20)
40 #define CONFIG_ENV_OVERWRITE 1
73 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
74 #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
81 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
92 #define CONFIG_SERIAL1 1
93 #define CONFIG_CONS_INDEX 1
99 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
110 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
148 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
182 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 << 20)
201 # define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */
224 "draco_led 1;" \
230 "if test ${upgrade_available} -eq 1; then " \
287 * Variant 1 partition layout
291 *| spl | 128.000 KiB | 0x 0..0x 1ffff |
292 *| spl.backup1 | 128.000 KiB | 0x 20000..0x 3ffff |
293 *| spl.backup2 | 128.000 KiB | 0x 40000..0x 5ffff |
294 *| spl.backup3 | 128.000 KiB | 0x 60000..0x 7ffff |
296 *| uboot.env | 128.000 KiB | 0x 260000..0x 27ffff |
318 "spl part 0 1;" \
332 "nand_root_fs_type=ubifs rootwait=1\0" \
382 *| spl | 128.000 KiB | 0x 0..0x 1ffff |
383 *| spl.backup1 | 128.000 KiB | 0x 20000..0x 3ffff |
384 *| spl.backup2 | 128.000 KiB | 0x 40000..0x 5ffff |
385 *| spl.backup3 | 128.000 KiB | 0x 60000..0x 7ffff |
387 *| uboot.env0 | 512.000 KiB | 0x 260000..0x 2Dffff |
388 *| uboot.env1 | 512.000 KiB | 0x 2E0000..0x 35ffff |
389 *| mtdoops | 512.000 KiB | 0x 360000..0x 3dffff |
407 "spl part 0 1;" \
420 "nand_root_fs_type=ubifs rootwait=1\0" \
472 *| spl | 128.000 KiB | 0x 0..0x 1ffff |
473 *| spl.backup1 | 128.000 KiB | 0x 20000..0x 3ffff |
474 *| spl.backup2 | 128.000 KiB | 0x 40000..0x 5ffff |
475 *| spl.backup3 | 128.000 KiB | 0x 60000..0x 7ffff |
477 *| uboot.env0 | 512.000 KiB | 0x 260000..0x 2Dffff |
478 *| uboot.env1 | 512.000 KiB | 0x 2E0000..0x 35ffff |
480 *| mtdoops | 512.000 KiB | 0x12f60000..0x12fdffff |
500 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND
504 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */