Lines Matching +full:0 +full:xfe200000

16 	"bootdevice=0:1\0"						\
17 	"usbload=usb reset;usbboot;usb stop;bootm\0"
24 #define CONFIG_SYS_TEXT_BASE		0x8FF80000
25 /* 0x40000000 - 0x47FFFFFF does not use */
26 #define CONFIG_SH_SDRAM_OFFSET		(0x8000000)
27 #define SH7785LCR_SDRAM_PHYS_BASE	(0x40000000 + CONFIG_SH_SDRAM_OFFSET)
28 #define SH7785LCR_SDRAM_BASE		(0x80000000 + CONFIG_SH_SDRAM_OFFSET)
30 #define SH7785LCR_FLASH_BASE_1		(0xa0000000)
32 #define SH7785LCR_USB_BASE		(0xa6000000)
34 #define CONFIG_SYS_TEXT_BASE		0x0FF80000
35 #define SH7785LCR_SDRAM_BASE		(0x08000000)
37 #define SH7785LCR_FLASH_BASE_1		(0xa0000000)
39 #define SH7785LCR_USB_BASE		(0xb4000000)
77 				 (0 * SH7785LCR_FLASH_BANK_SIZE) }
90 #define CONFIG_R8A66597_XTAL		0x0000	/* 12MHz */
91 #define CONFIG_R8A66597_LDRV		0x8000	/* 3.3V */
92 #define CONFIG_R8A66597_ENDIAN		0x0000	/* little */
98 #define CONFIG_SH7780_PCI_LSR	0x1ff00001
99 #define CONFIG_SH7780_PCI_LAR	0x5f000000
100 #define CONFIG_SH7780_PCI_BAR	0x5f000000
102 #define CONFIG_SH7780_PCI_LSR	0x07f00001
108 #define CONFIG_PCI_MEM_BUS	0xFD000000	/* Memory space base addr */
110 #define CONFIG_PCI_MEM_SIZE	0x01000000	/* Size of Memory window */
112 #define CONFIG_PCI_IO_BUS	0xFE200000	/* IO space base address */
114 #define CONFIG_PCI_IO_SIZE	0x00200000	/* Size of IO window */