Lines Matching +full:0 +full:x80010000

30 #define CONFIG_SYS_TEXT_BASE		0xc1080000
35 #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
41 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
44 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
58 #define CONFIG_SYS_DV_CLKMODE 0
60 #define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000
61 #define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001
62 #define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002
63 #define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003
64 #define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002
66 #define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005
69 #define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000
70 #define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001
71 #define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002
81 (0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT))
88 (0x3 << DV_DDR_SDCR_CL_SHIFT) | \
89 (0x2 << DV_DDR_SDCR_IBANK_SHIFT) | \
90 (0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT))
93 #define CONFIG_SYS_DA850_DDR2_SDBCR2 0
103 (0 << DV_DDR_SDTMR1_WTR_SHIFT))
107 (0 << DV_DDR_SDTMR2_XP_SHIFT) | \
108 (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \
111 (0 << DV_DDR_SDTMR2_RTP_SHIFT) | \
112 (0 << DV_DDR_SDTMR2_CKE_SHIFT))
114 #define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000494
115 #define CONFIG_SYS_DA850_DDR2_PBBPR 0x30
145 #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
154 #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
179 "hostname=EV3\0" \
180 "memsize=64M\0" \
181 "filesyssize=10M\0" \
182 "verify=n\0" \
183 "console=ttyS1,115200n8\0" \
184 "bootscraddr=0xC0600000\0" \
185 "loadaddr=0xC0007FC0\0" \
186 "filesysaddr=0xC1180000\0" \
187 "fwupdateboot=mw 0xFFFF1FFC 0x5555AAAA; reset\0" \
188 …s=setenv bootargs mem=${memsize} console=${console} root=/dev/mmcblk0p2 rw rootwait lpj=747520\0" \
189 "mmcboot=bootm ${loadaddr}\0" \
190 …ilesysaddr},${filesyssize} root=/dev/ram0 rw rootfstype=squashfs console=${console} lpj=747520\0" \
191 …"flashboot=sf probe 0; sf read ${loadaddr} 0x50000 0x300000; sf read ${filesysaddr} 0x350000 0x960…
192 "loadimage=fatload mmc 0 ${loadaddr} uImage\0" \
193 "loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \
194 "bootscript=source ${bootscraddr}\0" \
203 #define CONFIG_SYS_SDRAM_BASE 0xc0000000
205 #define CONFIG_SYS_INIT_SP_ADDR 0x80010000