Lines Matching +full:0 +full:x0001ffff

20 #define CONFIG_SPL_TEXT_BASE		0xffff0000
21 #define CONFIG_SPL_MAX_SIZE		0x0000fff0
22 #define CONFIG_SPL_STACK		0x00020000
23 #define CONFIG_SPL_BSS_START_ADDR	0x00020000
24 #define CONFIG_SPL_BSS_MAX_SIZE		0x0001ffff
25 #define CONFIG_SYS_SPL_MALLOC_START	0x00040000
26 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x0001ffff
27 #define CONFIG_SYS_UBOOT_BASE		0xfff90000
28 #define CONFIG_SYS_UBOOT_START		0x00800000
29 #define CONFIG_SYS_TEXT_BASE 		0x00800000
49  *   MPP16 to MPP19, mode 0 for others
52 #define ORION5X_MPP0_7		0x00000003
53 #define ORION5X_MPP8_15		0x55550000
54 #define ORION5X_MPP16_23	0x00005555
59  * - GPIO16 is Power LED control (0 = on, 1 = off)
60  * - GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16)
61  * - GPIO18 is Power Button status (0 = Released, 1 = Pressed)
62  * - GPIO19 is SATA disk power toggle (toggles on 0-to-1)
66  * Last GPIO is 25, further bits are supposed to be 0.
67  * Enable mask has ones for INPUT, 0 for OUTPUT.
71 #define ORION5X_GPIO_OUT_ENABLE		0xfef4f0ca
72 #define ORION5X_GPIO_OUT_VALUE		0x00000000
73 #define ORION5X_GPIO_IN_POLARITY	0x000000d0
102 #define CONFIG_SYS_FLASH_BASE		0xfff80000
126 #define CONFIG_MVGBE_PORTS	{1}		/* enable port 0 only */
128 #define CONFIG_PHY_BASE_ADR	0x8
148 #define CONFIG_SYS_ATA_DATA_OFFSET	(0x0100)
149 #define CONFIG_SYS_ATA_REG_OFFSET	(0x0100)
150 #define CONFIG_SYS_ATA_ALT_OFFSET	(0x0100)
160 /* ATA bus 0 is orion5x port 1 on ED Mini V2 */
180 #define CONFIG_SYS_I2C_SLAVE		0x0
187 #define CONFIG_ENV_SECT_SIZE		0x2000	/* 16K */
188 #define CONFIG_ENV_SIZE			0x2000
189 #define CONFIG_ENV_OFFSET		0x4000	/* env starts here */
202 #define CONFIG_SYS_LOAD_ADDR		0x00800000
203 #define CONFIG_SYS_MEMTEST_START	0x00400000
204 #define CONFIG_SYS_MEMTEST_END		0x007fffff
205 #define CONFIG_SYS_RESET_ADDRESS	0xffff0000
214 #define CONFIG_SYS_SDRAM_BASE		0
216 	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)