Lines Matching +full:0 +full:xe0100000
21 #define CONFIG_SYS_UART_PORT (0)
37 #define STATUS_LED_ACTIVE 0
44 #define CONFIG_ENV_ADDR 0xFF040000
45 #define CONFIG_ENV_SECT_SIZE 0x00020000
67 #define CONFIG_SYS_LOAD_ADDR 0x20000
69 #define CONFIG_SYS_MEMTEST_START 0x100000
70 #define CONFIG_SYS_MEMTEST_END 0x400000
81 #define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */
82 #define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
95 #define CONFIG_SYS_FEC0_PINMUX 0
107 #define CONFIG_SYS_MBAR 0x40000000
113 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
114 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000
122 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
124 #define CONFIG_SYS_SDRAM_BASE0 0x00000000
130 #define CONFIG_SYS_MONITOR_LEN 0x20000
147 #define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
148 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21
183 #define CONFIG_SYS_CS0_BASE 0xFF000000
184 #define CONFIG_SYS_CS0_CTRL 0x00001980
185 #define CONFIG_SYS_CS0_MASK 0x00FF0001
187 #define CONFIG_SYS_CS2_BASE 0xE0000000
188 #define CONFIG_SYS_CS2_CTRL 0x00001980
189 #define CONFIG_SYS_CS2_MASK 0x000F0001
191 #define CONFIG_SYS_CS3_BASE 0xE0100000
192 #define CONFIG_SYS_CS3_CTRL 0x00001980
193 #define CONFIG_SYS_CS3_MASK 0x000F0001
198 #define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */
199 #define CONFIG_SYS_PADDR 0x0000000
200 #define CONFIG_SYS_PADAT 0x0000000
202 #define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */
203 #define CONFIG_SYS_PBDDR 0x0000000
204 #define CONFIG_SYS_PBDAT 0x0000000
206 #define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */
207 #define CONFIG_SYS_PCDDR 0x0000000
208 #define CONFIG_SYS_PCDAT 0x0000000
210 #define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */
211 #define CONFIG_SYS_PCDDR 0x0000000
212 #define CONFIG_SYS_PCDAT 0x0000000
214 #define CONFIG_SYS_PASPAR 0x0F0F
215 #define CONFIG_SYS_PEHLPAR 0xC0
216 #define CONFIG_SYS_PUAPAR 0x0F
217 #define CONFIG_SYS_DDRUA 0x05
218 #define CONFIG_SYS_PJPAR 0xFF
227 #define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
231 #define CONFIG_SYS_FSL_I2C_SLAVE 0
235 #define CONFIG_I2C_RTC_ADDR 0x68
251 #define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 0x0001
255 #define CONFIG_SYS_VCXK_ENABLE_PIN 0x0002
259 #define CONFIG_SYS_VCXK_REQUEST_PIN 0x0004