include/configs/calimain.h

32 #define CONFIG_SYS_TEXT_BASE		0x60000000
40 #define CONFIG_SYS_WDT_PERIOD_HIGH	0x0
41 #define CONFIG_SYS_DV_NOR_BOOT_CFG	(0x11)
46 #define CONFIG_SYS_DV_CLKMODE          0
48 #define CONFIG_SYS_DA850_PLL0_PLLDIV1  0x8000
49 #define CONFIG_SYS_DA850_PLL0_PLLDIV2  0x8001
50 #define CONFIG_SYS_DA850_PLL0_PLLDIV3  0x8002
51 #define CONFIG_SYS_DA850_PLL0_PLLDIV4  0x8003
52 #define CONFIG_SYS_DA850_PLL0_PLLDIV5  0x8002
54 #define CONFIG_SYS_DA850_PLL0_PLLDIV7  0x8005
57 #define CONFIG_SYS_DA850_PLL1_PLLDIV1  0x8000
58 #define CONFIG_SYS_DA850_PLL1_PLLDIV2  0x8001
59 #define CONFIG_SYS_DA850_PLL1_PLLDIV3  0x8002
71 					(0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT))
79 	(0x3 << DV_DDR_SDCR_CL_SHIFT) |		\
80 	(0x3 << DV_DDR_SDCR_IBANK_SHIFT) |	\
81 	(0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT))
84 #define CONFIG_SYS_DA850_DDR2_SDBCR2	0
99 	(0 << DV_DDR_SDTMR2_ODT_SHIFT) |	\
102 	(0 << DV_DDR_SDTMR2_RTP_SHIFT) |	\
105 #define CONFIG_SYS_DA850_DDR2_SDRCR	0x000003FF
106 #define CONFIG_SYS_DA850_DDR2_PBBPR	0x30
118 	DAVINCI_ABCR_RHOLD(0) |		\
128 #define CONFIG_SYS_MALLOC_LEN	(0x10000 + 1*1024*1024) /* malloc() len */
141 #define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + 0x2000000)
191 #define CONFIG_SYS_LOAD_ADDR   (PHYS_SDRAM_1 + 0x700000)
192 #define CONFIG_LOADADDR        0xc0700000
201 #define LINUX_BOOT_PARAM_ADDR     (PHYS_SDRAM_1 + 0x100)
215 	"tftpdir=calimero\0"						\
217 		"erase 0x60800000 +0x400000; "				\
218 		"cp.b $loadaddr 0x60800000 $filesize\0"			\
221 		"erase 0x60c00000 +0x2e00000; "				\
222 		"cp.b $loadaddr 0x60c00000 $filesize\0"			\
225 		"erase 0x60000000 +0x80000; "				\
226 		"cp.b $loadaddr 0x60000000 $filesize\0"			\
228 		"erase 0x60080000 +0x780000; "				\
229 		"cp.b $loadaddr 0x60080000 $filesize\0"			\
230 	"erase_persistent=erase 0x63a00000 +0x600000;\0"		\
234 		"gpio c 1; gpio s 2; bootm 0x60800000\0"		\
237 		"ethaddr=$ethaddr; bootm 0x60080000\0"			\
242 		"gpio c 1; gpio s 2; bootm $loadaddr\0"			\
248 		"sleep 1; run flashall; fi\0"				\
249 	"product=accessory\0"						\
250 	"serial=XX12345\0"						\
252 		"if gpio i 0; then run bootnor; fi;\0"			\
254 		"if gpio i 0; then run bootrlk; fi;\0"			\
273 		"run bootnor;\0"					\
280 		"run bootnor;\0"					\
281 	"verify=n\0"							\
283 		"erase 0x60040000 +0x40000;\0"				\
284 	"bootlimit=3\0"							\
285 	"altbootcmd=run bootrlk\0"
295 #define CONFIG_SYS_SDRAM_BASE		0xc0000000
297 #define CONFIG_SYS_INIT_SP_ADDR		(0x8001ff00)