Lines Matching +full:0 +full:x10014000
31 #define CONFIG_SPL_TEXT_BASE 0xA0000000
35 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
37 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
61 #define PHYS_SDRAM_1 0xA0000000
62 #define PHYS_SDRAM_2 0xB0000000
65 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
66 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
69 + PHYS_SDRAM_1_SIZE - 0x0100000)
71 #define CONFIG_SYS_TEXT_BASE 0xA0000800
76 #define ACFG_MONITOR_OFFSET 0x00000000
77 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
79 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
80 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
81 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
85 #define CONFIG_FIRMWARE_OFFSET 0x00200000
86 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
87 #define CONFIG_KERNEL_OFFSET 0x00300000
88 #define CONFIG_ROOTFS_OFFSET 0x00800000
90 #define CONFIG_MTDMAP "mxc_nand.0"
128 #define CONFIG_LOADADDR 0xA0000000
135 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
136 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
137 "mtdparts=" MTDPARTS_DEFAULT "\0" \
138 "partition=nand0,6\0" \
139 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
140 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
141 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
142 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
143 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
144 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
145 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
146 "kernel_addr_r=A0000000\0" \
155 "fi; \0" \
156 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
158 "echo Flash environment variables erased!\0" \
160 "-u-boot-with-spl.bin\0" \
167 "fi; \0" \
168 "update_uboot=run download_uboot flash_uboot\0" \
170 "-u-boot-env.txt\0" \
171 "flash_env=env import -t ${loadaddr}; env save; \0" \
172 "update_env=run download_env flash_env\0" \
173 "update_all=run update_env update_uboot\0" \
174 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
196 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
221 #define CONFIG_FEC_MXC_PHYADDR 0x1f
242 #define IIM_MAC_BANK 0
258 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
260 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
264 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
275 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000
283 #define CONFIG_SYS_RTC_BUS_NUM 0
289 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
296 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
297 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
302 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
303 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
308 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
309 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */