Lines Matching +full:0 +full:x20000

17 #define CONFIG_SYS_UART_PORT		0
23 		"protect off 0xffc00000 0xffc1ffff; "		\
24 		"erase 0xffc00000 0xffc1ffff; "			\
25 		"cp.b 0x20000 0xffc00000 ${filesize}\0"		\
27 		"erase 0xffc20000 0xffefffff; "			\
28 		"cp.b 0x20000 0xffc20000 ${filesize}\0"		\
30 		"erase 0xfff00000 0xffffffff; "			\
31 		"cp.b 0x20000 0xfff00000 ${filesize}\0"
39 #define CONFIG_SYS_LOAD_ADDR		0x20000	/* default load address */
41 #define CONFIG_SYS_MEMTEST_START	0x0
42 #define CONFIG_SYS_MEMTEST_END		0x1000000
49 #define CONFIG_SYS_MBAR			0x10000000
51 #define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
53 #define CONFIG_SYS_INIT_RAM_SIZE	0x1000
58 #define CONFIG_SYS_SDRAM_BASE		0x00000000
59 #define CONFIG_SYS_SDRAM_SIZE		0x1000000
60 #define CONFIG_SYS_FLASH_BASE		0xffc00000
71 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
78 #define CONFIG_ENV_SIZE			0x1000
79 #define CONFIG_ENV_SECT_SIZE		0x1000
107 /* CS0 - AMD Flash, address 0xffc00000 */
109 /* 4MB, AA=0,V=1  C/I BIT for errata */
110 #define	CONFIG_SYS_CS0_MASK		0x003f0001
112 #define	CONFIG_SYS_CS0_CTRL		0x1980
113 /* CS1 - DM9000 Ethernet Controller, address 0x30000000 */
114 #define CONFIG_SYS_CS1_BASE		0x3000
115 #define CONFIG_SYS_CS1_MASK		0x00070001
116 #define CONFIG_SYS_CS1_CTRL		0x0100