Lines Matching +full:0 +full:x80010000

23 #define CONFIG_SYS_UART_PORT		(0)
41 #	define CONFIG_SYS_FEC0_PINMUX	0
43 #	define CONFIG_SYS_FEC1_PINMUX	0
60 #define CONFIG_SYS_RTC_CNT		(0x8000)
71 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
72 #define CONFIG_SYS_FSL_I2C_OFFSET	0x58000
86 	"netdev=eth0\0"				\
87 	"loadaddr=40010000\0"			\
88 	"u-boot=u-boot.bin\0"			\
89 	"load=tftp ${loadaddr) ${u-boot}\0"	\
90 	"upd=run load; run prog\0"		\
91 	"prog=prot off 0 3ffff;"		\
92 	"era 0 3ffff;"				\
93 	"cp.b ${loadaddr} 0 ${filesize};"	\
94 	"save\0"				\
100 #define CONFIG_SYS_LOAD_ADDR	0x40010000
105 #define CONFIG_SYS_MBAR		0xFC000000
115 #define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
116 #define CONFIG_SYS_INIT_RAM_SIZE		0x20000	/* Size of used area in internal SRAM */
117 #define CONFIG_SYS_INIT_RAM_CTRL	0x221
118 #define CONFIG_SYS_GBL_DATA_OFFSET	((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
124  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
126 #define CONFIG_SYS_SDRAM_BASE		0x40000000
128 #define CONFIG_SYS_SDRAM_CFG1		0x43711630
129 #define CONFIG_SYS_SDRAM_CFG2		0x56670000
130 #define CONFIG_SYS_SDRAM_CTRL		0xE1092000
131 #define CONFIG_SYS_SDRAM_EMOD		0x80010000
132 #define CONFIG_SYS_SDRAM_MODE		0x00CD0000
134 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
137 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
159 #	define CONFIG_SYS_FLASH_SIZE		0x1000000	/* Max size that the board might have */
171 #define CONFIG_ENV_OFFSET		(CONFIG_SYS_FLASH_BASE + 0x40000)
172 #define CONFIG_ENV_SIZE			0x1000
173 #define CONFIG_ENV_SECT_SIZE		0x8000
206 #define CONFIG_SYS_CS0_BASE		0
207 #define CONFIG_SYS_CS0_MASK		0x00FF0001
208 #define CONFIG_SYS_CS0_CTRL		0x00001FA0
210 #define CONFIG_SYS_CS1_BASE		0xC0000000
211 #define CONFIG_SYS_CS1_MASK		0x00070001
212 #define CONFIG_SYS_CS1_CTRL		0x00001FA0