Lines Matching +full:0 +full:x80010000

18 #define CONFIG_SYS_UART_PORT		(0)
32 #	define CONFIG_SYS_FEC0_PINMUX	0
54 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
55 #define CONFIG_SYS_FSL_I2C_OFFSET	0x58000
69 	"netdev=eth0\0"				\
70 	"loadaddr=40010000\0"			\
71 	"u-boot=u-boot.bin\0"			\
72 	"load=tftp ${loadaddr) ${u-boot}\0"	\
73 	"upd=run load; run prog\0"		\
74 	"prog=prot off 0 3ffff;"		\
75 	"era 0 3ffff;"				\
76 	"cp.b ${loadaddr} 0 ${filesize};"	\
77 	"save\0"				\
83 #define CONFIG_SYS_LOAD_ADDR	0x40010000
86 #define CONFIG_SYS_PLL_ODR	0x36
87 #define CONFIG_SYS_PLL_FDR	0x7D
89 #define CONFIG_SYS_MBAR		0xFC000000
97 #define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
98 #define CONFIG_SYS_INIT_RAM_SIZE		0x4000	/* Size of used area in internal SRAM */
99 #define CONFIG_SYS_INIT_RAM_CTRL	0x221
100 #define CONFIG_SYS_GBL_DATA_OFFSET	((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
106  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
108 #define CONFIG_SYS_SDRAM_BASE		0x40000000
110 #define CONFIG_SYS_SDRAM_CFG1		0x43711630
111 #define CONFIG_SYS_SDRAM_CFG2		0x56670000
112 #define CONFIG_SYS_SDRAM_CTRL		0xE1002000
113 #define CONFIG_SYS_SDRAM_EMOD		0x80010000
114 #define CONFIG_SYS_SDRAM_MODE		0x00CD0000
116 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
119 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
137 #	define CONFIG_SYS_FLASH_SIZE		0x800000	/* Max size that the board might have */
150 #define CONFIG_ENV_OFFSET		0x2000
151 #define CONFIG_ENV_SIZE			0x1000
152 #define CONFIG_ENV_SECT_SIZE		0x2000
183 #define CONFIG_SYS_CS0_BASE		0
184 #define CONFIG_SYS_CS0_MASK		0x007F0001
185 #define CONFIG_SYS_CS0_CTRL		0x00001FA0