Lines Matching refs:link_cfg

144 				 const struct tegra_dp_link_config *link_cfg)  in tegra_dc_sor_set_dp_linkctl()  argument
157 reg_val |= (link_cfg->tu_size << DP_LINKCTL_TUSIZE_SHIFT); in tegra_dc_sor_set_dp_linkctl()
159 if (link_cfg->enhanced_framing) in tegra_dc_sor_set_dp_linkctl()
170 reg_val = (link_cfg->link_bw == SOR_LINK_SPEED_G5_4) ? in tegra_dc_sor_set_dp_linkctl()
277 const struct tegra_dp_link_config *link_cfg) in tegra_dc_sor_set_dp_mode() argument
282 tegra_dc_sor_set_link_bandwidth(dev, link_cfg->link_bw); in tegra_dc_sor_set_dp_mode()
284 tegra_dc_sor_set_dp_linkctl(dev, 1, training_pattern_none, link_cfg); in tegra_dc_sor_set_dp_mode()
287 reg_val |= link_cfg->watermark; in tegra_dc_sor_set_dp_mode()
289 reg_val |= (link_cfg->active_count << in tegra_dc_sor_set_dp_mode()
292 reg_val |= (link_cfg->active_frac << in tegra_dc_sor_set_dp_mode()
294 if (link_cfg->activepolarity) in tegra_dc_sor_set_dp_mode()
306 link_cfg->hblank_sym); in tegra_dc_sor_set_dp_mode()
310 link_cfg->vblank_sym); in tegra_dc_sor_set_dp_mode()
612 const struct tegra_dp_link_config *link_cfg, in tegra_dc_sor_config_panel() argument
629 reg_val |= (link_cfg->bits_per_pixel > 18) ? in tegra_dc_sor_config_panel()
693 const struct tegra_dp_link_config *link_cfg) in tegra_dc_sor_enable_dp() argument
749 tegra_dc_sor_power_dplanes(dev, link_cfg->lane_count, 1); in tegra_dc_sor_enable_dp()
751 tegra_dc_sor_set_dp_mode(dev, link_cfg); in tegra_dc_sor_enable_dp()
758 const struct tegra_dp_link_config *link_cfg, in tegra_dc_sor_attach() argument
770 tegra_dc_sor_config_panel(sor, 0, link_cfg, timing); in tegra_dc_sor_attach()
833 const struct tegra_dp_link_config *link_cfg) in tegra_dc_sor_set_lane_parm() argument
838 link_cfg->drive_current); in tegra_dc_sor_set_lane_parm()
840 link_cfg->preemphasis); in tegra_dc_sor_set_lane_parm()
842 link_cfg->postcursor); in tegra_dc_sor_set_lane_parm()
845 tegra_dc_sor_set_link_bandwidth(dev, link_cfg->link_bw); in tegra_dc_sor_set_lane_parm()
846 tegra_dc_sor_set_lane_count(dev, link_cfg->lane_count); in tegra_dc_sor_set_lane_parm()
862 const struct tegra_dp_link_config *link_cfg) in tegra_dc_sor_set_voltage_swing() argument
869 switch (link_cfg->link_bw) { in tegra_dc_sor_set_voltage_swing()
878 debug("Invalid sor link bandwidth: %d\n", link_cfg->link_bw); in tegra_dc_sor_set_voltage_swing()
889 const struct tegra_dp_link_config *link_cfg) in tegra_dc_sor_power_down_unused_lanes() argument
895 switch (link_cfg->lane_count) { in tegra_dc_sor_power_down_unused_lanes()
915 printf("Invalid sor lane count: %u\n", link_cfg->lane_count); in tegra_dc_sor_power_down_unused_lanes()