Lines Matching refs:tegra_dpaux_writel
49 static inline void tegra_dpaux_writel(struct tegra_dp_priv *dp, u32 reg, in tegra_dpaux_writel() function
117 tegra_dpaux_writel(dp, DPAUX_DP_AUXADDR, addr); in tegra_dc_dpaux_write_chunk()
120 tegra_dpaux_writel(dp, DPAUX_DP_AUXDATA_WRITE_W(i), temp_data); in tegra_dc_dpaux_write_chunk()
136 tegra_dpaux_writel(dp, DPAUX_DP_AUXCTL, reg_val); in tegra_dc_dpaux_write_chunk()
151 tegra_dpaux_writel(dp, DPAUX_DP_AUXSTAT, in tegra_dc_dpaux_write_chunk()
167 tegra_dpaux_writel(dp, DPAUX_DP_AUXSTAT, in tegra_dc_dpaux_write_chunk()
221 tegra_dpaux_writel(dp, DPAUX_DP_AUXADDR, addr); in tegra_dc_dpaux_read_chunk()
234 tegra_dpaux_writel(dp, DPAUX_DP_AUXCTL, reg_val); in tegra_dc_dpaux_read_chunk()
249 tegra_dpaux_writel(dp, DPAUX_DP_AUXSTAT, in tegra_dc_dpaux_read_chunk()
265 tegra_dpaux_writel(dp, DPAUX_DP_AUXSTAT, in tegra_dc_dpaux_read_chunk()
400 tegra_dpaux_writel(dp, DPAUX_INTR_AUX, 0xffffffff); in tegra_dc_dpaux_enable()
402 tegra_dpaux_writel(dp, DPAUX_INTR_EN_AUX, 0x0); in tegra_dc_dpaux_enable()
404 tegra_dpaux_writel(dp, DPAUX_HYBRID_PADCTL, in tegra_dc_dpaux_enable()
410 tegra_dpaux_writel(dp, DPAUX_HYBRID_SPARE, in tegra_dc_dpaux_enable()