31 	int pclk = timing->pixelclock.typ;  in tegra_dc_calc_refresh()
33 	h_total = timing->hactive.typ + timing->hfront_porch.typ +  in tegra_dc_calc_refresh()
34 			timing->hback_porch.typ + timing->hsync_len.typ;  in tegra_dc_calc_refresh()
35 	v_total = timing->vactive.typ + timing->vfront_porch.typ +  in tegra_dc_calc_refresh()
36 			timing->vback_porch.typ + timing->vsync_len.typ;  in tegra_dc_calc_refresh()
51 	      timing->hactive.typ, timing->vactive.typ, refresh / 1000,  in print_mode()
52 	      refresh % 1000, timing->pixelclock.typ);  in print_mode()
66 	writel(timing->vsync_len.typ << 16 | timing->hsync_len.typ,  in update_display_mode()
69 	writel(((timing->vback_porch.typ - vref_to_sync) << 16) |  in update_display_mode()
70 		timing->hback_porch.typ, &disp_ctrl->disp.back_porch);  in update_display_mode()
72 	writel(((timing->vfront_porch.typ + vref_to_sync) << 16) |  in update_display_mode()
73 		timing->hfront_porch.typ, &disp_ctrl->disp.front_porch);  in update_display_mode()
75 	writel(timing->hactive.typ | (timing->vactive.typ << 16),  in update_display_mode()
95 	      timing->pixelclock.typ, shift_clock_div);  in update_display_mode()
135 	.hsync_len = { .typ = 1 },
136 	.vsync_len = { .typ = 1 },
137 	.hback_porch = { .typ = 20 },
138 	.vback_porch = { .typ = 0 },
139 	.hactive = { .typ = 16 },
140 	.vactive = { .typ = 16 },
141 	.hfront_porch = { .typ = 1 },
142 	.vfront_porch = { .typ = 2 },
170 	writel(min_mode.hsync_len.typ | (min_mode.vsync_len.typ << 16),  in tegra_dc_sor_disable_win_short_raster()
174 	writel(min_mode.hback_porch.typ | (min_mode.vback_porch.typ << 16),  in tegra_dc_sor_disable_win_short_raster()
178 	writel(min_mode.hfront_porch.typ | (min_mode.vfront_porch.typ << 16),  in tegra_dc_sor_disable_win_short_raster()
182 	writel(min_mode.hactive.typ | (min_mode.vactive.typ << 16),  in tegra_dc_sor_disable_win_short_raster()
236 	writel(((timing->vactive.typ << 16) | timing->hactive.typ),  in update_window()
238 	writel(((timing->vactive.typ << 16) |  in update_window()
239 		(timing->hactive.typ * fb_bits_per_pixel / 8)),  in update_window()
241 	writel(((timing->hactive.typ * fb_bits_per_pixel / 8 + 31) /  in update_window()
309 	printf("timing->hactive.typ = %d\n", timing->hactive.typ);  in dump_config()
310 	printf("timing->vactive.typ = %d\n", timing->vactive.typ);  in dump_config()
311 	printf("timing->pixelclock.typ = %d\n", timing->pixelclock.typ);  in dump_config()
313 	printf("timing->hfront_porch.typ = %d\n", timing->hfront_porch.typ);  in dump_config()
314 	printf("timing->hsync_len.typ = %d\n", timing->hsync_len.typ);  in dump_config()
315 	printf("timing->hback_porch.typ = %d\n", timing->hback_porch.typ);  in dump_config()
317 	printf("timing->vfront_porch.typ  %d\n", timing->vfront_porch.typ);  in dump_config()
318 	printf("timing->vsync_len.typ = %d\n", timing->vsync_len.typ);  in dump_config()
319 	printf("timing->vback_porch.typ = %d\n", timing->vback_porch.typ);  in dump_config()
381 	plld_rate = clock_set_display_rate(timing->pixelclock.typ * 2);  in display_init()
385 	} else if (plld_rate != timing->pixelclock.typ * 2) {  in display_init()
387 		timing->pixelclock.typ = plld_rate / 2;  in display_init()
455 	uc_priv->xsize = roundup(timing.hactive.typ, 16);  in tegra124_lcd_init()
456 	uc_priv->ysize = timing.vactive.typ;  in tegra124_lcd_init()