Lines Matching +full:spi +full:- +full:3 +full:wire
4 * SPDX-License-Identifier: GPL-2.0+
91 #define SSD2828_CFGR_VEN (1 << 3)
108 #define SSD2828_VIDEO_PIXEL_FORMAT_24BPP 3
110 #define SSD2828_LP_CLOCK_DIVIDER(n) (((n) - 1) & 0x3F)
113 * SPI transfer, using the "24-bit 3 wire" mode (that's how it is called in
114 * the SSD2828 documentation). The 'dout' input parameter specifies 24-bits
115 * of data to be written to SSD2828. Returns the lowest 16-bits of data,
123 * According to the "24 Bit 3 Wire SPI Interface Timing Characteristics" in soft_spi_xfer_24bit_3wire()
125 * the lowest possible 'tx_clk' clock frequency is 8MHz, and SPI runs in soft_spi_xfer_24bit_3wire()
134 gpio_set_value(drv->csx_pin, 0); in soft_spi_xfer_24bit_3wire()
136 for (j = bitlen - 1; j >= 0; j--) { in soft_spi_xfer_24bit_3wire()
137 gpio_set_value(drv->sck_pin, 0); in soft_spi_xfer_24bit_3wire()
138 gpio_set_value(drv->sdi_pin, (dout & (1 << j)) != 0); in soft_spi_xfer_24bit_3wire()
140 if (drv->sdo_pin != -1) in soft_spi_xfer_24bit_3wire()
141 tmpdin = (tmpdin << 1) | gpio_get_value(drv->sdo_pin); in soft_spi_xfer_24bit_3wire()
142 gpio_set_value(drv->sck_pin, 1); in soft_spi_xfer_24bit_3wire()
146 gpio_set_value(drv->csx_pin, 1); in soft_spi_xfer_24bit_3wire()
187 gpio_set_value(cfg->reset_pin, 0); in ssd2828_reset()
189 gpio_set_value(cfg->reset_pin, 1); in ssd2828_reset()
195 if (gpio_request(cfg->csx_pin, "ssd2828_csx")) { in ssd2828_enable_gpio()
199 if (gpio_request(cfg->sck_pin, "ssd2828_sck")) { in ssd2828_enable_gpio()
200 gpio_free(cfg->csx_pin); in ssd2828_enable_gpio()
204 if (gpio_request(cfg->sdi_pin, "ssd2828_sdi")) { in ssd2828_enable_gpio()
205 gpio_free(cfg->csx_pin); in ssd2828_enable_gpio()
206 gpio_free(cfg->sck_pin); in ssd2828_enable_gpio()
210 if (gpio_request(cfg->reset_pin, "ssd2828_reset")) { in ssd2828_enable_gpio()
211 gpio_free(cfg->csx_pin); in ssd2828_enable_gpio()
212 gpio_free(cfg->sck_pin); in ssd2828_enable_gpio()
213 gpio_free(cfg->sdi_pin); in ssd2828_enable_gpio()
217 if (cfg->sdo_pin != -1 && gpio_request(cfg->sdo_pin, "ssd2828_sdo")) { in ssd2828_enable_gpio()
218 gpio_free(cfg->csx_pin); in ssd2828_enable_gpio()
219 gpio_free(cfg->sck_pin); in ssd2828_enable_gpio()
220 gpio_free(cfg->sdi_pin); in ssd2828_enable_gpio()
221 gpio_free(cfg->reset_pin); in ssd2828_enable_gpio()
225 gpio_direction_output(cfg->reset_pin, 0); in ssd2828_enable_gpio()
226 gpio_direction_output(cfg->csx_pin, 1); in ssd2828_enable_gpio()
227 gpio_direction_output(cfg->sck_pin, 1); in ssd2828_enable_gpio()
228 gpio_direction_output(cfg->sdi_pin, 1); in ssd2828_enable_gpio()
229 if (cfg->sdo_pin != -1) in ssd2828_enable_gpio()
230 gpio_direction_input(cfg->sdo_pin); in ssd2828_enable_gpio()
237 gpio_free(cfg->csx_pin); in ssd2828_free_gpio()
238 gpio_free(cfg->sck_pin); in ssd2828_free_gpio()
239 gpio_free(cfg->sdi_pin); in ssd2828_free_gpio()
240 gpio_free(cfg->reset_pin); in ssd2828_free_gpio()
241 if (cfg->sdo_pin != -1) in ssd2828_free_gpio()
242 gpio_free(cfg->sdo_pin); in ssd2828_free_gpio()
269 fr = 3; in construct_pll_config()
295 write_hw_register(cfg, SSD2828_VICR1, (mode->vsync_len << 8) | in ssd2828_configure_video_interface()
296 (mode->hsync_len)); in ssd2828_configure_video_interface()
299 u32 vbp = mode->vsync_len + mode->upper_margin; in ssd2828_configure_video_interface()
300 u32 hbp = mode->hsync_len + mode->left_margin; in ssd2828_configure_video_interface()
303 /* RGB Interface Control Register 3 */ in ssd2828_configure_video_interface()
304 write_hw_register(cfg, SSD2828_VICR3, (mode->lower_margin << 8) | in ssd2828_configure_video_interface()
305 (mode->right_margin)); in ssd2828_configure_video_interface()
308 write_hw_register(cfg, SSD2828_VICR4, mode->xres); in ssd2828_configure_video_interface()
311 write_hw_register(cfg, SSD2828_VICR5, mode->yres); in ssd2828_configure_video_interface()
315 switch (cfg->ssd2828_color_depth) { in ssd2828_configure_video_interface()
320 val |= cfg->mipi_dsi_loosely_packed_pixel_format ? in ssd2828_configure_video_interface()
335 cfg->mipi_dsi_number_of_data_lanes - 1); in ssd2828_configure_video_interface()
348 * Because we are not always able to read back from SPI, have in ssd2828_init()
363 * If there is a pin to read data back from SPI, then we are lucky. Try in ssd2828_init()
364 * to check if SPI is configured correctly and SSD2828 is actually able in ssd2828_init()
367 if (cfg->sdo_pin != -1) { in ssd2828_init()
370 printf("SSD2828: SPI communication failed.\n"); in ssd2828_init()
383 reference_freq_khz = cfg->ssd2828_tx_clk_khz; in ssd2828_init()
385 reference_freq_khz = mode->pixclock_khz; in ssd2828_init()
406 cfg->mipi_dsi_bitrate_per_data_lane_mbps * 1000, in ssd2828_init()
426 mdelay(cfg->mipi_dsi_delay_after_exit_sleep_mode_ms); in ssd2828_init()
429 mdelay(cfg->mipi_dsi_delay_after_set_display_on_ms); in ssd2828_init()