Lines Matching full:ddr_clk
207 u64 ddr_clk = priv->phy_clk; in rk_mipi_phy_enable() local
234 test_data[0] = 0x80 | (ddr_clk / (200 * MHz)) << 3 | 0x3; in rk_mipi_phy_enable()
245 if (ddr_clk / (MHz) >= freq_rang[i][0]) in rk_mipi_phy_enable()
259 * it's equal to ddr_clk= pixclk * 6. 40MHz >= refclk / prediv >= 5MHz in rk_mipi_phy_enable()
275 if ((ddr_clk * i % refclk < remain) && in rk_mipi_phy_enable()
276 (ddr_clk * i / refclk) < max_fbdiv) { in rk_mipi_phy_enable()
278 remain = ddr_clk * i % refclk; in rk_mipi_phy_enable()
281 fbdiv = ddr_clk * prediv / refclk; in rk_mipi_phy_enable()
282 ddr_clk = refclk * fbdiv / prediv; in rk_mipi_phy_enable()
283 priv->phy_clk = ddr_clk; in rk_mipi_phy_enable()
286 __func__, refclk, prediv, fbdiv, ddr_clk); in rk_mipi_phy_enable()