Lines Matching +full:panel +full:- +full:timing

3  * Author: Eric Gao <eric.gao@rock-chips.com>
5 * SPDX-License-Identifier: GPL-2.0+
13 #include <panel.h>
20 #include <dm/uclass-internal.h>
33 struct rk3399_grf_regs *grf = priv->grf; in rk_mipi_dsi_source_select()
37 switch (disp_uc_plat->source_id) { in rk_mipi_dsi_source_select()
39 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
43 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
48 return -EINVAL; in rk_mipi_dsi_source_select()
58 struct rk3399_grf_regs *grf = priv->grf; in rk_mipi_dphy_mode_set()
63 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
67 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val); in rk_mipi_dphy_mode_set()
71 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val); in rk_mipi_dphy_mode_set()
80 const struct display_timing *timing) in rk_display_enable() argument
86 priv->ref_clk = 24 * MHz; in rk_display_enable()
87 priv->sys_clk = priv->ref_clk; in rk_display_enable()
88 priv->pix_clk = timing->pixelclock.typ; in rk_display_enable()
89 priv->phy_clk = priv->pix_clk * 6; in rk_display_enable()
90 priv->txbyte_clk = priv->phy_clk / 8; in rk_display_enable()
91 priv->txesc_clk = 20 * MHz; in rk_display_enable()
99 /* Config and enable mipi dsi according to timing */ in rk_display_enable()
100 ret = rk_mipi_dsi_enable(dev, timing); in rk_display_enable()
116 ret = panel_enable_backlight(priv->panel); in rk_display_enable()
130 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk_mipi_ofdata_to_platdata()
131 if (priv->grf <= 0) { in rk_mipi_ofdata_to_platdata()
133 __func__, priv->grf); in rk_mipi_ofdata_to_platdata()
134 return -ENXIO; in rk_mipi_ofdata_to_platdata()
136 priv->regs = dev_read_addr(dev); in rk_mipi_ofdata_to_platdata()
137 if (priv->regs == FDT_ADDR_T_NONE) { in rk_mipi_ofdata_to_platdata()
139 return -ENXIO; in rk_mipi_ofdata_to_platdata()
146 * Probe function: check panel existence and readingit's timing. Then config
147 * mipi dsi controller and enable it according to the timing parameter.
154 ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel", in rk_mipi_probe()
155 &priv->panel); in rk_mipi_probe()
157 debug("%s: Can not find panel (err=%d)\n", __func__, ret); in rk_mipi_probe()