Lines Matching refs:reg32
334 u32 reg32; in gma_pm_init_pre_vbios() local
350 reg32 = gtt_read(gtt_bar, 0x42004); in gma_pm_init_pre_vbios()
351 reg32 |= (1 << 14) | (1 << 15); in gma_pm_init_pre_vbios()
352 gtt_write(gtt_bar, 0x42004, reg32); in gma_pm_init_pre_vbios()
357 reg32 = gtt_read(gtt_bar, 0x45010); in gma_pm_init_pre_vbios()
358 reg32 |= (1 << 1) | (1 << 0); in gma_pm_init_pre_vbios()
359 gtt_write(gtt_bar, 0x45010, reg32); in gma_pm_init_pre_vbios()
363 reg32 = gtt_read(gtt_bar, 0x911c); in gma_pm_init_pre_vbios()
365 if (reg32 & (1 << 13)) { in gma_pm_init_pre_vbios()
375 if (reg32 & (1 << 13)) { in gma_pm_init_pre_vbios()
410 reg32 = gtt_read(gtt_bar, 0xa180); in gma_pm_init_pre_vbios()
411 reg32 |= (1 << 26) | (1 << 31); in gma_pm_init_pre_vbios()
414 reg32 |= (1 << 20); in gma_pm_init_pre_vbios()
415 gtt_write(gtt_bar, 0xa180, reg32); in gma_pm_init_pre_vbios()
420 reg32 = gtt_read(gtt_bar, 0x9400); in gma_pm_init_pre_vbios()
421 reg32 |= (1 << 7); in gma_pm_init_pre_vbios()
422 gtt_write(gtt_bar, 0x9400, reg32); in gma_pm_init_pre_vbios()
424 reg32 = gtt_read(gtt_bar, 0x941c); in gma_pm_init_pre_vbios()
425 reg32 &= 0xf; in gma_pm_init_pre_vbios()
426 reg32 |= (1 << 1); in gma_pm_init_pre_vbios()
427 gtt_write(gtt_bar, 0x941c, reg32); in gma_pm_init_pre_vbios()
432 reg32 = gtt_read(gtt_bar, 0x907c); in gma_pm_init_pre_vbios()
433 reg32 |= (1 << 16); in gma_pm_init_pre_vbios()
434 gtt_write(gtt_bar, 0x907c, reg32); in gma_pm_init_pre_vbios()
497 reg32 = readl(MCHBAR_REG(0x5998)); in gma_pm_init_pre_vbios()
498 reg32 >>= 16; in gma_pm_init_pre_vbios()
499 reg32 &= 0xef; in gma_pm_init_pre_vbios()
500 reg32 <<= 25; in gma_pm_init_pre_vbios()
501 gtt_write(gtt_bar, 0xa008, reg32); in gma_pm_init_pre_vbios()
510 reg32 = gtt_read(gtt_bar, 0x6c024); in gma_pm_init_pre_vbios()
511 reg32 &= ~0x000001c0; in gma_pm_init_pre_vbios()
512 gtt_write(gtt_bar, 0x6c024, reg32); in gma_pm_init_pre_vbios()
521 u32 reg32, cycle_delay; in gma_pm_init_post_vbios() local
541 reg32 = gtt_read(gtt_bar, 0xc4030); in gma_pm_init_post_vbios()
542 if (!reg32) { in gma_pm_init_post_vbios()
549 reg32 = (dp_hotplug[0] & 0x7) << 2; in gma_pm_init_post_vbios()
550 reg32 |= (dp_hotplug[0] & 0x7) << 10; in gma_pm_init_post_vbios()
551 reg32 |= (dp_hotplug[0] & 0x7) << 18; in gma_pm_init_post_vbios()
552 gtt_write(gtt_bar, 0xc4030, reg32); in gma_pm_init_post_vbios()
556 reg32 = gtt_read(gtt_bar, 0xc7208); in gma_pm_init_post_vbios()
557 if (!reg32) { in gma_pm_init_post_vbios()
558 reg32 = (unsigned)fdtdec_get_int(blob, node, in gma_pm_init_post_vbios()
560 reg32 |= fdtdec_get_int(blob, node, "panel-power-up-delay", 0) in gma_pm_init_post_vbios()
562 reg32 |= fdtdec_get_int(blob, node, in gma_pm_init_post_vbios()
564 gtt_write(gtt_bar, 0xc7208, reg32); in gma_pm_init_post_vbios()
568 reg32 = gtt_read(gtt_bar, 0xc720c); in gma_pm_init_post_vbios()
569 if (!reg32) { in gma_pm_init_post_vbios()
570 reg32 = fdtdec_get_int(blob, node, "panel-power-down-delay", 0) in gma_pm_init_post_vbios()
572 reg32 |= fdtdec_get_int(blob, node, in gma_pm_init_post_vbios()
574 gtt_write(gtt_bar, 0xc720c, reg32); in gma_pm_init_post_vbios()
581 reg32 = gtt_read(gtt_bar, 0xc7210); in gma_pm_init_post_vbios()
582 reg32 &= ~0xff; in gma_pm_init_post_vbios()
583 reg32 |= cycle_delay; in gma_pm_init_post_vbios()
584 gtt_write(gtt_bar, 0xc7210, reg32); in gma_pm_init_post_vbios()
588 reg32 = fdtdec_get_int(blob, node, "intel,cpu-backlight", 0); in gma_pm_init_post_vbios()
589 if (reg32) { in gma_pm_init_post_vbios()
591 gtt_write(gtt_bar, 0x48254, reg32); in gma_pm_init_post_vbios()
593 reg32 = fdtdec_get_int(blob, node, "intel,pch-backlight", 0); in gma_pm_init_post_vbios()
594 if (reg32) { in gma_pm_init_post_vbios()
596 gtt_write(gtt_bar, 0xc8254, reg32); in gma_pm_init_post_vbios()
712 u32 reg32; in sandybridge_setup_graphics() local
753 reg32 = readl(MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
754 reg32 |= (1 << 9) | (1 << 10); in sandybridge_setup_graphics()
755 writel(reg32, MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
758 reg32 = readl(MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
759 writel(reg32 | 1, MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
762 reg32 = readl(MCHBAR_REG(0x5d14)); in sandybridge_setup_graphics()
763 reg32 |= (1 << 31); in sandybridge_setup_graphics()
764 writel(reg32, MCHBAR_REG(0x5d14)); in sandybridge_setup_graphics()
767 reg32 = readl(MCHBAR_REG(0x6120)); in sandybridge_setup_graphics()
768 reg32 &= ~(1 << 0); in sandybridge_setup_graphics()
769 writel(reg32, MCHBAR_REG(0x6120)); in sandybridge_setup_graphics()
771 reg32 = readl(MCHBAR_REG(0x5418)); in sandybridge_setup_graphics()
772 reg32 |= (1 << 4) | (1 << 5); in sandybridge_setup_graphics()
773 writel(reg32, MCHBAR_REG(0x5418)); in sandybridge_setup_graphics()
781 u32 reg32; in gma_func0_init() local
796 dm_pci_read_config32(dev, PCI_COMMAND, ®32); in gma_func0_init()
797 reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO; in gma_func0_init()
798 dm_pci_write_config32(dev, PCI_COMMAND, reg32); in gma_func0_init()