Lines Matching refs:gtt_write

304 static inline void gtt_write(void *bar, u32 reg, u32 data)  in gtt_write()  function
312 gtt_write(bar, pm->reg, pm->value); in gtt_write_powermeter()
340 gtt_write(gtt_bar, 0xa18c, 0x00000001); in gma_pm_init_pre_vbios()
343 gtt_write(gtt_bar, 0xa180, 1 << 5); in gma_pm_init_pre_vbios()
344 gtt_write(gtt_bar, 0xa188, 0xffff0001); in gma_pm_init_pre_vbios()
352 gtt_write(gtt_bar, 0x42004, reg32); in gma_pm_init_pre_vbios()
359 gtt_write(gtt_bar, 0x45010, reg32); in gma_pm_init_pre_vbios()
401 gtt_write(gtt_bar, 0xa004, 0x00000010); in gma_pm_init_pre_vbios()
404 gtt_write(gtt_bar, 0xa000, 0x00070020); in gma_pm_init_pre_vbios()
407 gtt_write(gtt_bar, 0xa080, 0x00000004); in gma_pm_init_pre_vbios()
415 gtt_write(gtt_bar, 0xa180, reg32); in gma_pm_init_pre_vbios()
422 gtt_write(gtt_bar, 0x9400, reg32); in gma_pm_init_pre_vbios()
427 gtt_write(gtt_bar, 0x941c, reg32); in gma_pm_init_pre_vbios()
434 gtt_write(gtt_bar, 0x907c, reg32); in gma_pm_init_pre_vbios()
437 gtt_write(gtt_bar, 0x9424, 0x00000001); in gma_pm_init_pre_vbios()
440 gtt_write(gtt_bar, 0x9424, 0x00000000); in gma_pm_init_pre_vbios()
445 gtt_write(gtt_bar, 0x138128, 0x00000029); /* Mailbox Data */ in gma_pm_init_pre_vbios()
447 gtt_write(gtt_bar, 0x138124, 0x80000004); in gma_pm_init_pre_vbios()
449 gtt_write(gtt_bar, 0x138124, 0x8000000a); in gma_pm_init_pre_vbios()
454 gtt_write(gtt_bar, 0xa090, 0x00000000); /* RC Control */ in gma_pm_init_pre_vbios()
455 gtt_write(gtt_bar, 0xa098, 0x03e80000); /* RC1e Wake Rate Limit */ in gma_pm_init_pre_vbios()
456 gtt_write(gtt_bar, 0xa09c, 0x0028001e); /* RC6/6p Wake Rate Limit */ in gma_pm_init_pre_vbios()
457 gtt_write(gtt_bar, 0xa0a0, 0x0000001e); /* RC6pp Wake Rate Limit */ in gma_pm_init_pre_vbios()
458 gtt_write(gtt_bar, 0xa0a8, 0x0001e848); /* RC Evaluation Interval */ in gma_pm_init_pre_vbios()
459 gtt_write(gtt_bar, 0xa0ac, 0x00000019); /* RC Idle Hysteresis */ in gma_pm_init_pre_vbios()
462 gtt_write(gtt_bar, 0x2054, 0x0000000a); /* Render Idle Max Count */ in gma_pm_init_pre_vbios()
463 gtt_write(gtt_bar, 0x12054, 0x0000000a); /* Video Idle Max Count */ in gma_pm_init_pre_vbios()
464 gtt_write(gtt_bar, 0x22054, 0x0000000a); /* Blitter Idle Max Count */ in gma_pm_init_pre_vbios()
467 gtt_write(gtt_bar, 0xa0b0, 0x00000000); /* Unblock Ack to Busy */ in gma_pm_init_pre_vbios()
468 gtt_write(gtt_bar, 0xa0b4, 0x000003e8); /* RC1e Threshold */ in gma_pm_init_pre_vbios()
469 gtt_write(gtt_bar, 0xa0b8, 0x0000c350); /* RC6 Threshold */ in gma_pm_init_pre_vbios()
470 gtt_write(gtt_bar, 0xa0bc, 0x000186a0); /* RC6p Threshold */ in gma_pm_init_pre_vbios()
471 gtt_write(gtt_bar, 0xa0c0, 0x0000fa00); /* RC6pp Threshold */ in gma_pm_init_pre_vbios()
474 gtt_write(gtt_bar, 0xa010, 0x000f4240); /* RP Down Timeout */ in gma_pm_init_pre_vbios()
475 gtt_write(gtt_bar, 0xa014, 0x12060000); /* RP Interrupt Limits */ in gma_pm_init_pre_vbios()
476 gtt_write(gtt_bar, 0xa02c, 0x00015f90); /* RP Up Threshold */ in gma_pm_init_pre_vbios()
477 gtt_write(gtt_bar, 0xa030, 0x000186a0); /* RP Down Threshold */ in gma_pm_init_pre_vbios()
478 gtt_write(gtt_bar, 0xa068, 0x000186a0); /* RP Up EI */ in gma_pm_init_pre_vbios()
479 gtt_write(gtt_bar, 0xa06c, 0x000493e0); /* RP Down EI */ in gma_pm_init_pre_vbios()
480 gtt_write(gtt_bar, 0xa070, 0x0000000a); /* RP Idle Hysteresis */ in gma_pm_init_pre_vbios()
490 gtt_write(gtt_bar, 0xa090, 0x88040000); /* HW RC Control */ in gma_pm_init_pre_vbios()
492 gtt_write(gtt_bar, 0xa090, 0x88040000); /* HW RC Control */ in gma_pm_init_pre_vbios()
501 gtt_write(gtt_bar, 0xa008, reg32); in gma_pm_init_pre_vbios()
504 gtt_write(gtt_bar, 0xa024, 0x00000592); in gma_pm_init_pre_vbios()
507 gtt_write(gtt_bar, 0x4402c, 0x03000076); in gma_pm_init_pre_vbios()
512 gtt_write(gtt_bar, 0x6c024, reg32); in gma_pm_init_pre_vbios()
527 gtt_write(gtt_bar, 0xa18c, gtt_read(gtt_bar, 0xa18c) & ~1); in gma_pm_init_post_vbios()
530 gtt_write(gtt_bar, 0xa188, 0x1fffe); in gma_pm_init_post_vbios()
532 gtt_write(gtt_bar, 0xa188, in gma_pm_init_post_vbios()
538 gtt_write(gtt_bar, 0xa094, 0x00060000); in gma_pm_init_post_vbios()
552 gtt_write(gtt_bar, 0xc4030, reg32); in gma_pm_init_post_vbios()
564 gtt_write(gtt_bar, 0xc7208, reg32); in gma_pm_init_post_vbios()
574 gtt_write(gtt_bar, 0xc720c, reg32); in gma_pm_init_post_vbios()
584 gtt_write(gtt_bar, 0xc7210, reg32); in gma_pm_init_post_vbios()
590 gtt_write(gtt_bar, 0x48250, (1 << 31)); in gma_pm_init_post_vbios()
591 gtt_write(gtt_bar, 0x48254, reg32); in gma_pm_init_post_vbios()
595 gtt_write(gtt_bar, 0xc8250, (1 << 31)); in gma_pm_init_post_vbios()
596 gtt_write(gtt_bar, 0xc8254, reg32); in gma_pm_init_post_vbios()