Lines Matching +full:0 +full:x17000000
30 { 0xa200, 0xcc000000 },
31 { 0xa204, 0x07000040 },
32 { 0xa208, 0x0000fe00 },
33 { 0xa20c, 0x00000000 },
34 { 0xa210, 0x17000000 },
35 { 0xa214, 0x00000021 },
36 { 0xa218, 0x0817fe19 },
37 { 0xa21c, 0x00000000 },
38 { 0xa220, 0x00000000 },
39 { 0xa224, 0xcc000000 },
40 { 0xa228, 0x07000040 },
41 { 0xa22c, 0x0000fe00 },
42 { 0xa230, 0x00000000 },
43 { 0xa234, 0x17000000 },
44 { 0xa238, 0x00000021 },
45 { 0xa23c, 0x0817fe19 },
46 { 0xa240, 0x00000000 },
47 { 0xa244, 0x00000000 },
48 { 0xa248, 0x8000421e },
49 { 0 }
53 { 0xa200, 0x330000a6 },
54 { 0xa204, 0x402d0031 },
55 { 0xa208, 0x00165f83 },
56 { 0xa20c, 0xf1000000 },
57 { 0xa210, 0x00000000 },
58 { 0xa214, 0x00160016 },
59 { 0xa218, 0x002a002b },
60 { 0xa21c, 0x00000000 },
61 { 0xa220, 0x00000000 },
62 { 0xa224, 0x330000a6 },
63 { 0xa228, 0x402d0031 },
64 { 0xa22c, 0x00165f83 },
65 { 0xa230, 0xf1000000 },
66 { 0xa234, 0x00000000 },
67 { 0xa238, 0x00160016 },
68 { 0xa23c, 0x002a002b },
69 { 0xa240, 0x00000000 },
70 { 0xa244, 0x00000000 },
71 { 0xa248, 0x8000421e },
72 { 0 }
76 { 0xa800, 0x00000000 },
77 { 0xa804, 0x00021c00 },
78 { 0xa808, 0x00000403 },
79 { 0xa80c, 0x02001700 },
80 { 0xa810, 0x05000200 },
81 { 0xa814, 0x00000000 },
82 { 0xa818, 0x00690500 },
83 { 0xa81c, 0x0000007f },
84 { 0xa820, 0x01002501 },
85 { 0xa824, 0x00000300 },
86 { 0xa828, 0x01000331 },
87 { 0xa82c, 0x0000000c },
88 { 0xa830, 0x00010016 },
89 { 0xa834, 0x01100101 },
90 { 0xa838, 0x00010103 },
91 { 0xa83c, 0x00041300 },
92 { 0xa840, 0x00000b30 },
93 { 0xa844, 0x00000000 },
94 { 0xa848, 0x7f000000 },
95 { 0xa84c, 0x05000008 },
96 { 0xa850, 0x00000001 },
97 { 0xa854, 0x00000004 },
98 { 0xa858, 0x00000007 },
99 { 0xa85c, 0x00000000 },
100 { 0xa860, 0x00010000 },
101 { 0xa248, 0x0000221e },
102 { 0xa900, 0x00000000 },
103 { 0xa904, 0x00001c00 },
104 { 0xa908, 0x00000000 },
105 { 0xa90c, 0x06000000 },
106 { 0xa910, 0x09000200 },
107 { 0xa914, 0x00000000 },
108 { 0xa918, 0x00590000 },
109 { 0xa91c, 0x00000000 },
110 { 0xa920, 0x04002501 },
111 { 0xa924, 0x00000100 },
112 { 0xa928, 0x03000410 },
113 { 0xa92c, 0x00000000 },
114 { 0xa930, 0x00020000 },
115 { 0xa934, 0x02070106 },
116 { 0xa938, 0x00010100 },
117 { 0xa93c, 0x00401c00 },
118 { 0xa940, 0x00000000 },
119 { 0xa944, 0x00000000 },
120 { 0xa948, 0x10000e00 },
121 { 0xa94c, 0x02000004 },
122 { 0xa950, 0x00000001 },
123 { 0xa954, 0x00000004 },
124 { 0xa960, 0x00060000 },
125 { 0xaa3c, 0x00001c00 },
126 { 0xaa54, 0x00000004 },
127 { 0xaa60, 0x00060000 },
128 { 0 }
132 { 0xa800, 0x10000000 },
133 { 0xa804, 0x00033800 },
134 { 0xa808, 0x00000902 },
135 { 0xa80c, 0x0c002f00 },
136 { 0xa810, 0x12000400 },
137 { 0xa814, 0x00000000 },
138 { 0xa818, 0x00d20800 },
139 { 0xa81c, 0x00000002 },
140 { 0xa820, 0x03004b02 },
141 { 0xa824, 0x00000600 },
142 { 0xa828, 0x07000773 },
143 { 0xa82c, 0x00000000 },
144 { 0xa830, 0x00010032 },
145 { 0xa834, 0x1520040d },
146 { 0xa838, 0x00020105 },
147 { 0xa83c, 0x00083700 },
148 { 0xa840, 0x0000151d },
149 { 0xa844, 0x00000000 },
150 { 0xa848, 0x20001b00 },
151 { 0xa84c, 0x0a000010 },
152 { 0xa850, 0x00000000 },
153 { 0xa854, 0x00000008 },
154 { 0xa858, 0x00000008 },
155 { 0xa85c, 0x00000000 },
156 { 0xa860, 0x00020000 },
157 { 0xa248, 0x0000221e },
158 { 0xa900, 0x00000000 },
159 { 0xa904, 0x00003500 },
160 { 0xa908, 0x00000000 },
161 { 0xa90c, 0x0c000000 },
162 { 0xa910, 0x12000500 },
163 { 0xa914, 0x00000000 },
164 { 0xa918, 0x00b20000 },
165 { 0xa91c, 0x00000000 },
166 { 0xa920, 0x08004b02 },
167 { 0xa924, 0x00000200 },
168 { 0xa928, 0x07000820 },
169 { 0xa92c, 0x00000000 },
170 { 0xa930, 0x00030000 },
171 { 0xa934, 0x050f020d },
172 { 0xa938, 0x00020300 },
173 { 0xa93c, 0x00903900 },
174 { 0xa940, 0x00000000 },
175 { 0xa944, 0x00000000 },
176 { 0xa948, 0x20001b00 },
177 { 0xa94c, 0x0a000010 },
178 { 0xa950, 0x00000000 },
179 { 0xa954, 0x00000008 },
180 { 0xa960, 0x00110000 },
181 { 0xaa3c, 0x00003900 },
182 { 0xaa54, 0x00000008 },
183 { 0xaa60, 0x00110000 },
184 { 0 }
188 { 0xa800, 0x20000000 },
189 { 0xa804, 0x000e3800 },
190 { 0xa808, 0x00000806 },
191 { 0xa80c, 0x0c002f00 },
192 { 0xa810, 0x0c000800 },
193 { 0xa814, 0x00000000 },
194 { 0xa818, 0x00d20d00 },
195 { 0xa81c, 0x000000ff },
196 { 0xa820, 0x03004b02 },
197 { 0xa824, 0x00000600 },
198 { 0xa828, 0x07000773 },
199 { 0xa82c, 0x00000000 },
200 { 0xa830, 0x00020032 },
201 { 0xa834, 0x1520040d },
202 { 0xa838, 0x00020105 },
203 { 0xa83c, 0x00083700 },
204 { 0xa840, 0x000016ff },
205 { 0xa844, 0x00000000 },
206 { 0xa848, 0xff000000 },
207 { 0xa84c, 0x0a000010 },
208 { 0xa850, 0x00000002 },
209 { 0xa854, 0x00000008 },
210 { 0xa858, 0x0000000f },
211 { 0xa85c, 0x00000000 },
212 { 0xa860, 0x00020000 },
213 { 0xa248, 0x0000221e },
214 { 0xa900, 0x00000000 },
215 { 0xa904, 0x00003800 },
216 { 0xa908, 0x00000000 },
217 { 0xa90c, 0x0c000000 },
218 { 0xa910, 0x12000800 },
219 { 0xa914, 0x00000000 },
220 { 0xa918, 0x00b20000 },
221 { 0xa91c, 0x00000000 },
222 { 0xa920, 0x08004b02 },
223 { 0xa924, 0x00000300 },
224 { 0xa928, 0x01000820 },
225 { 0xa92c, 0x00000000 },
226 { 0xa930, 0x00030000 },
227 { 0xa934, 0x15150406 },
228 { 0xa938, 0x00020300 },
229 { 0xa93c, 0x00903900 },
230 { 0xa940, 0x00000000 },
231 { 0xa944, 0x00000000 },
232 { 0xa948, 0x20001b00 },
233 { 0xa94c, 0x0a000010 },
234 { 0xa950, 0x00000000 },
235 { 0xa954, 0x00000008 },
236 { 0xa960, 0x00110000 },
237 { 0xaa3c, 0x00003900 },
238 { 0xaa54, 0x00000008 },
239 { 0xaa60, 0x00110000 },
240 { 0 }
244 { 0xa800, 0x00000000 },
245 { 0xa804, 0x00030400 },
246 { 0xa808, 0x00000806 },
247 { 0xa80c, 0x0c002f00 },
248 { 0xa810, 0x0c000300 },
249 { 0xa814, 0x00000000 },
250 { 0xa818, 0x00d20d00 },
251 { 0xa81c, 0x000000ff },
252 { 0xa820, 0x03004b02 },
253 { 0xa824, 0x00000600 },
254 { 0xa828, 0x07000773 },
255 { 0xa82c, 0x00000000 },
256 { 0xa830, 0x00020032 },
257 { 0xa834, 0x1520040d },
258 { 0xa838, 0x00020105 },
259 { 0xa83c, 0x00083700 },
260 { 0xa840, 0x000016ff },
261 { 0xa844, 0x00000000 },
262 { 0xa848, 0xff000000 },
263 { 0xa84c, 0x0a000010 },
264 { 0xa850, 0x00000001 },
265 { 0xa854, 0x00000008 },
266 { 0xa858, 0x00000008 },
267 { 0xa85c, 0x00000000 },
268 { 0xa860, 0x00020000 },
269 { 0xa248, 0x0000221e },
270 { 0xa900, 0x00000000 },
271 { 0xa904, 0x00003800 },
272 { 0xa908, 0x00000000 },
273 { 0xa90c, 0x0c000000 },
274 { 0xa910, 0x12000800 },
275 { 0xa914, 0x00000000 },
276 { 0xa918, 0x00b20000 },
277 { 0xa91c, 0x00000000 },
278 { 0xa920, 0x08004b02 },
279 { 0xa924, 0x00000300 },
280 { 0xa928, 0x01000820 },
281 { 0xa92c, 0x00000000 },
282 { 0xa930, 0x00030000 },
283 { 0xa934, 0x15150406 },
284 { 0xa938, 0x00020300 },
285 { 0xa93c, 0x00903900 },
286 { 0xa940, 0x00000000 },
287 { 0xa944, 0x00000000 },
288 { 0xa948, 0x20001b00 },
289 { 0xa94c, 0x0a000010 },
290 { 0xa950, 0x00000000 },
291 { 0xa954, 0x00000008 },
292 { 0xa960, 0x00110000 },
293 { 0xaa3c, 0x00003900 },
294 { 0xaa54, 0x00000008 },
295 { 0xaa60, 0x00110000 },
296 { 0 }
329 return 0; in gtt_poll()
340 gtt_write(gtt_bar, 0xa18c, 0x00000001); in gma_pm_init_pre_vbios()
341 gtt_poll(gtt_bar, 0x130090, (1 << 0), (1 << 0)); in gma_pm_init_pre_vbios()
343 gtt_write(gtt_bar, 0xa180, 1 << 5); in gma_pm_init_pre_vbios()
344 gtt_write(gtt_bar, 0xa188, 0xffff0001); in gma_pm_init_pre_vbios()
345 gtt_poll(gtt_bar, 0x130040, (1 << 0), (1 << 0)); in gma_pm_init_pre_vbios()
349 /* 1d: Set GTT+0x42004 [15:14]=11 (SnB C1+) */ in gma_pm_init_pre_vbios()
350 reg32 = gtt_read(gtt_bar, 0x42004); in gma_pm_init_pre_vbios()
352 gtt_write(gtt_bar, 0x42004, reg32); in gma_pm_init_pre_vbios()
357 reg32 = gtt_read(gtt_bar, 0x45010); in gma_pm_init_pre_vbios()
358 reg32 |= (1 << 1) | (1 << 0); in gma_pm_init_pre_vbios()
359 gtt_write(gtt_bar, 0x45010, reg32); in gma_pm_init_pre_vbios()
362 /* 2: Get GT SKU from GTT+0x911c[13] */ in gma_pm_init_pre_vbios()
363 reg32 = gtt_read(gtt_bar, 0x911c); in gma_pm_init_pre_vbios()
373 u32 unit = readl(MCHBAR_REG(0x5938)) & 0xf; in gma_pm_init_pre_vbios()
381 u32 tdp = readl(MCHBAR_REG(0x5930)) & 0x7fff; in gma_pm_init_pre_vbios()
401 gtt_write(gtt_bar, 0xa004, 0x00000010); in gma_pm_init_pre_vbios()
404 gtt_write(gtt_bar, 0xa000, 0x00070020); in gma_pm_init_pre_vbios()
407 gtt_write(gtt_bar, 0xa080, 0x00000004); in gma_pm_init_pre_vbios()
410 reg32 = gtt_read(gtt_bar, 0xa180); in gma_pm_init_pre_vbios()
415 gtt_write(gtt_bar, 0xa180, reg32); in gma_pm_init_pre_vbios()
420 reg32 = gtt_read(gtt_bar, 0x9400); in gma_pm_init_pre_vbios()
422 gtt_write(gtt_bar, 0x9400, reg32); in gma_pm_init_pre_vbios()
424 reg32 = gtt_read(gtt_bar, 0x941c); in gma_pm_init_pre_vbios()
425 reg32 &= 0xf; in gma_pm_init_pre_vbios()
427 gtt_write(gtt_bar, 0x941c, reg32); in gma_pm_init_pre_vbios()
428 gtt_poll(gtt_bar, 0x941c, (1 << 1), (0 << 1)); in gma_pm_init_pre_vbios()
432 reg32 = gtt_read(gtt_bar, 0x907c); in gma_pm_init_pre_vbios()
434 gtt_write(gtt_bar, 0x907c, reg32); in gma_pm_init_pre_vbios()
437 gtt_write(gtt_bar, 0x9424, 0x00000001); in gma_pm_init_pre_vbios()
440 gtt_write(gtt_bar, 0x9424, 0x00000000); in gma_pm_init_pre_vbios()
444 if (gtt_poll(gtt_bar, 0x138124, (1 << 31), (0 << 31))) { in gma_pm_init_pre_vbios()
445 gtt_write(gtt_bar, 0x138128, 0x00000029); /* Mailbox Data */ in gma_pm_init_pre_vbios()
447 gtt_write(gtt_bar, 0x138124, 0x80000004); in gma_pm_init_pre_vbios()
448 if (gtt_poll(gtt_bar, 0x138124, (1 << 31), (0 << 31))) in gma_pm_init_pre_vbios()
449 gtt_write(gtt_bar, 0x138124, 0x8000000a); in gma_pm_init_pre_vbios()
450 gtt_poll(gtt_bar, 0x138124, (1 << 31), (0 << 31)); in gma_pm_init_pre_vbios()
454 gtt_write(gtt_bar, 0xa090, 0x00000000); /* RC Control */ in gma_pm_init_pre_vbios()
455 gtt_write(gtt_bar, 0xa098, 0x03e80000); /* RC1e Wake Rate Limit */ in gma_pm_init_pre_vbios()
456 gtt_write(gtt_bar, 0xa09c, 0x0028001e); /* RC6/6p Wake Rate Limit */ in gma_pm_init_pre_vbios()
457 gtt_write(gtt_bar, 0xa0a0, 0x0000001e); /* RC6pp Wake Rate Limit */ in gma_pm_init_pre_vbios()
458 gtt_write(gtt_bar, 0xa0a8, 0x0001e848); /* RC Evaluation Interval */ in gma_pm_init_pre_vbios()
459 gtt_write(gtt_bar, 0xa0ac, 0x00000019); /* RC Idle Hysteresis */ in gma_pm_init_pre_vbios()
462 gtt_write(gtt_bar, 0x2054, 0x0000000a); /* Render Idle Max Count */ in gma_pm_init_pre_vbios()
463 gtt_write(gtt_bar, 0x12054, 0x0000000a); /* Video Idle Max Count */ in gma_pm_init_pre_vbios()
464 gtt_write(gtt_bar, 0x22054, 0x0000000a); /* Blitter Idle Max Count */ in gma_pm_init_pre_vbios()
467 gtt_write(gtt_bar, 0xa0b0, 0x00000000); /* Unblock Ack to Busy */ in gma_pm_init_pre_vbios()
468 gtt_write(gtt_bar, 0xa0b4, 0x000003e8); /* RC1e Threshold */ in gma_pm_init_pre_vbios()
469 gtt_write(gtt_bar, 0xa0b8, 0x0000c350); /* RC6 Threshold */ in gma_pm_init_pre_vbios()
470 gtt_write(gtt_bar, 0xa0bc, 0x000186a0); /* RC6p Threshold */ in gma_pm_init_pre_vbios()
471 gtt_write(gtt_bar, 0xa0c0, 0x0000fa00); /* RC6pp Threshold */ in gma_pm_init_pre_vbios()
474 gtt_write(gtt_bar, 0xa010, 0x000f4240); /* RP Down Timeout */ in gma_pm_init_pre_vbios()
475 gtt_write(gtt_bar, 0xa014, 0x12060000); /* RP Interrupt Limits */ in gma_pm_init_pre_vbios()
476 gtt_write(gtt_bar, 0xa02c, 0x00015f90); /* RP Up Threshold */ in gma_pm_init_pre_vbios()
477 gtt_write(gtt_bar, 0xa030, 0x000186a0); /* RP Down Threshold */ in gma_pm_init_pre_vbios()
478 gtt_write(gtt_bar, 0xa068, 0x000186a0); /* RP Up EI */ in gma_pm_init_pre_vbios()
479 gtt_write(gtt_bar, 0xa06c, 0x000493e0); /* RP Down EI */ in gma_pm_init_pre_vbios()
480 gtt_write(gtt_bar, 0xa070, 0x0000000a); /* RP Idle Hysteresis */ in gma_pm_init_pre_vbios()
490 gtt_write(gtt_bar, 0xa090, 0x88040000); /* HW RC Control */ in gma_pm_init_pre_vbios()
492 gtt_write(gtt_bar, 0xa090, 0x88040000); /* HW RC Control */ in gma_pm_init_pre_vbios()
496 /* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 (8 bits!? use 7) */ in gma_pm_init_pre_vbios()
497 reg32 = readl(MCHBAR_REG(0x5998)); in gma_pm_init_pre_vbios()
499 reg32 &= 0xef; in gma_pm_init_pre_vbios()
501 gtt_write(gtt_bar, 0xa008, reg32); in gma_pm_init_pre_vbios()
504 gtt_write(gtt_bar, 0xa024, 0x00000592); in gma_pm_init_pre_vbios()
507 gtt_write(gtt_bar, 0x4402c, 0x03000076); in gma_pm_init_pre_vbios()
509 /* Clear 0x6c024 [8:6] */ in gma_pm_init_pre_vbios()
510 reg32 = gtt_read(gtt_bar, 0x6c024); in gma_pm_init_pre_vbios()
511 reg32 &= ~0x000001c0; in gma_pm_init_pre_vbios()
512 gtt_write(gtt_bar, 0x6c024, reg32); in gma_pm_init_pre_vbios()
514 return 0; in gma_pm_init_pre_vbios()
527 gtt_write(gtt_bar, 0xa18c, gtt_read(gtt_bar, 0xa18c) & ~1); in gma_pm_init_post_vbios()
528 gtt_poll(gtt_bar, 0x130090, (1 << 0), (0 << 0)); in gma_pm_init_post_vbios()
530 gtt_write(gtt_bar, 0xa188, 0x1fffe); in gma_pm_init_post_vbios()
531 if (gtt_poll(gtt_bar, 0x130040, (1 << 0), (0 << 0))) { in gma_pm_init_post_vbios()
532 gtt_write(gtt_bar, 0xa188, in gma_pm_init_post_vbios()
533 gtt_read(gtt_bar, 0xa188) | 1); in gma_pm_init_post_vbios()
538 gtt_write(gtt_bar, 0xa094, 0x00060000); in gma_pm_init_post_vbios()
541 reg32 = gtt_read(gtt_bar, 0xc4030); in gma_pm_init_post_vbios()
549 reg32 = (dp_hotplug[0] & 0x7) << 2; in gma_pm_init_post_vbios()
550 reg32 |= (dp_hotplug[0] & 0x7) << 10; in gma_pm_init_post_vbios()
551 reg32 |= (dp_hotplug[0] & 0x7) << 18; in gma_pm_init_post_vbios()
552 gtt_write(gtt_bar, 0xc4030, reg32); in gma_pm_init_post_vbios()
556 reg32 = gtt_read(gtt_bar, 0xc7208); in gma_pm_init_post_vbios()
559 "panel-port-select", 0) << 30; in gma_pm_init_post_vbios()
560 reg32 |= fdtdec_get_int(blob, node, "panel-power-up-delay", 0) in gma_pm_init_post_vbios()
563 "panel-power-backlight-on-delay", 0); in gma_pm_init_post_vbios()
564 gtt_write(gtt_bar, 0xc7208, reg32); in gma_pm_init_post_vbios()
568 reg32 = gtt_read(gtt_bar, 0xc720c); in gma_pm_init_post_vbios()
570 reg32 = fdtdec_get_int(blob, node, "panel-power-down-delay", 0) in gma_pm_init_post_vbios()
573 "panel-power-backlight-off-delay", 0); in gma_pm_init_post_vbios()
574 gtt_write(gtt_bar, 0xc720c, reg32); in gma_pm_init_post_vbios()
579 "intel,panel-power-cycle-delay", 0); in gma_pm_init_post_vbios()
581 reg32 = gtt_read(gtt_bar, 0xc7210); in gma_pm_init_post_vbios()
582 reg32 &= ~0xff; in gma_pm_init_post_vbios()
584 gtt_write(gtt_bar, 0xc7210, reg32); in gma_pm_init_post_vbios()
588 reg32 = fdtdec_get_int(blob, node, "intel,cpu-backlight", 0); in gma_pm_init_post_vbios()
590 gtt_write(gtt_bar, 0x48250, (1 << 31)); in gma_pm_init_post_vbios()
591 gtt_write(gtt_bar, 0x48254, reg32); in gma_pm_init_post_vbios()
593 reg32 = fdtdec_get_int(blob, node, "intel,pch-backlight", 0); in gma_pm_init_post_vbios()
595 gtt_write(gtt_bar, 0xc8250, (1 << 31)); in gma_pm_init_post_vbios()
596 gtt_write(gtt_bar, 0xc8254, reg32); in gma_pm_init_post_vbios()
599 return 0; in gma_pm_init_post_vbios()
611 case 0x80860102: /* GT1 Desktop */ in board_map_oprom_vendev()
612 case 0x8086010a: /* GT1 Server */ in board_map_oprom_vendev()
613 case 0x80860112: /* GT2 Desktop */ in board_map_oprom_vendev()
614 case 0x80860116: /* GT2 Mobile */ in board_map_oprom_vendev()
615 case 0x80860122: /* GT2 Desktop >=1.3GHz */ in board_map_oprom_vendev()
616 case 0x80860126: /* GT2 Mobile >=1.3GHz */ in board_map_oprom_vendev()
617 case 0x80860156: /* IVB */ in board_map_oprom_vendev()
618 case 0x80860166: /* IVB */ in board_map_oprom_vendev()
619 return 0x80860106; /* GT1 Mobile */ in board_map_oprom_vendev()
627 int res = 0; in int15_handler()
632 case 0x5f34: in int15_handler()
637 * bit 0 = Centering (do not set with bit1 or bit2) in int15_handler()
638 * 0 = video bios default in int15_handler()
640 M.x86.R_AX = 0x005f; in int15_handler()
641 M.x86.R_CL = 0x00; /* Use video bios default */ in int15_handler()
644 case 0x5f35: in int15_handler()
647 * bit 0 = CRT in int15_handler()
656 M.x86.R_AX = 0x005f; in int15_handler()
657 M.x86.R_CX = 0x0000; /* Use video bios default */ in int15_handler()
660 case 0x5f51: in int15_handler()
668 M.x86.R_AX = 0x005f; in int15_handler()
669 M.x86.R_CX = 0x0003; /* eDP */ in int15_handler()
672 case 0x5f70: in int15_handler()
674 case 0: in int15_handler()
676 M.x86.R_AX = 0x005f; in int15_handler()
677 M.x86.R_CX = 0x0000; in int15_handler()
682 M.x86.R_AX = 0x005f; in int15_handler()
683 M.x86.R_CX = 0x0000; in int15_handler()
688 M.x86.R_AX = 0x005f; in int15_handler()
689 M.x86.R_CX = 0x0000; in int15_handler()
694 debug("Unknown INT15 5f70 function: 0x%02x\n", in int15_handler()
699 case 0x5fac: in int15_handler()
718 case 0x0102: /* GT1 Desktop */ in sandybridge_setup_graphics()
719 case 0x0106: /* GT1 Mobile */ in sandybridge_setup_graphics()
720 case 0x010a: /* GT1 Server */ in sandybridge_setup_graphics()
721 case 0x0112: /* GT2 Desktop */ in sandybridge_setup_graphics()
722 case 0x0116: /* GT2 Mobile */ in sandybridge_setup_graphics()
723 case 0x0122: /* GT2 Desktop >=1.3GHz */ in sandybridge_setup_graphics()
724 case 0x0126: /* GT2 Mobile >=1.3GHz */ in sandybridge_setup_graphics()
725 case 0x0156: /* IvyBridge */ in sandybridge_setup_graphics()
726 case 0x0166: /* IvyBridge */ in sandybridge_setup_graphics()
737 reg16 &= ~0x00f8; in sandybridge_setup_graphics()
740 reg16 &= ~0x0300; in sandybridge_setup_graphics()
743 reg16 &= ~0x0002; in sandybridge_setup_graphics()
748 reg8 &= ~0x06; in sandybridge_setup_graphics()
749 reg8 |= 0x02; in sandybridge_setup_graphics()
753 reg32 = readl(MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
755 writel(reg32, MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
758 reg32 = readl(MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
759 writel(reg32 | 1, MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
762 reg32 = readl(MCHBAR_REG(0x5d14)); in sandybridge_setup_graphics()
764 writel(reg32, MCHBAR_REG(0x5d14)); in sandybridge_setup_graphics()
767 reg32 = readl(MCHBAR_REG(0x6120)); in sandybridge_setup_graphics()
768 reg32 &= ~(1 << 0); in sandybridge_setup_graphics()
769 writel(reg32, MCHBAR_REG(0x6120)); in sandybridge_setup_graphics()
771 reg32 = readl(MCHBAR_REG(0x5418)); in sandybridge_setup_graphics()
773 writel(reg32, MCHBAR_REG(0x5418)); in sandybridge_setup_graphics()
786 writew(0x0010, RCB_REG(DISPBDF)); in gma_func0_init()
805 gtt_bar = (void *)(ulong)dm_pci_read_bar32(dev, 0); in gma_func0_init()
820 if (rev < 0) in bd82x6x_video_probe()
827 gtt_bar = (void *)(ulong)dm_pci_read_bar32(dev, 0); in bd82x6x_video_probe()
832 return 0; in bd82x6x_video_probe()