Lines Matching refs:reg
25 unsigned int reg; in exynos_dp_enable_video_input() local
27 reg = readl(&dp_regs->video_ctl1); in exynos_dp_enable_video_input()
28 reg &= ~VIDEO_EN_MASK; in exynos_dp_enable_video_input()
32 reg |= VIDEO_EN_MASK; in exynos_dp_enable_video_input()
34 writel(reg, &dp_regs->video_ctl1); in exynos_dp_enable_video_input()
42 unsigned int reg; in exynos_dp_enable_video_bist() local
44 reg = readl(&dp_regs->video_ctl4); in exynos_dp_enable_video_bist()
45 reg &= ~VIDEO_BIST_MASK; in exynos_dp_enable_video_bist()
49 reg |= VIDEO_BIST_MASK; in exynos_dp_enable_video_bist()
51 writel(reg, &dp_regs->video_ctl4); in exynos_dp_enable_video_bist()
58 unsigned int reg; in exynos_dp_enable_video_mute() local
60 reg = readl(&dp_regs->video_ctl1); in exynos_dp_enable_video_mute()
61 reg &= ~(VIDEO_MUTE_MASK); in exynos_dp_enable_video_mute()
63 reg |= VIDEO_MUTE_MASK; in exynos_dp_enable_video_mute()
65 writel(reg, &dp_regs->video_ctl1); in exynos_dp_enable_video_mute()
73 unsigned int reg; in exynos_dp_init_analog_param() local
80 reg = SEL_BG_NEW_BANDGAP | TX_TERMINAL_CTRL_61_OHM | in exynos_dp_init_analog_param()
82 writel(reg, &dp_regs->analog_ctl1); in exynos_dp_init_analog_param()
84 reg = SEL_24M | TX_DVDD_BIT_1_0625V; in exynos_dp_init_analog_param()
85 writel(reg, &dp_regs->analog_ctl2); in exynos_dp_init_analog_param()
92 reg = DRIVE_DVDD_BIT_1_0625V | SEL_CURRENT_DEFAULT | VCO_BIT_000_MICRO; in exynos_dp_init_analog_param()
93 writel(reg, &dp_regs->analog_ctl3); in exynos_dp_init_analog_param()
99 reg = PD_RING_OSC | AUX_TERMINAL_CTRL_52_OHM | TX_CUR1_2X | TX_CUR_4_MA; in exynos_dp_init_analog_param()
100 writel(reg, &dp_regs->pll_filter_ctl1); in exynos_dp_init_analog_param()
107 reg = CH3_AMP_0_MV | CH2_AMP_0_MV | CH1_AMP_0_MV | CH0_AMP_0_MV; in exynos_dp_init_analog_param()
109 writel(reg, &dp_regs->amp_tuning_ctl); in exynos_dp_init_analog_param()
116 reg = DP_PLL_LOOP_BIT_DEFAULT | DP_PLL_REF_BIT_1_1250V; in exynos_dp_init_analog_param()
117 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_param()
176 unsigned int reg; in exynos_dp_enable_sw_func() local
178 reg = readl(&dp_regs->func_en1); in exynos_dp_enable_sw_func()
179 reg &= ~(SW_FUNC_EN_N); in exynos_dp_enable_sw_func()
182 reg |= SW_FUNC_EN_N; in exynos_dp_enable_sw_func()
184 writel(reg, &dp_regs->func_en1); in exynos_dp_enable_sw_func()
192 unsigned int reg; in exynos_dp_set_analog_power_down() local
194 reg = readl(&dp_regs->phy_pd); in exynos_dp_set_analog_power_down()
197 reg &= ~(AUX_PD); in exynos_dp_set_analog_power_down()
199 reg |= AUX_PD; in exynos_dp_set_analog_power_down()
202 reg &= ~(CH0_PD); in exynos_dp_set_analog_power_down()
204 reg |= CH0_PD; in exynos_dp_set_analog_power_down()
207 reg &= ~(CH1_PD); in exynos_dp_set_analog_power_down()
209 reg |= CH1_PD; in exynos_dp_set_analog_power_down()
212 reg &= ~(CH2_PD); in exynos_dp_set_analog_power_down()
214 reg |= CH2_PD; in exynos_dp_set_analog_power_down()
217 reg &= ~(CH3_PD); in exynos_dp_set_analog_power_down()
219 reg |= CH3_PD; in exynos_dp_set_analog_power_down()
222 reg &= ~PHY_PD; in exynos_dp_set_analog_power_down()
224 reg |= PHY_PD; in exynos_dp_set_analog_power_down()
227 reg &= ~(PHY_PD | AUX_PD | CH0_PD | CH1_PD | CH2_PD | in exynos_dp_set_analog_power_down()
230 reg |= (PHY_PD | AUX_PD | CH0_PD | CH1_PD | in exynos_dp_set_analog_power_down()
238 writel(reg, &dp_regs->phy_pd); in exynos_dp_set_analog_power_down()
245 unsigned int reg; in exynos_dp_get_pll_lock_status() local
247 reg = readl(&dp_regs->debug_ctl); in exynos_dp_get_pll_lock_status()
249 if (reg & PLL_LOCK) in exynos_dp_get_pll_lock_status()
258 unsigned int reg; in exynos_dp_set_pll_power() local
260 reg = readl(&dp_regs->pll_ctl); in exynos_dp_set_pll_power()
261 reg &= ~(DP_PLL_PD); in exynos_dp_set_pll_power()
264 reg |= DP_PLL_PD; in exynos_dp_set_pll_power()
266 writel(reg, &dp_regs->pll_ctl); in exynos_dp_set_pll_power()
273 unsigned int reg; in exynos_dp_init_analog_func() local
278 reg = PLL_LOCK_CHG; in exynos_dp_init_analog_func()
279 writel(reg, &dp_regs->common_int_sta1); in exynos_dp_init_analog_func()
281 reg = readl(&dp_regs->debug_ctl); in exynos_dp_init_analog_func()
282 reg &= ~(F_PLL_LOCK | PLL_LOCK_CTRL); in exynos_dp_init_analog_func()
283 writel(reg, &dp_regs->debug_ctl); in exynos_dp_init_analog_func()
286 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
287 reg |= DP_PLL_RESET; in exynos_dp_init_analog_func()
288 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
293 reg = readl(&dp_regs->pll_ctl); in exynos_dp_init_analog_func()
294 reg &= ~(DP_PLL_RESET); in exynos_dp_init_analog_func()
295 writel(reg, &dp_regs->pll_ctl); in exynos_dp_init_analog_func()
312 reg = readl(&dp_regs->func_en2); in exynos_dp_init_analog_func()
313 reg &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N in exynos_dp_init_analog_func()
315 writel(reg, &dp_regs->func_en2); in exynos_dp_init_analog_func()
322 unsigned int reg; in exynos_dp_init_hpd() local
325 reg = HOTPLUG_CHG | HPD_LOST | PLUG; in exynos_dp_init_hpd()
326 writel(reg, &dp_regs->common_int_sta4); in exynos_dp_init_hpd()
328 reg = INT_HPD; in exynos_dp_init_hpd()
329 writel(reg, &dp_regs->int_sta); in exynos_dp_init_hpd()
331 reg = readl(&dp_regs->sys_ctl3); in exynos_dp_init_hpd()
332 reg &= ~(F_HPD | HPD_CTRL); in exynos_dp_init_hpd()
333 writel(reg, &dp_regs->sys_ctl3); in exynos_dp_init_hpd()
340 unsigned int reg; in exynos_dp_reset_aux() local
343 reg = readl(&dp_regs->func_en2); in exynos_dp_reset_aux()
344 reg |= AUX_FUNC_EN_N; in exynos_dp_reset_aux()
345 writel(reg, &dp_regs->func_en2); in exynos_dp_reset_aux()
352 unsigned int reg; in exynos_dp_init_aux() local
355 reg = RPLY_RECEIV | AUX_ERR; in exynos_dp_init_aux()
356 writel(reg, &dp_regs->int_sta); in exynos_dp_init_aux()
361 reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(3)| in exynos_dp_init_aux()
363 writel(reg, &dp_regs->aux_hw_retry_ctl); in exynos_dp_init_aux()
366 reg = DEFER_CTRL_EN | DEFER_COUNT(1); in exynos_dp_init_aux()
367 writel(reg, &dp_regs->aux_ch_defer_ctl); in exynos_dp_init_aux()
370 reg = readl(&dp_regs->func_en2); in exynos_dp_init_aux()
371 reg &= ~AUX_FUNC_EN_N; in exynos_dp_init_aux()
372 writel(reg, &dp_regs->func_en2); in exynos_dp_init_aux()
379 unsigned int reg; in exynos_dp_config_interrupt() local
382 reg = COMMON_INT_MASK_1; in exynos_dp_config_interrupt()
383 writel(reg, &dp_regs->common_int_mask1); in exynos_dp_config_interrupt()
385 reg = COMMON_INT_MASK_2; in exynos_dp_config_interrupt()
386 writel(reg, &dp_regs->common_int_mask2); in exynos_dp_config_interrupt()
388 reg = COMMON_INT_MASK_3; in exynos_dp_config_interrupt()
389 writel(reg, &dp_regs->common_int_mask3); in exynos_dp_config_interrupt()
391 reg = COMMON_INT_MASK_4; in exynos_dp_config_interrupt()
392 writel(reg, &dp_regs->common_int_mask4); in exynos_dp_config_interrupt()
394 reg = INT_STA_MASK; in exynos_dp_config_interrupt()
395 writel(reg, &dp_regs->int_sta_mask); in exynos_dp_config_interrupt()
402 unsigned int reg; in exynos_dp_get_plug_in_status() local
404 reg = readl(&dp_regs->sys_ctl3); in exynos_dp_get_plug_in_status()
405 if (reg & HPD_STATUS) in exynos_dp_get_plug_in_status()
429 unsigned int reg; in exynos_dp_start_aux_transaction() local
434 reg = readl(&dp_regs->aux_ch_ctl2); in exynos_dp_start_aux_transaction()
435 reg |= AUX_EN; in exynos_dp_start_aux_transaction()
436 writel(reg, &dp_regs->aux_ch_ctl2); in exynos_dp_start_aux_transaction()
440 reg = readl(&dp_regs->int_sta); in exynos_dp_start_aux_transaction()
441 if (!(reg & RPLY_RECEIV)) { in exynos_dp_start_aux_transaction()
454 writel(reg, &dp_regs->int_sta); in exynos_dp_start_aux_transaction()
457 reg = readl(&dp_regs->int_sta); in exynos_dp_start_aux_transaction()
458 if (reg & AUX_ERR) { in exynos_dp_start_aux_transaction()
466 reg = readl(&dp_regs->aux_ch_sta); in exynos_dp_start_aux_transaction()
467 if ((reg & AUX_STATUS_MASK) != 0) { in exynos_dp_start_aux_transaction()
468 debug("DP AUX CH error happens: %x\n", reg & AUX_STATUS_MASK); in exynos_dp_start_aux_transaction()
480 unsigned int reg, ret; in exynos_dp_write_byte_to_dpcd() local
483 reg = BUF_CLR; in exynos_dp_write_byte_to_dpcd()
484 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_write_byte_to_dpcd()
487 reg = AUX_ADDR_7_0(reg_addr); in exynos_dp_write_byte_to_dpcd()
488 writel(reg, &dp_regs->aux_addr_7_0); in exynos_dp_write_byte_to_dpcd()
489 reg = AUX_ADDR_15_8(reg_addr); in exynos_dp_write_byte_to_dpcd()
490 writel(reg, &dp_regs->aux_addr_15_8); in exynos_dp_write_byte_to_dpcd()
491 reg = AUX_ADDR_19_16(reg_addr); in exynos_dp_write_byte_to_dpcd()
492 writel(reg, &dp_regs->aux_addr_19_16); in exynos_dp_write_byte_to_dpcd()
495 reg = (unsigned int)data; in exynos_dp_write_byte_to_dpcd()
496 writel(reg, &dp_regs->buf_data0); in exynos_dp_write_byte_to_dpcd()
503 reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_WRITE; in exynos_dp_write_byte_to_dpcd()
504 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_write_byte_to_dpcd()
520 unsigned int reg; in exynos_dp_read_byte_from_dpcd() local
524 reg = BUF_CLR; in exynos_dp_read_byte_from_dpcd()
525 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_read_byte_from_dpcd()
528 reg = AUX_ADDR_7_0(reg_addr); in exynos_dp_read_byte_from_dpcd()
529 writel(reg, &dp_regs->aux_addr_7_0); in exynos_dp_read_byte_from_dpcd()
530 reg = AUX_ADDR_15_8(reg_addr); in exynos_dp_read_byte_from_dpcd()
531 writel(reg, &dp_regs->aux_addr_15_8); in exynos_dp_read_byte_from_dpcd()
532 reg = AUX_ADDR_19_16(reg_addr); in exynos_dp_read_byte_from_dpcd()
533 writel(reg, &dp_regs->aux_addr_19_16); in exynos_dp_read_byte_from_dpcd()
540 reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_READ; in exynos_dp_read_byte_from_dpcd()
541 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_read_byte_from_dpcd()
549 reg = readl(&dp_regs->buf_data0); in exynos_dp_read_byte_from_dpcd()
550 *data = (unsigned char)(reg & 0xff); in exynos_dp_read_byte_from_dpcd()
560 unsigned int reg; in exynos_dp_write_bytes_to_dpcd() local
568 reg = BUF_CLR; in exynos_dp_write_bytes_to_dpcd()
569 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_write_bytes_to_dpcd()
582 reg = AUX_ADDR_7_0(reg_addr + start_offset); in exynos_dp_write_bytes_to_dpcd()
583 writel(reg, &dp_regs->aux_addr_7_0); in exynos_dp_write_bytes_to_dpcd()
584 reg = AUX_ADDR_15_8(reg_addr + start_offset); in exynos_dp_write_bytes_to_dpcd()
585 writel(reg, &dp_regs->aux_addr_15_8); in exynos_dp_write_bytes_to_dpcd()
586 reg = AUX_ADDR_19_16(reg_addr + start_offset); in exynos_dp_write_bytes_to_dpcd()
587 writel(reg, &dp_regs->aux_addr_19_16); in exynos_dp_write_bytes_to_dpcd()
591 reg = data[start_offset + cur_data_idx]; in exynos_dp_write_bytes_to_dpcd()
592 writel(reg, (unsigned int)&dp_regs->buf_data0 + in exynos_dp_write_bytes_to_dpcd()
600 reg = AUX_LENGTH(cur_data_count) | in exynos_dp_write_bytes_to_dpcd()
602 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_write_bytes_to_dpcd()
626 unsigned int reg; in exynos_dp_read_bytes_from_dpcd() local
634 reg = BUF_CLR; in exynos_dp_read_bytes_from_dpcd()
635 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_read_bytes_from_dpcd()
648 reg = AUX_ADDR_7_0(reg_addr + start_offset); in exynos_dp_read_bytes_from_dpcd()
649 writel(reg, &dp_regs->aux_addr_7_0); in exynos_dp_read_bytes_from_dpcd()
650 reg = AUX_ADDR_15_8(reg_addr + start_offset); in exynos_dp_read_bytes_from_dpcd()
651 writel(reg, &dp_regs->aux_addr_15_8); in exynos_dp_read_bytes_from_dpcd()
652 reg = AUX_ADDR_19_16(reg_addr + start_offset); in exynos_dp_read_bytes_from_dpcd()
653 writel(reg, &dp_regs->aux_addr_19_16); in exynos_dp_read_bytes_from_dpcd()
659 reg = AUX_LENGTH(cur_data_count) | in exynos_dp_read_bytes_from_dpcd()
661 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_read_bytes_from_dpcd()
677 reg = readl((unsigned int)&dp_regs->buf_data0 + in exynos_dp_read_bytes_from_dpcd()
679 data[start_offset + cur_data_idx] = (unsigned char)reg; in exynos_dp_read_bytes_from_dpcd()
691 unsigned int reg; in exynos_dp_select_i2c_device() local
695 reg = device_addr; in exynos_dp_select_i2c_device()
696 writel(reg, &dp_regs->aux_addr_7_0); in exynos_dp_select_i2c_device()
708 reg = AUX_TX_COMM_I2C_TRANSACTION | AUX_TX_COMM_MOT | in exynos_dp_select_i2c_device()
710 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_select_i2c_device()
724 unsigned int reg; in exynos_dp_read_byte_from_i2c() local
730 reg = BUF_CLR; in exynos_dp_read_byte_from_i2c()
731 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_read_byte_from_i2c()
746 reg = AUX_TX_COMM_I2C_TRANSACTION | in exynos_dp_read_byte_from_i2c()
748 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_read_byte_from_i2c()
768 unsigned int reg; in exynos_dp_read_bytes_from_i2c() local
777 reg = BUF_CLR; in exynos_dp_read_bytes_from_i2c()
778 writel(reg, &dp_regs->buffer_data_ctl); in exynos_dp_read_bytes_from_i2c()
781 reg = readl(&dp_regs->aux_ch_ctl2); in exynos_dp_read_bytes_from_i2c()
782 reg &= ~ADDR_ONLY; in exynos_dp_read_bytes_from_i2c()
783 writel(reg, &dp_regs->aux_ch_ctl2); in exynos_dp_read_bytes_from_i2c()
801 reg = AUX_LENGTH(16) | in exynos_dp_read_bytes_from_i2c()
804 writel(reg, &dp_regs->aux_ch_ctl1); in exynos_dp_read_bytes_from_i2c()
815 reg = readl(&dp_regs->aux_rx_comm); in exynos_dp_read_bytes_from_i2c()
816 if (reg == AUX_RX_COMM_AUX_DEFER || in exynos_dp_read_bytes_from_i2c()
817 reg == AUX_RX_COMM_I2C_DEFER) { in exynos_dp_read_bytes_from_i2c()
818 printf("DP Defer: %d\n", reg); in exynos_dp_read_bytes_from_i2c()
824 reg = readl((unsigned int)&dp_regs->buf_data0 in exynos_dp_read_bytes_from_i2c()
826 edid[i + cur_data_idx] = (unsigned char)reg; in exynos_dp_read_bytes_from_i2c()
835 unsigned int reg; in exynos_dp_reset_macro() local
837 reg = readl(&dp_regs->phy_test); in exynos_dp_reset_macro()
838 reg |= MACRO_RST; in exynos_dp_reset_macro()
839 writel(reg, &dp_regs->phy_test); in exynos_dp_reset_macro()
844 reg &= ~MACRO_RST; in exynos_dp_reset_macro()
845 writel(reg, &dp_regs->phy_test); in exynos_dp_reset_macro()
851 unsigned int reg; in exynos_dp_set_link_bandwidth() local
853 reg = (unsigned int)bwtype; in exynos_dp_set_link_bandwidth()
857 writel(reg, &dp_regs->link_bw_set); in exynos_dp_set_link_bandwidth()
863 unsigned int reg; in exynos_dp_get_link_bandwidth() local
865 reg = readl(&dp_regs->link_bw_set); in exynos_dp_get_link_bandwidth()
866 ret = (unsigned char)reg; in exynos_dp_get_link_bandwidth()
873 unsigned int reg; in exynos_dp_set_lane_count() local
875 reg = (unsigned int)count; in exynos_dp_set_lane_count()
879 writel(reg, &dp_regs->lane_count_set); in exynos_dp_set_lane_count()
918 unsigned int reg; in exynos_dp_set_lane_pre_emphasis() local
933 reg = level << reg_shift[i]; in exynos_dp_set_lane_pre_emphasis()
934 writel(reg, reg_list[i]); in exynos_dp_set_lane_pre_emphasis()
941 unsigned int reg = 0; in exynos_dp_set_training_pattern() local
945 reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_PRBS7; in exynos_dp_set_training_pattern()
948 reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_D10_2; in exynos_dp_set_training_pattern()
951 reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN1; in exynos_dp_set_training_pattern()
954 reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN2; in exynos_dp_set_training_pattern()
957 reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_DISABLE | in exynos_dp_set_training_pattern()
964 writel(reg, &dp_regs->training_ptn_set); in exynos_dp_set_training_pattern()
970 unsigned int reg; in exynos_dp_enable_enhanced_mode() local
972 reg = readl(&dp_regs->sys_ctl4); in exynos_dp_enable_enhanced_mode()
973 reg &= ~ENHANCED; in exynos_dp_enable_enhanced_mode()
976 reg |= ENHANCED; in exynos_dp_enable_enhanced_mode()
978 writel(reg, &dp_regs->sys_ctl4); in exynos_dp_enable_enhanced_mode()
983 unsigned int reg; in exynos_dp_enable_scrambling() local
985 reg = readl(&dp_regs->training_ptn_set); in exynos_dp_enable_scrambling()
986 reg &= ~(SCRAMBLING_DISABLE); in exynos_dp_enable_scrambling()
989 reg |= SCRAMBLING_DISABLE; in exynos_dp_enable_scrambling()
991 writel(reg, &dp_regs->training_ptn_set); in exynos_dp_enable_scrambling()
996 unsigned int reg; in exynos_dp_init_video() local
999 reg = VSYNC_DET | VID_FORMAT_CHG | VID_CLK_CHG; in exynos_dp_init_video()
1000 writel(reg, &dp_regs->common_int_sta1); in exynos_dp_init_video()
1003 reg &= ~DET_CTRL; in exynos_dp_init_video()
1004 writel(reg, &dp_regs->sys_ctl1); in exynos_dp_init_video()
1012 unsigned int reg; in exynos_dp_config_video_slave_mode() local
1015 reg = readl(&dp_regs->func_en1); in exynos_dp_config_video_slave_mode()
1016 reg &= ~(MASTER_VID_FUNC_EN_N|SLAVE_VID_FUNC_EN_N); in exynos_dp_config_video_slave_mode()
1017 reg |= MASTER_VID_FUNC_EN_N; in exynos_dp_config_video_slave_mode()
1018 writel(reg, &dp_regs->func_en1); in exynos_dp_config_video_slave_mode()
1021 reg = readl(&dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1022 reg &= ~INTERACE_SCAN_CFG; in exynos_dp_config_video_slave_mode()
1023 reg |= (video_info->interlaced << INTERACE_SCAN_CFG_SHIFT); in exynos_dp_config_video_slave_mode()
1024 writel(reg, &dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1027 reg = readl(&dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1028 reg &= ~VSYNC_POLARITY_CFG; in exynos_dp_config_video_slave_mode()
1029 reg |= (video_info->v_sync_polarity << V_S_POLARITY_CFG_SHIFT); in exynos_dp_config_video_slave_mode()
1030 writel(reg, &dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1033 reg = readl(&dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1034 reg &= ~HSYNC_POLARITY_CFG; in exynos_dp_config_video_slave_mode()
1035 reg |= (video_info->h_sync_polarity << H_S_POLARITY_CFG_SHIFT); in exynos_dp_config_video_slave_mode()
1036 writel(reg, &dp_regs->video_ctl10); in exynos_dp_config_video_slave_mode()
1039 reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE; in exynos_dp_config_video_slave_mode()
1040 writel(reg, &dp_regs->soc_general_ctl); in exynos_dp_config_video_slave_mode()
1046 unsigned int reg; in exynos_dp_set_video_color_format() local
1049 reg = (video_info->dynamic_range << IN_D_RANGE_SHIFT) | in exynos_dp_set_video_color_format()
1052 writel(reg, &dp_regs->video_ctl2); in exynos_dp_set_video_color_format()
1055 reg = readl(&dp_regs->video_ctl3); in exynos_dp_set_video_color_format()
1056 reg &= ~IN_YC_COEFFI_MASK; in exynos_dp_set_video_color_format()
1058 reg |= IN_YC_COEFFI_ITU709; in exynos_dp_set_video_color_format()
1060 reg |= IN_YC_COEFFI_ITU601; in exynos_dp_set_video_color_format()
1061 writel(reg, &dp_regs->video_ctl3); in exynos_dp_set_video_color_format()
1067 unsigned int reg; in exynos_dp_config_video_bist() local
1110 reg = (video_info.interlaced << INTERACE_SCAN_CFG_SHIFT | in exynos_dp_config_video_bist()
1113 writel(reg, &dp_regs->video_ctl10); in exynos_dp_config_video_bist()
1146 reg = bist_type; in exynos_dp_config_video_bist()
1147 writel(reg, &dp_regs->video_ctl4); in exynos_dp_config_video_bist()
1154 unsigned int reg; in exynos_dp_is_slave_video_stream_clock_on() local
1157 reg = readl(&dp_regs->sys_ctl1); in exynos_dp_is_slave_video_stream_clock_on()
1158 writel(reg, &dp_regs->sys_ctl1); in exynos_dp_is_slave_video_stream_clock_on()
1160 reg = readl(&dp_regs->sys_ctl1); in exynos_dp_is_slave_video_stream_clock_on()
1162 if (!(reg & DET_STA)) { in exynos_dp_is_slave_video_stream_clock_on()
1173 unsigned int reg; in exynos_dp_set_video_cr_mn() local
1176 reg = readl(&dp_regs->sys_ctl4); in exynos_dp_set_video_cr_mn()
1177 reg |= FIX_M_VID; in exynos_dp_set_video_cr_mn()
1178 writel(reg, &dp_regs->sys_ctl4); in exynos_dp_set_video_cr_mn()
1179 reg = M_VID0_CFG(m_value); in exynos_dp_set_video_cr_mn()
1180 writel(reg, &dp_regs->m_vid0); in exynos_dp_set_video_cr_mn()
1181 reg = M_VID1_CFG(m_value); in exynos_dp_set_video_cr_mn()
1182 writel(reg, &dp_regs->m_vid1); in exynos_dp_set_video_cr_mn()
1183 reg = M_VID2_CFG(m_value); in exynos_dp_set_video_cr_mn()
1184 writel(reg, &dp_regs->m_vid2); in exynos_dp_set_video_cr_mn()
1186 reg = N_VID0_CFG(n_value); in exynos_dp_set_video_cr_mn()
1187 writel(reg, &dp_regs->n_vid0); in exynos_dp_set_video_cr_mn()
1188 reg = N_VID1_CFG(n_value); in exynos_dp_set_video_cr_mn()
1189 writel(reg, &dp_regs->n_vid1); in exynos_dp_set_video_cr_mn()
1190 reg = N_VID2_CFG(n_value); in exynos_dp_set_video_cr_mn()
1191 writel(reg, &dp_regs->n_vid2); in exynos_dp_set_video_cr_mn()
1193 reg = readl(&dp_regs->sys_ctl4); in exynos_dp_set_video_cr_mn()
1194 reg &= ~FIX_M_VID; in exynos_dp_set_video_cr_mn()
1195 writel(reg, &dp_regs->sys_ctl4); in exynos_dp_set_video_cr_mn()
1202 unsigned int reg; in exynos_dp_set_video_timing_mode() local
1204 reg = readl(&dp_regs->video_ctl10); in exynos_dp_set_video_timing_mode()
1205 reg &= ~FORMAT_SEL; in exynos_dp_set_video_timing_mode()
1208 reg |= FORMAT_SEL; in exynos_dp_set_video_timing_mode()
1210 writel(reg, &dp_regs->video_ctl10); in exynos_dp_set_video_timing_mode()
1216 unsigned int reg; in exynos_dp_enable_video_master() local
1218 reg = readl(&dp_regs->soc_general_ctl); in exynos_dp_enable_video_master()
1220 reg &= ~VIDEO_MODE_MASK; in exynos_dp_enable_video_master()
1221 reg |= VIDEO_MASTER_MODE_EN | VIDEO_MODE_MASTER_MODE; in exynos_dp_enable_video_master()
1223 reg &= ~VIDEO_MODE_MASK; in exynos_dp_enable_video_master()
1224 reg |= VIDEO_MODE_SLAVE_MODE; in exynos_dp_enable_video_master()
1227 writel(reg, &dp_regs->soc_general_ctl); in exynos_dp_enable_video_master()
1232 unsigned int reg; in exynos_dp_start_video() local
1235 reg = readl(&dp_regs->video_ctl1); in exynos_dp_start_video()
1236 reg |= VIDEO_EN; in exynos_dp_start_video()
1237 writel(reg, &dp_regs->video_ctl1); in exynos_dp_start_video()
1242 unsigned int reg; in exynos_dp_is_video_stream_on() local
1245 reg = readl(&dp_regs->sys_ctl3); in exynos_dp_is_video_stream_on()
1246 writel(reg, &dp_regs->sys_ctl3); in exynos_dp_is_video_stream_on()
1248 reg = readl(&dp_regs->sys_ctl3); in exynos_dp_is_video_stream_on()
1249 if (!(reg & STRM_VALID)) in exynos_dp_is_video_stream_on()