388 	unsigned char lane_stat[DP_LANE_CNT_4] = {0,};  in exynos_dp_read_dpcd_lane_stat()  local
404 		lane_stat[i] = (buf[(i / 2)] >> shift_val[i]) & 0x0f;  in exynos_dp_read_dpcd_lane_stat()
405 		if (lane_stat[0] != lane_stat[i]) {  in exynos_dp_read_dpcd_lane_stat()
411 	*status = lane_stat[0];  in exynos_dp_read_dpcd_lane_stat()
488 	unsigned char lane_stat;  in exynos_dp_process_clock_recovery()  local
498 	ret = exynos_dp_read_dpcd_lane_stat(regs, priv, &lane_stat);  in exynos_dp_process_clock_recovery()
505 	if (lane_stat & DP_LANE_STAT_CR_DONE) {  in exynos_dp_process_clock_recovery()
598 	unsigned char lane_stat, adj_req_sw, adj_req_em, i;  in exynos_dp_process_equalizer_training()  local
607 	ret = exynos_dp_read_dpcd_lane_stat(regs, priv, &lane_stat);  in exynos_dp_process_equalizer_training()
614 	debug("DP lane stat : %x\n", lane_stat);  in exynos_dp_process_equalizer_training()
616 	if (lane_stat & DP_LANE_STAT_CR_DONE) {  in exynos_dp_process_equalizer_training()
648 		if (((lane_stat&DP_LANE_STAT_CE_DONE) &&  in exynos_dp_process_equalizer_training()
649 			(lane_stat&DP_LANE_STAT_SYM_LOCK))  in exynos_dp_process_equalizer_training()