2617 	unsigned long dclk_rate = v_pixclk;  in vop2_calc_cru_cfg()  local
2642 			dclk_rate = dclk_rate >> 1;  in vop2_calc_cru_cfg()
2654 			dclk_rate = vop2_calc_dclk(dclk_core_rate,  in vop2_calc_cru_cfg()
2657 		if (!dclk_rate) {  in vop2_calc_cru_cfg()
2662 		*if_pixclk_div = dclk_rate / if_pixclk_rate;  in vop2_calc_cru_cfg()
2663 		*if_dclk_div = dclk_rate / if_dclk_rate;  in vop2_calc_cru_cfg()
2664 		*dclk_core_div = dclk_rate / dclk_core_rate;  in vop2_calc_cru_cfg()
2666 		       dclk_rate, *if_pixclk_div, *if_dclk_div);  in vop2_calc_cru_cfg()
2671 		dclk_rate = if_pixclk_rate * K;  in vop2_calc_cru_cfg()
2672 		*dclk_core_div = dclk_rate / dclk_core_rate;  in vop2_calc_cru_cfg()
2673 		*if_pixclk_div = dclk_rate / if_pixclk_rate;  in vop2_calc_cru_cfg()
2679 		dclk_rate = vop2_calc_dclk(dclk_out_rate,  in vop2_calc_cru_cfg()
2681 		if (!dclk_rate) {  in vop2_calc_cru_cfg()
2686 		*dclk_out_div = dclk_rate / dclk_out_rate;  in vop2_calc_cru_cfg()
2687 		*dclk_core_div = dclk_rate / dclk_core_rate;  in vop2_calc_cru_cfg()
2699 		dclk_rate = vop2_calc_dclk(dclk_out_rate,  in vop2_calc_cru_cfg()
2701 		if (!dclk_rate) {  in vop2_calc_cru_cfg()
2703 			       vop2->data->vp_data[cstate->crtc_id].max_dclk, dclk_rate);  in vop2_calc_cru_cfg()
2708 			dclk_rate /= cstate->dsc_slice_num;  in vop2_calc_cru_cfg()
2710 		*dclk_out_div = dclk_rate / dclk_out_rate;  in vop2_calc_cru_cfg()
2711 		*dclk_core_div = dclk_rate / dclk_core_rate;  in vop2_calc_cru_cfg()
2717 		dclk_rate = v_pixclk;  in vop2_calc_cru_cfg()
2718 		*dclk_core_div = dclk_rate / dclk_core_rate;  in vop2_calc_cru_cfg()
2726 	return dclk_rate;  in vop2_calc_cru_cfg()
2770 	unsigned long dclk_rate;  in rk3588_vop2_if_cfg()  local
2802 …dclk_rate = vop2_calc_cru_cfg(state, &cstate->dclk_core_div, &cstate->dclk_out_div, &if_pixclk_div…  in rk3588_vop2_if_cfg()
2987 	return dclk_rate;  in rk3588_vop2_if_cfg()
3257 				  int *dsc_cds_clk_div, u64 dclk_rate)  in vop2_calc_dsc_cru_cfg()  argument
3261 	*dsc_txp_clk_div = dclk_rate / cstate->dsc_txp_clk_rate;  in vop2_calc_dsc_cru_cfg()
3262 	*dsc_pxl_clk_div = dclk_rate / cstate->dsc_pxl_clk_rate;  in vop2_calc_dsc_cru_cfg()
3263 	*dsc_cds_clk_div = dclk_rate / cstate->dsc_cds_clk_rate;  in vop2_calc_dsc_cru_cfg()
3302 …atic void vop2_dsc_enable(struct display_state *state, struct vop2 *vop2, u8 dsc_id, u64 dclk_rate)  in vop2_dsc_enable()  argument
3363 	vop2_calc_dsc_cru_cfg(state, &dsc_txp_clk_div, &dsc_pxl_clk_div, &dsc_cds_clk_div, dclk_rate);  in vop2_dsc_enable()
3682 	unsigned long dclk_rate = 0;  in rockchip_vop2_init()  local
3712 		dclk_rate = rk3588_vop2_if_cfg(state);  in rockchip_vop2_init()
3714 		dclk_rate = rk3568_vop2_if_cfg(state);  in rockchip_vop2_init()
3716 		dclk_rate = rk3528_vop2_if_cfg(state);  in rockchip_vop2_init()
3718 		dclk_rate = rk3562_vop2_if_cfg(state);  in rockchip_vop2_init()
3859 			vop2_dsc_enable(state, vop2, 0, dclk_rate * 1000LL);  in rockchip_vop2_init()
3860 			vop2_dsc_enable(state, vop2, 1, dclk_rate * 1000LL);  in rockchip_vop2_init()
3862 			vop2_dsc_enable(state, vop2, cstate->dsc_id, dclk_rate * 1000LL);  in rockchip_vop2_init()
3918 			ret = vop2_clk_set_rate(&hdmi0_phy_pll, dclk_rate * 1000);  in rockchip_vop2_init()
3920 			ret = vop2_clk_set_rate(&hdmi1_phy_pll, dclk_rate * 1000);  in rockchip_vop2_init()
3923 				ret = vop2_clk_set_rate(&hdmi_phy_pll, dclk_rate * 1000);  in rockchip_vop2_init()
3926 				ret = vop2_clk_set_rate(&cstate->dclk, dclk_rate * 1000);  in rockchip_vop2_init()
3933 					rockchip_phy_set_pll(conn_state->connector->phy, dclk_rate * 1000);  in rockchip_vop2_init()
3934 					ret = dclk_rate * 1000;  in rockchip_vop2_init()
3941 			ret = vop2_clk_set_rate(&hdmi_phy_pll, dclk_rate * 1000);  in rockchip_vop2_init()
3943 			ret = vop2_clk_set_rate(&cstate->dclk, dclk_rate * 1000);  in rockchip_vop2_init()
3948 		       __func__, cstate->crtc_id, dclk_rate, ret);  in rockchip_vop2_init()
3951 		dclk_div_factor = mode->clock / dclk_rate;  in rockchip_vop2_init()