Lines Matching +full:rockchip +full:- +full:vop
2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0+
16 #include <linux/media-bus-format.h>
31 return us * mode->clock / mode->htotal / 1000; in us_to_vertical_line()
34 static inline void set_vop_mcu_rs(struct vop *vop, int v) in set_vop_mcu_rs() argument
36 if (dm_gpio_is_valid(&vop->mcu_rs_gpio)) in set_vop_mcu_rs()
37 dm_gpio_set_value(&vop->mcu_rs_gpio, v); in set_vop_mcu_rs()
39 VOP_CTRL_SET(vop, mcu_rs, v); in set_vop_mcu_rs()
113 static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state) in rockchip_vop_init_gamma() argument
115 struct crtc_state *crtc_state = &state->crtc_state; in rockchip_vop_init_gamma()
116 struct connector_state *conn_state = &state->conn_state; in rockchip_vop_init_gamma()
117 u32 *lut = conn_state->gamma.lut; in rockchip_vop_init_gamma()
122 if (!conn_state->gamma.lut) in rockchip_vop_init_gamma()
125 i = dev_read_stringlist_search(crtc_state->dev, "reg-names", "gamma_lut"); in rockchip_vop_init_gamma()
127 printf("Warning: vop not support gamma\n"); in rockchip_vop_init_gamma()
130 lut_regs = (u32 *)dev_read_addr_size(crtc_state->dev, "reg", &lut_size); in rockchip_vop_init_gamma()
141 if (conn_state->gamma.size != lut_len) { in rockchip_vop_init_gamma()
142 int size = conn_state->gamma.size; in rockchip_vop_init_gamma()
159 VOP_CTRL_SET(vop, dsp_lut_en, 1); in rockchip_vop_init_gamma()
160 VOP_CTRL_SET(vop, update_gamma_lut, 1); in rockchip_vop_init_gamma()
165 static void vop_post_config(struct display_state *state, struct vop *vop) in vop_post_config() argument
167 struct connector_state *conn_state = &state->conn_state; in vop_post_config()
168 struct drm_display_mode *mode = &conn_state->mode; in vop_post_config()
169 u16 vtotal = mode->crtc_vtotal; in vop_post_config()
170 u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start; in vop_post_config()
171 u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start; in vop_post_config()
172 u16 hdisplay = mode->crtc_hdisplay; in vop_post_config()
173 u16 vdisplay = mode->crtc_vdisplay; in vop_post_config()
174 …u16 hsize = hdisplay * (conn_state->overscan.left_margin + conn_state->overscan.right_margin) / 20… in vop_post_config()
175 …u16 vsize = vdisplay * (conn_state->overscan.top_margin + conn_state->overscan.bottom_margin) / 20… in vop_post_config()
179 if (mode->flags & DRM_MODE_FLAG_INTERLACE) in vop_post_config()
182 hact_st += hdisplay * (100 - conn_state->overscan.left_margin) / 200; in vop_post_config()
187 VOP_CTRL_SET(vop, hpost_st_end, val); in vop_post_config()
188 vact_st += vdisplay * (100 - conn_state->overscan.top_margin) / 200; in vop_post_config()
192 VOP_CTRL_SET(vop, vpost_st_end, val); in vop_post_config()
195 VOP_CTRL_SET(vop, post_scl_factor, val); in vop_post_config()
198 VOP_CTRL_SET(vop, post_scl_ctrl, in vop_post_config()
201 if (mode->flags & DRM_MODE_FLAG_INTERLACE) { in vop_post_config()
206 VOP_CTRL_SET(vop, vpost_st_end_f1, val); in vop_post_config()
210 static void vop_mcu_mode(struct display_state *state, struct vop *vop) in vop_mcu_mode() argument
212 struct crtc_state *crtc_state = &state->crtc_state; in vop_mcu_mode()
214 VOP_CTRL_SET(vop, mcu_clk_sel, 1); in vop_mcu_mode()
215 VOP_CTRL_SET(vop, mcu_type, 1); in vop_mcu_mode()
217 VOP_CTRL_SET(vop, mcu_hold_mode, 1); in vop_mcu_mode()
218 VOP_CTRL_SET(vop, mcu_pix_total, crtc_state->mcu_timing.mcu_pix_total); in vop_mcu_mode()
219 VOP_CTRL_SET(vop, mcu_cs_pst, crtc_state->mcu_timing.mcu_cs_pst); in vop_mcu_mode()
220 VOP_CTRL_SET(vop, mcu_cs_pend, crtc_state->mcu_timing.mcu_cs_pend); in vop_mcu_mode()
221 VOP_CTRL_SET(vop, mcu_rw_pst, crtc_state->mcu_timing.mcu_rw_pst); in vop_mcu_mode()
222 VOP_CTRL_SET(vop, mcu_rw_pend, crtc_state->mcu_timing.mcu_rw_pend); in vop_mcu_mode()
227 const struct vop_data *vop_data = state->crtc_state.crtc->data; in rockchip_vop_preinit()
229 state->crtc_state.max_output = vop_data->max_output; in rockchip_vop_preinit()
236 struct crtc_state *crtc_state = &state->crtc_state; in rockchip_vop_init()
237 struct connector_state *conn_state = &state->conn_state; in rockchip_vop_init()
238 struct drm_display_mode *mode = &conn_state->mode; in rockchip_vop_init()
239 const struct rockchip_crtc *crtc = crtc_state->crtc; in rockchip_vop_init()
240 const struct vop_data *vop_data = crtc->data; in rockchip_vop_init()
241 struct vop *vop; in rockchip_vop_init() local
242 u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; in rockchip_vop_init()
243 u16 hdisplay = mode->crtc_hdisplay; in rockchip_vop_init()
244 u16 htotal = mode->crtc_htotal; in rockchip_vop_init()
245 u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start; in rockchip_vop_init()
247 u16 vdisplay = mode->crtc_vdisplay; in rockchip_vop_init()
248 u16 vtotal = mode->crtc_vtotal; in rockchip_vop_init()
249 u16 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; in rockchip_vop_init()
250 u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start; in rockchip_vop_init()
259 vop = malloc(sizeof(*vop)); in rockchip_vop_init()
260 if (!vop) in rockchip_vop_init()
261 return -ENOMEM; in rockchip_vop_init()
262 memset(vop, 0, sizeof(*vop)); in rockchip_vop_init()
264 crtc_state->private = vop; in rockchip_vop_init()
265 vop->regs = dev_read_addr_ptr(crtc_state->dev); in rockchip_vop_init()
266 vop->regsbak = malloc(vop_data->reg_len); in rockchip_vop_init()
267 vop->win = vop_data->win; in rockchip_vop_init()
268 vop->win_offset = vop_data->win_offset; in rockchip_vop_init()
269 vop->ctrl = vop_data->ctrl; in rockchip_vop_init()
270 vop->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rockchip_vop_init()
271 if (vop->grf <= 0) in rockchip_vop_init()
273 __func__, vop->grf); in rockchip_vop_init()
275 vop->grf_ctrl = vop_data->grf_ctrl; in rockchip_vop_init()
276 vop->line_flag = vop_data->line_flag; in rockchip_vop_init()
277 vop->csc_table = vop_data->csc_table; in rockchip_vop_init()
278 vop->win_csc = vop_data->win_csc; in rockchip_vop_init()
279 vop->version = vop_data->version; in rockchip_vop_init()
281 /* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */ in rockchip_vop_init()
282 ret = clk_set_defaults(crtc_state->dev); in rockchip_vop_init()
286 ret = clk_get_by_name(crtc_state->dev, "dclk_vop", &dclk); in rockchip_vop_init()
288 ret = clk_set_rate(&dclk, mode->clock * 1000); in rockchip_vop_init()
294 memcpy(vop->regsbak, vop->regs, vop_data->reg_len); in rockchip_vop_init()
296 rockchip_vop_init_gamma(vop, state); in rockchip_vop_init()
298 ret = gpio_request_by_name(crtc_state->dev, "mcu-rs-gpios", in rockchip_vop_init()
299 0, &vop->mcu_rs_gpio, GPIOD_IS_OUT); in rockchip_vop_init()
300 if (ret && ret != -ENOENT) in rockchip_vop_init()
303 VOP_CTRL_SET(vop, global_regdone_en, 1); in rockchip_vop_init()
304 VOP_CTRL_SET(vop, axi_outstanding_max_num, 30); in rockchip_vop_init()
305 VOP_CTRL_SET(vop, axi_max_outstanding_en, 1); in rockchip_vop_init()
306 VOP_CTRL_SET(vop, reg_done_frm, 1); in rockchip_vop_init()
307 VOP_CTRL_SET(vop, win_gate[0], 1); in rockchip_vop_init()
308 VOP_CTRL_SET(vop, win_gate[1], 1); in rockchip_vop_init()
309 VOP_CTRL_SET(vop, win_channel[0], 0x12); in rockchip_vop_init()
310 VOP_CTRL_SET(vop, win_channel[1], 0x34); in rockchip_vop_init()
311 VOP_CTRL_SET(vop, win_channel[2], 0x56); in rockchip_vop_init()
312 VOP_CTRL_SET(vop, dsp_blank, 0); in rockchip_vop_init()
314 dclk_inv = (conn_state->bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) ? 1 : 0; in rockchip_vop_init()
316 if ((VOP_MAJOR(vop->version) == 2 && VOP_MINOR(vop->version) == 12)) in rockchip_vop_init()
318 VOP_CTRL_SET(vop, dclk_pol, dclk_inv); in rockchip_vop_init()
321 val |= (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1; in rockchip_vop_init()
322 val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1); in rockchip_vop_init()
323 VOP_CTRL_SET(vop, pin_pol, val); in rockchip_vop_init()
325 switch (conn_state->type) { in rockchip_vop_init()
327 VOP_CTRL_SET(vop, rgb_en, 1); in rockchip_vop_init()
328 VOP_CTRL_SET(vop, rgb_pin_pol, val); in rockchip_vop_init()
329 VOP_CTRL_SET(vop, rgb_dclk_pol, dclk_inv); in rockchip_vop_init()
330 VOP_CTRL_SET(vop, lvds_en, 1); in rockchip_vop_init()
331 VOP_CTRL_SET(vop, lvds_pin_pol, val); in rockchip_vop_init()
332 VOP_CTRL_SET(vop, lvds_dclk_pol, dclk_inv); in rockchip_vop_init()
333 if (!IS_ERR_OR_NULL(vop->grf)) in rockchip_vop_init()
334 VOP_GRF_SET(vop, grf_dclk_inv, dclk_inv); in rockchip_vop_init()
337 VOP_CTRL_SET(vop, edp_en, 1); in rockchip_vop_init()
338 VOP_CTRL_SET(vop, edp_pin_pol, val); in rockchip_vop_init()
339 VOP_CTRL_SET(vop, edp_dclk_pol, dclk_inv); in rockchip_vop_init()
342 VOP_CTRL_SET(vop, hdmi_en, 1); in rockchip_vop_init()
343 VOP_CTRL_SET(vop, hdmi_pin_pol, val); in rockchip_vop_init()
344 VOP_CTRL_SET(vop, hdmi_dclk_pol, 1); in rockchip_vop_init()
347 VOP_CTRL_SET(vop, mipi_en, 1); in rockchip_vop_init()
348 VOP_CTRL_SET(vop, mipi_pin_pol, val); in rockchip_vop_init()
349 VOP_CTRL_SET(vop, mipi_dclk_pol, dclk_inv); in rockchip_vop_init()
350 VOP_CTRL_SET(vop, mipi_dual_channel_en, in rockchip_vop_init()
351 !!(conn_state->output_flags & ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE)); in rockchip_vop_init()
352 VOP_CTRL_SET(vop, data01_swap, in rockchip_vop_init()
353 !!(conn_state->output_flags & ROCKCHIP_OUTPUT_DATA_SWAP) || in rockchip_vop_init()
354 crtc_state->dual_channel_swap); in rockchip_vop_init()
357 VOP_CTRL_SET(vop, dp_dclk_pol, 0); in rockchip_vop_init()
358 VOP_CTRL_SET(vop, dp_pin_pol, val); in rockchip_vop_init()
359 VOP_CTRL_SET(vop, dp_en, 1); in rockchip_vop_init()
363 VOP_CTRL_SET(vop, tve_sw_mode, 1); in rockchip_vop_init()
365 VOP_CTRL_SET(vop, tve_sw_mode, 0); in rockchip_vop_init()
366 VOP_CTRL_SET(vop, tve_dclk_pol, 1); in rockchip_vop_init()
367 VOP_CTRL_SET(vop, tve_dclk_en, 1); in rockchip_vop_init()
369 VOP_CTRL_SET(vop, hdmi_pin_pol, val); in rockchip_vop_init()
370 VOP_CTRL_SET(vop, sw_genlock, 1); in rockchip_vop_init()
371 VOP_CTRL_SET(vop, sw_uv_offset_en, 1); in rockchip_vop_init()
372 VOP_CTRL_SET(vop, dither_up, 1); in rockchip_vop_init()
375 printf("unsupport connector_type[%d]\n", conn_state->type); in rockchip_vop_init()
378 if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA && in rockchip_vop_init()
379 !(vop_data->feature & VOP_FEATURE_OUTPUT_10BIT)) in rockchip_vop_init()
380 conn_state->output_mode = ROCKCHIP_OUT_MODE_P888; in rockchip_vop_init()
382 switch (conn_state->bus_format) { in rockchip_vop_init()
407 if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA) in rockchip_vop_init()
412 VOP_CTRL_SET(vop, dither_down, val); in rockchip_vop_init()
414 VOP_CTRL_SET(vop, dclk_ddr, in rockchip_vop_init()
415 conn_state->output_mode == ROCKCHIP_OUT_MODE_YUV420 ? 1 : 0); in rockchip_vop_init()
416 VOP_CTRL_SET(vop, hdmi_dclk_out_en, in rockchip_vop_init()
417 conn_state->output_mode == ROCKCHIP_OUT_MODE_YUV420 ? 1 : 0); in rockchip_vop_init()
419 if (is_uv_swap(conn_state->bus_format, conn_state->output_mode) || in rockchip_vop_init()
420 is_rb_swap(conn_state->bus_format, conn_state->output_mode)) in rockchip_vop_init()
421 VOP_CTRL_SET(vop, dsp_rb_swap, 1); in rockchip_vop_init()
423 VOP_CTRL_SET(vop, dsp_data_swap, 0); in rockchip_vop_init()
425 VOP_CTRL_SET(vop, out_mode, conn_state->output_mode); in rockchip_vop_init()
427 if (VOP_CTRL_SUPPORT(vop, overlay_mode)) { in rockchip_vop_init()
428 yuv_overlay = is_yuv_output(conn_state->bus_format); in rockchip_vop_init()
429 VOP_CTRL_SET(vop, overlay_mode, yuv_overlay); in rockchip_vop_init()
434 VOP_CTRL_SET(vop, dsp_out_yuv, is_yuv_output(conn_state->bus_format)); in rockchip_vop_init()
437 if (!is_yuv_output(conn_state->bus_format)) in rockchip_vop_init()
440 if (is_yuv_output(conn_state->bus_format)) in rockchip_vop_init()
444 crtc_state->yuv_overlay = yuv_overlay; in rockchip_vop_init()
445 post_csc_mode = to_vop_csc_mode(conn_state->color_space); in rockchip_vop_init()
446 VOP_CTRL_SET(vop, bcsh_r2y_en, post_r2y_en); in rockchip_vop_init()
447 VOP_CTRL_SET(vop, bcsh_y2r_en, post_y2r_en); in rockchip_vop_init()
448 VOP_CTRL_SET(vop, bcsh_r2y_csc_mode, post_csc_mode); in rockchip_vop_init()
449 VOP_CTRL_SET(vop, bcsh_y2r_csc_mode, post_csc_mode); in rockchip_vop_init()
452 * Background color is 10bit depth if vop version >= 3.5 in rockchip_vop_init()
454 if (!is_yuv_output(conn_state->bus_format)) in rockchip_vop_init()
456 else if (VOP_MAJOR(vop->version) == 3 && in rockchip_vop_init()
457 VOP_MINOR(vop->version) >= 5) in rockchip_vop_init()
461 VOP_CTRL_SET(vop, dsp_background, val); in rockchip_vop_init()
463 VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len); in rockchip_vop_init()
466 VOP_CTRL_SET(vop, hact_st_end, val); in rockchip_vop_init()
469 VOP_CTRL_SET(vop, vact_st_end, val); in rockchip_vop_init()
470 if (mode->flags & DRM_MODE_FLAG_INTERLACE) { in rockchip_vop_init()
475 VOP_CTRL_SET(vop, vact_st_end_f1, val); in rockchip_vop_init()
478 VOP_CTRL_SET(vop, vs_st_end_f1, val); in rockchip_vop_init()
479 VOP_CTRL_SET(vop, dsp_interlace, 1); in rockchip_vop_init()
480 VOP_CTRL_SET(vop, p2i_en, 1); in rockchip_vop_init()
484 VOP_CTRL_SET(vop, dsp_interlace, 0); in rockchip_vop_init()
485 VOP_CTRL_SET(vop, p2i_en, 0); in rockchip_vop_init()
488 VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len); in rockchip_vop_init()
489 vop_post_config(state, vop); in rockchip_vop_init()
490 VOP_CTRL_SET(vop, core_dclk_div, in rockchip_vop_init()
491 !!(mode->flags & DRM_MODE_FLAG_DBLCLK)); in rockchip_vop_init()
493 VOP_LINE_FLAG_SET(vop, line_flag_num[0], act_end - 3); in rockchip_vop_init()
494 VOP_LINE_FLAG_SET(vop, line_flag_num[1], in rockchip_vop_init()
495 act_end - us_to_vertical_line(mode, 1000)); in rockchip_vop_init()
496 if (state->crtc_state.mcu_timing.mcu_pix_total > 0) in rockchip_vop_init()
497 vop_mcu_mode(state, vop); in rockchip_vop_init()
498 vop_cfg_done(vop); in rockchip_vop_init()
534 static void scl_vop_cal_scl_fac(struct vop *vop, in scl_vop_cal_scl_fac() argument
551 if (!vop->win->scl) in scl_vop_cal_scl_fac()
554 if (!vop->win->scl->ext) { in scl_vop_cal_scl_fac()
555 VOP_SCL_SET(vop, scale_yrgb_x, in scl_vop_cal_scl_fac()
557 VOP_SCL_SET(vop, scale_yrgb_y, in scl_vop_cal_scl_fac()
560 VOP_SCL_SET(vop, scale_cbcr_x, in scl_vop_cal_scl_fac()
562 VOP_SCL_SET(vop, scale_cbcr_y, in scl_vop_cal_scl_fac()
585 VOP_SCL_SET_EXT(vop, lb_mode, lb_mode); in scl_vop_cal_scl_fac()
604 VOP_SCL_SET(vop, scale_yrgb_x, val); in scl_vop_cal_scl_fac()
607 VOP_SCL_SET(vop, scale_yrgb_y, val); in scl_vop_cal_scl_fac()
609 VOP_SCL_SET_EXT(vop, vsd_yrgb_gt4, vskiplines == 4); in scl_vop_cal_scl_fac()
610 VOP_SCL_SET_EXT(vop, vsd_yrgb_gt2, vskiplines == 2); in scl_vop_cal_scl_fac()
612 VOP_SCL_SET_EXT(vop, yrgb_hor_scl_mode, yrgb_hor_scl_mode); in scl_vop_cal_scl_fac()
613 VOP_SCL_SET_EXT(vop, yrgb_ver_scl_mode, yrgb_ver_scl_mode); in scl_vop_cal_scl_fac()
614 VOP_SCL_SET_EXT(vop, yrgb_hsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
615 VOP_SCL_SET_EXT(vop, yrgb_vsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
616 VOP_SCL_SET_EXT(vop, yrgb_vsu_mode, vsu_mode); in scl_vop_cal_scl_fac()
620 VOP_SCL_SET(vop, scale_cbcr_x, val); in scl_vop_cal_scl_fac()
623 VOP_SCL_SET(vop, scale_cbcr_y, val); in scl_vop_cal_scl_fac()
625 VOP_SCL_SET_EXT(vop, vsd_cbcr_gt4, vskiplines == 4); in scl_vop_cal_scl_fac()
626 VOP_SCL_SET_EXT(vop, vsd_cbcr_gt2, vskiplines == 2); in scl_vop_cal_scl_fac()
627 VOP_SCL_SET_EXT(vop, cbcr_hor_scl_mode, cbcr_hor_scl_mode); in scl_vop_cal_scl_fac()
628 VOP_SCL_SET_EXT(vop, cbcr_ver_scl_mode, cbcr_ver_scl_mode); in scl_vop_cal_scl_fac()
629 VOP_SCL_SET_EXT(vop, cbcr_hsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
630 VOP_SCL_SET_EXT(vop, cbcr_vsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
631 VOP_SCL_SET_EXT(vop, cbcr_vsu_mode, vsu_mode); in scl_vop_cal_scl_fac()
635 static void vop_load_csc_table(struct vop *vop, u32 offset, const u32 *table) in vop_load_csc_table() argument
647 vop_writel(vop, offset + i * 4, table[i]); in vop_load_csc_table()
652 struct crtc_state *crtc_state = &state->crtc_state; in rockchip_vop_setup_csc_table()
653 struct connector_state *conn_state = &state->conn_state; in rockchip_vop_setup_csc_table()
654 struct vop *vop = crtc_state->private; in rockchip_vop_setup_csc_table() local
657 if (!vop->csc_table || !crtc_state->yuv_overlay) in rockchip_vop_setup_csc_table()
660 switch (conn_state->color_space) { in rockchip_vop_setup_csc_table()
662 csc_table = vop->csc_table->r2y_bt601_12_235; in rockchip_vop_setup_csc_table()
667 csc_table = vop->csc_table->r2y_bt709; in rockchip_vop_setup_csc_table()
670 csc_table = vop->csc_table->r2y_bt2020; in rockchip_vop_setup_csc_table()
673 csc_table = vop->csc_table->r2y_bt601; in rockchip_vop_setup_csc_table()
677 vop_load_csc_table(vop, vop->win_csc->r2y_offset, csc_table); in rockchip_vop_setup_csc_table()
678 VOP_WIN_CSC_SET(vop, r2y_en, 1); in rockchip_vop_setup_csc_table()
685 struct crtc_state *crtc_state = &state->crtc_state; in rockchip_vop_set_plane()
686 const struct rockchip_crtc *crtc = crtc_state->crtc; in rockchip_vop_set_plane()
687 const struct vop_data *vop_data = crtc->data; in rockchip_vop_set_plane()
688 struct connector_state *conn_state = &state->conn_state; in rockchip_vop_set_plane()
689 struct drm_display_mode *mode = &conn_state->mode; in rockchip_vop_set_plane()
691 struct vop *vop = crtc_state->private; in rockchip_vop_set_plane() local
692 int src_w = crtc_state->src_rect.w; in rockchip_vop_set_plane()
693 int src_h = crtc_state->src_rect.h; in rockchip_vop_set_plane()
694 int crtc_x = crtc_state->crtc_rect.x; in rockchip_vop_set_plane()
695 int crtc_y = crtc_state->crtc_rect.y; in rockchip_vop_set_plane()
696 int crtc_w = crtc_state->crtc_rect.w; in rockchip_vop_set_plane()
697 int crtc_h = crtc_state->crtc_rect.h; in rockchip_vop_set_plane()
698 int xvir = crtc_state->xvir; in rockchip_vop_set_plane()
701 if (crtc_w > crtc_state->max_output.width) { in rockchip_vop_set_plane()
703 crtc_w, crtc_state->max_output.width); in rockchip_vop_set_plane()
704 return -EINVAL; in rockchip_vop_set_plane()
707 act_info = (src_h - 1) << 16; in rockchip_vop_set_plane()
708 act_info |= (src_w - 1) & 0xffff; in rockchip_vop_set_plane()
710 dsp_info = (crtc_h - 1) << 16; in rockchip_vop_set_plane()
711 dsp_info |= (crtc_w - 1) & 0xffff; in rockchip_vop_set_plane()
713 dsp_stx = crtc_x + mode->crtc_htotal - mode->crtc_hsync_start; in rockchip_vop_set_plane()
714 dsp_sty = crtc_y + mode->crtc_vtotal - mode->crtc_vsync_start; in rockchip_vop_set_plane()
717 * vop full need to treats rgb888 as bgr888 so we reverse the rb swap to workaround in rockchip_vop_set_plane()
719 if (crtc_state->format == ROCKCHIP_FMT_RGB888 && VOP_MAJOR(vop_data->version) == 3) in rockchip_vop_set_plane()
720 crtc_state->rb_swap = !crtc_state->rb_swap; in rockchip_vop_set_plane()
722 if (mode->flags & DRM_MODE_FLAG_YMIRROR) in rockchip_vop_set_plane()
726 if (mode->flags & DRM_MODE_FLAG_XMIRROR) in rockchip_vop_set_plane()
730 if (crtc_state->ymirror ^ y_mirror) in rockchip_vop_set_plane()
735 if (VOP_CTRL_SUPPORT(vop, ymirror)) in rockchip_vop_set_plane()
736 crtc_state->dma_addr += (src_h - 1) * xvir * 4; in rockchip_vop_set_plane()
740 VOP_CTRL_SET(vop, ymirror, y_mirror); in rockchip_vop_set_plane()
741 VOP_CTRL_SET(vop, xmirror, x_mirror); in rockchip_vop_set_plane()
743 VOP_WIN_SET(vop, format, crtc_state->format); in rockchip_vop_set_plane()
744 VOP_WIN_SET(vop, yrgb_vir, xvir); in rockchip_vop_set_plane()
745 VOP_WIN_SET(vop, yrgb_mst, crtc_state->dma_addr); in rockchip_vop_set_plane()
747 scl_vop_cal_scl_fac(vop, src_w, src_h, crtc_w, crtc_h, in rockchip_vop_set_plane()
748 crtc_state->format); in rockchip_vop_set_plane()
750 VOP_WIN_SET(vop, act_info, act_info); in rockchip_vop_set_plane()
751 VOP_WIN_SET(vop, dsp_info, dsp_info); in rockchip_vop_set_plane()
752 VOP_WIN_SET(vop, dsp_st, dsp_st); in rockchip_vop_set_plane()
753 VOP_WIN_SET(vop, rb_swap, crtc_state->rb_swap); in rockchip_vop_set_plane()
755 VOP_WIN_SET(vop, src_alpha_ctl, 0); in rockchip_vop_set_plane()
758 VOP_WIN_SET(vop, enable, 1); in rockchip_vop_set_plane()
759 VOP_WIN_SET(vop, gate, 1); in rockchip_vop_set_plane()
760 vop_cfg_done(vop); in rockchip_vop_set_plane()
772 struct crtc_state *crtc_state = &state->crtc_state; in rockchip_vop_enable()
773 struct vop *vop = crtc_state->private; in rockchip_vop_enable() local
775 VOP_CTRL_SET(vop, standby, 0); in rockchip_vop_enable()
776 vop_cfg_done(vop); in rockchip_vop_enable()
777 if (crtc_state->mcu_timing.mcu_pix_total > 0) in rockchip_vop_enable()
778 VOP_CTRL_SET(vop, mcu_hold_mode, 0); in rockchip_vop_enable()
785 struct crtc_state *crtc_state = &state->crtc_state; in rockchip_vop_disable()
786 struct vop *vop = crtc_state->private; in rockchip_vop_disable() local
788 VOP_CTRL_SET(vop, standby, 1); in rockchip_vop_disable()
789 vop_cfg_done(vop); in rockchip_vop_disable()
796 struct crtc_state *crtc_state = &state->crtc_state; in rockchip_vop_fixup_dts()
797 struct panel_state *pstate = &state->panel_state; in rockchip_vop_fixup_dts()
802 if (!ofnode_valid(pstate->dsp_lut_node)) in rockchip_vop_fixup_dts()
804 ret = fdt_get_path(state->blob, pstate->dsp_lut_node, path, sizeof(path)); in rockchip_vop_fixup_dts()
817 return -ENOMEM; in rockchip_vop_fixup_dts()
823 ret = fdt_get_path(state->blob, crtc_state->node, path, sizeof(path)); in rockchip_vop_fixup_dts()
830 do_fixup_by_path_u32(blob, path, "dsp-lut", phandle, 1); in rockchip_vop_fixup_dts()
838 struct crtc_state *crtc_state = &state->crtc_state; in rockchip_vop_send_mcu_cmd()
839 struct vop *vop = crtc_state->private; in rockchip_vop_send_mcu_cmd() local
841 if (vop) { in rockchip_vop_send_mcu_cmd()
844 set_vop_mcu_rs(vop, 0); in rockchip_vop_send_mcu_cmd()
845 VOP_CTRL_SET(vop, mcu_rw_bypass_port, value); in rockchip_vop_send_mcu_cmd()
846 set_vop_mcu_rs(vop, 1); in rockchip_vop_send_mcu_cmd()
849 set_vop_mcu_rs(vop, 1); in rockchip_vop_send_mcu_cmd()
850 VOP_CTRL_SET(vop, mcu_rw_bypass_port, value); in rockchip_vop_send_mcu_cmd()
853 VOP_CTRL_SET(vop, mcu_bypass, value ? 1 : 0); in rockchip_vop_send_mcu_cmd()
865 struct connector_state *conn_state = &state->conn_state; in rockchip_vop_mode_valid()
866 struct drm_display_mode *mode = &conn_state->mode; in rockchip_vop_mode_valid()
875 return -EINVAL; in rockchip_vop_mode_valid()
883 struct crtc_state *crtc_state = &state->crtc_state; in rockchip_vop_plane_check()
884 const struct rockchip_crtc *crtc = crtc_state->crtc; in rockchip_vop_plane_check()
885 const struct vop_data *vop_data = crtc->data; in rockchip_vop_plane_check()
886 const struct vop_win *win = vop_data->win; in rockchip_vop_plane_check()
887 struct display_rect *src = &crtc_state->src_rect; in rockchip_vop_plane_check()
888 struct display_rect *dst = &crtc_state->crtc_rect; in rockchip_vop_plane_check()
892 min_scale = win->scl ? FRAC_16_16(1, 8) : VOP_PLANE_NO_SCALING; in rockchip_vop_plane_check()
893 max_scale = win->scl ? FRAC_16_16(8, 1) : VOP_PLANE_NO_SCALING; in rockchip_vop_plane_check()
899 return -ERANGE; in rockchip_vop_plane_check()
907 struct connector_state *conn_state = &state->conn_state; in rockchip_vop_mode_fixup()
908 struct drm_display_mode *mode = &conn_state->mode; in rockchip_vop_mode_fixup()