Lines Matching full:dsi
244 #define dsi_read_poll_timeout(dsi, addr, val, cond, sleep_us, timeout_us) \ argument
248 (val) = dsi_read(dsi, addr); \
252 (val) = dsi_read(dsi, addr); \
261 static inline int dsi_write(struct rk618_dsi *dsi, u32 reg, u32 val) in dsi_write() argument
263 return rk618_i2c_write(dsi->parent, reg, val); in dsi_write()
266 static inline u32 dsi_read(struct rk618_dsi *dsi, u32 reg) in dsi_read() argument
270 rk618_i2c_read(dsi->parent, reg, &val); in dsi_read()
275 static inline void dsi_update_bits(struct rk618_dsi *dsi, in dsi_update_bits() argument
280 orig = dsi_read(dsi, reg); in dsi_update_bits()
283 dsi_write(dsi, reg, tmp); in dsi_update_bits()
294 static void rk618_dsi_set_hs_clk(struct rk618_dsi *dsi) in rk618_dsi_set_hs_clk() argument
296 const struct drm_display_mode *mode = &dsi->mode; in rk618_dsi_set_hs_clk()
297 struct mipi_dphy *phy = &dsi->phy; in rk618_dsi_set_hs_clk()
302 value = dev_read_u32_default(dsi->dev, "rockchip,lane-rate", 0); in rk618_dsi_set_hs_clk()
306 int bpp = mipi_dsi_pixel_format_to_bpp(dsi->format); in rk618_dsi_set_hs_clk()
307 unsigned int lanes = dsi->lanes; in rk618_dsi_set_hs_clk()
325 fref = clk_get_rate(&dsi->parent->clkin); in rk618_dsi_set_hs_clk()
362 static void rk618_dsi_phy_power_off(struct rk618_dsi *dsi) in rk618_dsi_phy_power_off() argument
364 dsi_update_bits(dsi, MIPI_PHY_REG0, LANE_EN_MASK, 0); in rk618_dsi_phy_power_off()
365 dsi_update_bits(dsi, MIPI_PHY_REG1, REG_DA_LDOPD | REG_DA_PLLPD, in rk618_dsi_phy_power_off()
369 static void rk618_dsi_phy_power_on(struct rk618_dsi *dsi, u32 txclkesc) in rk618_dsi_phy_power_on() argument
371 struct mipi_dphy *phy = &dsi->phy; in rk618_dsi_phy_power_on()
399 dsi_update_bits(dsi, MIPI_PHY_REG3, REG_FBDIV_HI_MASK | in rk618_dsi_phy_power_on()
402 dsi_update_bits(dsi, MIPI_PHY_REG4, in rk618_dsi_phy_power_on()
404 dsi_update_bits(dsi, MIPI_PHY_REG1, REG_DA_LDOPD | REG_DA_PLLPD, 0); in rk618_dsi_phy_power_on()
406 dsi_update_bits(dsi, MIPI_PHY_REG0, LANE_EN_MASK, in rk618_dsi_phy_power_on()
407 LANE_EN_CK | GENMASK(dsi->lanes - 1 + 2, 2)); in rk618_dsi_phy_power_on()
409 dsi_update_bits(dsi, MIPI_PHY_REG1, REG_DA_SYNCRST, REG_DA_SYNCRST); in rk618_dsi_phy_power_on()
411 dsi_update_bits(dsi, MIPI_PHY_REG1, REG_DA_SYNCRST, 0); in rk618_dsi_phy_power_on()
413 dsi_update_bits(dsi, MIPI_PHY_REG20, REG_DIG_RSTN, 0); in rk618_dsi_phy_power_on()
415 dsi_update_bits(dsi, MIPI_PHY_REG20, REG_DIG_RSTN, REG_DIG_RSTN); in rk618_dsi_phy_power_on()
418 dsi_write(dsi, MIPI_PHY_REG6, 0x11); in rk618_dsi_phy_power_on()
419 dsi_write(dsi, MIPI_PHY_REG7, 0x11); in rk618_dsi_phy_power_on()
420 dsi_write(dsi, MIPI_PHY_REG9, 0xcc); in rk618_dsi_phy_power_on()
423 dsi_update_bits(dsi, MIPI_PHY_REG1, REG_DA_PPFC, REG_DA_PPFC); in rk618_dsi_phy_power_on()
425 dsi_write(dsi, MIPI_PHY_REG5, 0x30); in rk618_dsi_phy_power_on()
435 dsi_update_bits(dsi, PHYREG(offset + THS_SETTLE_OFFSET), in rk618_dsi_phy_power_on()
446 dsi_update_bits(dsi, PHYREG(offset + TLPX_OFFSET), in rk618_dsi_phy_power_on()
461 dsi_update_bits(dsi, PHYREG(offset + THS_PREPARE_OFFSET), in rk618_dsi_phy_power_on()
464 dsi_update_bits(dsi, PHYREG(offset + THS_ZERO_OFFSET), in rk618_dsi_phy_power_on()
468 dsi_update_bits(dsi, PHYREG(offset + THS_TRAIL_OFFSET), in rk618_dsi_phy_power_on()
478 dsi_update_bits(dsi, PHYREG(offset + THS_EXIT_OFFSET), in rk618_dsi_phy_power_on()
487 dsi_update_bits(dsi, PHYREG(offset + TCLK_POST_OFFSET), in rk618_dsi_phy_power_on()
495 dsi_update_bits(dsi, PHYREG(offset + TWAKUP_HI_OFFSET), in rk618_dsi_phy_power_on()
497 dsi_update_bits(dsi, PHYREG(offset + TWAKUP_LO_OFFSET), in rk618_dsi_phy_power_on()
507 dsi_update_bits(dsi, PHYREG(offset + TCLK_PRE_OFFSET), in rk618_dsi_phy_power_on()
517 dsi_update_bits(dsi, PHYREG(offset + TTA_GO_OFFSET), in rk618_dsi_phy_power_on()
527 dsi_update_bits(dsi, PHYREG(offset + TTA_SURE_OFFSET), in rk618_dsi_phy_power_on()
539 dsi_update_bits(dsi, PHYREG(offset + TTA_WAIT_OFFSET), in rk618_dsi_phy_power_on()
544 static int rk618_dsi_pre_enable(struct rk618_dsi *dsi) in rk618_dsi_pre_enable() argument
546 struct drm_display_mode *mode = &dsi->mode; in rk618_dsi_pre_enable()
554 rk618_dsi_set_hs_clk(dsi); in rk618_dsi_pre_enable()
556 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET); in rk618_dsi_pre_enable()
559 esc_clk_div = DIV_ROUND_UP(dsi->phy.rate >> 3, 20000000); in rk618_dsi_pre_enable()
560 txclkesc = dsi->phy.rate >> 3 / esc_clk_div; in rk618_dsi_pre_enable()
562 dsi_write(dsi, DSI_CLKMGR_CFG, value); in rk618_dsi_pre_enable()
565 value = DPI_VID(dsi->channel); in rk618_dsi_pre_enable()
572 switch (dsi->format) { in rk618_dsi_pre_enable()
589 dsi_write(dsi, DSI_DPI_CFG, value); in rk618_dsi_pre_enable()
592 value = GEN_VID_RX(dsi->channel) | EN_CRC_RX | EN_ECC_RX | EN_BTA; in rk618_dsi_pre_enable()
594 if (!(dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) in rk618_dsi_pre_enable()
597 dsi_write(dsi, DSI_PCKHDL_CFG, value); in rk618_dsi_pre_enable()
602 if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)) in rk618_dsi_pre_enable()
605 if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HBP)) in rk618_dsi_pre_enable()
608 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) in rk618_dsi_pre_enable()
610 else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) in rk618_dsi_pre_enable()
615 dsi_write(dsi, DSI_VID_MODE_CFG, value); in rk618_dsi_pre_enable()
618 dsi_write(dsi, DSI_VID_PKT_CFG, VID_PKT_SIZE(mode->hdisplay)); in rk618_dsi_pre_enable()
621 dsi_write(dsi, DSI_TO_CNT_CFG, LPRX_TO_CNT(1000) | HSTX_TO_CNT(1000)); in rk618_dsi_pre_enable()
630 lanebyteclk = (dsi->phy.rate >> 3) / USEC_PER_SEC; in rk618_dsi_pre_enable()
635 dsi_write(dsi, DSI_TMR_LINE_CFG, HLINE_TIME(hline_time) | in rk618_dsi_pre_enable()
639 dsi_write(dsi, DSI_VTIMING_CFG, in rk618_dsi_pre_enable()
644 value = N_LANES(dsi->lanes - 1) | PHY_STOP_WAIT_TIME(0x20); in rk618_dsi_pre_enable()
645 dsi_write(dsi, DSI_PHY_IF_CFG, value); in rk618_dsi_pre_enable()
649 dsi_write(dsi, DSI_PHY_TMR_CFG, value); in rk618_dsi_pre_enable()
652 dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, PHY_ENABLECLK); in rk618_dsi_pre_enable()
654 dsi_update_bits(dsi, DSI_VID_MODE_CFG, EN_VIDEO_MODE, 0); in rk618_dsi_pre_enable()
655 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, EN_CMD_MODE, EN_CMD_MODE); in rk618_dsi_pre_enable()
657 rk618_dsi_phy_power_on(dsi, txclkesc); in rk618_dsi_pre_enable()
660 ret = dsi_read_poll_timeout(dsi, DSI_PHY_STATUS, in rk618_dsi_pre_enable()
663 dev_err(dsi->dev, "PHY is not locked\n"); in rk618_dsi_pre_enable()
668 ret = dsi_read_poll_timeout(dsi, DSI_PHY_STATUS, in rk618_dsi_pre_enable()
671 dev_err(dsi->dev, "lane module is not in stop state\n"); in rk618_dsi_pre_enable()
675 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, POWER_UP); in rk618_dsi_pre_enable()
680 static void rk618_dsi_enable(struct rk618_dsi *dsi) in rk618_dsi_enable() argument
683 dsi_update_bits(dsi, DSI_PHY_IF_CTRL, in rk618_dsi_enable()
687 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET); in rk618_dsi_enable()
688 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, EN_CMD_MODE, 0); in rk618_dsi_enable()
689 dsi_update_bits(dsi, DSI_VID_MODE_CFG, EN_VIDEO_MODE, EN_VIDEO_MODE); in rk618_dsi_enable()
690 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, POWER_UP); in rk618_dsi_enable()
692 printf("final DSI-Link bandwidth: %lu x %d Mbps\n", in rk618_dsi_enable()
693 dsi->phy.rate / USEC_PER_SEC, dsi->lanes); in rk618_dsi_enable()
696 static void rk618_dsi_disable(struct rk618_dsi *dsi) in rk618_dsi_disable() argument
699 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET); in rk618_dsi_disable()
700 dsi_update_bits(dsi, DSI_PHY_IF_CTRL, PHY_TXREQUESCLKHS, 0); in rk618_dsi_disable()
701 dsi_update_bits(dsi, DSI_VID_MODE_CFG, EN_VIDEO_MODE, 0); in rk618_dsi_disable()
702 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, EN_CMD_MODE, EN_CMD_MODE); in rk618_dsi_disable()
703 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, POWER_UP); in rk618_dsi_disable()
706 static void rk618_dsi_post_disable(struct rk618_dsi *dsi) in rk618_dsi_post_disable() argument
708 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET); in rk618_dsi_post_disable()
709 dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, 0); in rk618_dsi_post_disable()
711 rk618_dsi_phy_power_off(dsi); in rk618_dsi_post_disable()
716 struct rk618_dsi *dsi = dev_get_priv(bridge->dev); in rk618_dsi_bridge_pre_enable() local
718 rk618_dsi_pre_enable(dsi); in rk618_dsi_bridge_pre_enable()
723 struct rk618_dsi *dsi = dev_get_priv(bridge->dev); in rk618_dsi_bridge_enable() local
725 rk618_dsi_enable(dsi); in rk618_dsi_bridge_enable()
730 struct rk618_dsi *dsi = dev_get_priv(bridge->dev); in rk618_dsi_bridge_post_disable() local
732 rk618_dsi_post_disable(dsi); in rk618_dsi_bridge_post_disable()
737 struct rk618_dsi *dsi = dev_get_priv(bridge->dev); in rk618_dsi_bridge_disable() local
739 rk618_dsi_disable(dsi); in rk618_dsi_bridge_disable()
745 struct rk618_dsi *dsi = dev_get_priv(bridge->dev); in rk618_dsi_bridge_mode_set() local
747 memcpy(&dsi->mode, mode, sizeof(*mode)); in rk618_dsi_bridge_mode_set()
758 static ssize_t rk618_dsi_transfer(struct rk618_dsi *dsi, in rk618_dsi_transfer() argument
766 dsi_update_bits(dsi, DSI_PHY_IF_CTRL, PHY_TXREQUESCLKHS, 0); in rk618_dsi_transfer()
768 dsi_update_bits(dsi, DSI_PHY_IF_CTRL, in rk618_dsi_transfer()
773 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SW_0P_TX, in rk618_dsi_transfer()
778 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SW_1P_TX, in rk618_dsi_transfer()
783 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_LW_TX, in rk618_dsi_transfer()
788 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SR_0P_TX, in rk618_dsi_transfer()
793 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, in rk618_dsi_transfer()
799 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_0P_TX, in rk618_dsi_transfer()
804 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_1P_TX, in rk618_dsi_transfer()
809 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_2P_TX, in rk618_dsi_transfer()
814 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_LW_TX, in rk618_dsi_transfer()
819 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_0P_TX, in rk618_dsi_transfer()
824 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_1P_TX, in rk618_dsi_transfer()
829 dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_2P_TX, in rk618_dsi_transfer()
837 /* create a packet to the DSI protocol */ in rk618_dsi_transfer()
840 dev_err(dsi->dev, "failed to create packet: %d\n", ret); in rk618_dsi_transfer()
847 ret = dsi_read_poll_timeout(dsi, DSI_GEN_PKT_STATUS, in rk618_dsi_transfer()
850 dev_err(dsi->dev, "Write payload FIFO is full\n"); in rk618_dsi_transfer()
855 dsi_write(dsi, DSI_GEN_PLD_DATA, value); in rk618_dsi_transfer()
870 dsi_write(dsi, DSI_GEN_PLD_DATA, value); in rk618_dsi_transfer()
875 ret = dsi_read_poll_timeout(dsi, DSI_GEN_PKT_STATUS, in rk618_dsi_transfer()
878 dev_err(dsi->dev, "Command FIFO is full\n"); in rk618_dsi_transfer()
884 dsi_write(dsi, DSI_GEN_HDR, value); in rk618_dsi_transfer()
887 ret = dsi_read_poll_timeout(dsi, DSI_GEN_PKT_STATUS, in rk618_dsi_transfer()
890 dev_err(dsi->dev, "Write payload FIFO is not empty\n"); in rk618_dsi_transfer()
899 ret = dsi_read_poll_timeout(dsi, DSI_GEN_PKT_STATUS, in rk618_dsi_transfer()
902 dev_err(dsi->dev, in rk618_dsi_transfer()
910 ret = dsi_read_poll_timeout(dsi, DSI_GEN_PKT_STATUS, in rk618_dsi_transfer()
914 dev_err(dsi->dev, in rk618_dsi_transfer()
919 value = dsi_read(dsi, DSI_GEN_PLD_DATA); in rk618_dsi_transfer()
946 struct rk618_dsi *dsi = dev_get_priv(dev); in rk618_dsi_probe() local
951 dsi->dev = dev; in rk618_dsi_probe()
952 dsi->parent = dev_get_priv(dev->parent); in rk618_dsi_probe()
961 dsi_write(dsi, DSI_INT_MSK0, 0xffffffff); in rk618_dsi_probe()
962 dsi_write(dsi, DSI_INT_MSK1, 0xffffffff); in rk618_dsi_probe()
973 .compatible = "rockchip,rk618-dsi",
982 struct rk618_dsi *dsi = dev_get_priv(host->dev); in rk618_dsi_host_transfer() local
984 return rk618_dsi_transfer(dsi, msg); in rk618_dsi_host_transfer()
990 struct rk618_dsi *dsi = dev_get_priv(host->dev); in rk618_dsi_host_attach() local
995 dsi->lanes = device->lanes; in rk618_dsi_host_attach()
996 dsi->channel = device->channel; in rk618_dsi_host_attach()
997 dsi->format = device->format; in rk618_dsi_host_attach()
998 dsi->mode_flags = device->mode_flags; in rk618_dsi_host_attach()
1029 device->lanes = dev_read_u32_default(dev, "dsi,lanes", 4); in rk618_dsi_child_post_bind()
1030 device->format = dev_read_u32_default(dev, "dsi,format", in rk618_dsi_child_post_bind()
1032 device->mode_flags = dev_read_u32_default(dev, "dsi,flags", in rk618_dsi_child_post_bind()