Lines Matching refs:hdptx
822 static inline void hdptx_write(struct rockchip_hdptx_phy *hdptx, uint reg, in hdptx_write() argument
825 writel(val, hdptx->base + reg); in hdptx_write()
828 static inline uint hdptx_read(struct rockchip_hdptx_phy *hdptx, uint reg) in hdptx_read() argument
830 return readl(hdptx->base + reg); in hdptx_read()
833 static void hdptx_update_bits(struct rockchip_hdptx_phy *hdptx, uint reg, in hdptx_update_bits() argument
838 orig = hdptx_read(hdptx, reg); in hdptx_update_bits()
841 hdptx_write(hdptx, reg, tmp); in hdptx_update_bits()
844 static void hdptx_grf_write(struct rockchip_hdptx_phy *hdptx, uint reg, in hdptx_grf_write() argument
847 regmap_write(hdptx->grf, reg, val); in hdptx_grf_write()
850 static uint hdptx_grf_read(struct rockchip_hdptx_phy *hdptx, uint reg) in hdptx_grf_read() argument
855 ret = regmap_read(hdptx->grf, reg, &val); in hdptx_grf_read()
857 dev_err(hdptx->dev, "regmap_read err:%d", ret); in hdptx_grf_read()
862 static void hdptx_pre_power_up(struct rockchip_hdptx_phy *hdptx) in hdptx_pre_power_up() argument
866 reset_assert(&hdptx->apb_reset); in hdptx_pre_power_up()
868 reset_deassert(&hdptx->apb_reset); in hdptx_pre_power_up()
870 reset_assert(&hdptx->lane_reset); in hdptx_pre_power_up()
871 reset_assert(&hdptx->cmn_reset); in hdptx_pre_power_up()
872 reset_assert(&hdptx->init_reset); in hdptx_pre_power_up()
875 hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val); in hdptx_pre_power_up()
878 static int hdptx_post_enable_lane(struct rockchip_hdptx_phy *hdptx) in hdptx_post_enable_lane() argument
883 reset_deassert(&hdptx->lane_reset); in hdptx_post_enable_lane()
887 hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val); in hdptx_post_enable_lane()
890 if (hdptx->rate == FRL_6G_3LANES || hdptx->rate == FRL_3G_3LANES) in hdptx_post_enable_lane()
891 hdptx_write(hdptx, LNTOP_REG0207, 0x07); in hdptx_post_enable_lane()
893 hdptx_write(hdptx, LNTOP_REG0207, 0x0f); in hdptx_post_enable_lane()
897 val = hdptx_grf_read(hdptx, GRF_HDPTX_STATUS); in hdptx_post_enable_lane()
905 dev_err(hdptx->dev, "hdptx phy lane can't ready!\n"); in hdptx_post_enable_lane()
909 dev_err(hdptx->dev, "hdptx phy lane locked!\n"); in hdptx_post_enable_lane()
914 static int hdptx_post_enable_pll(struct rockchip_hdptx_phy *hdptx) in hdptx_post_enable_pll() argument
921 hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val); in hdptx_post_enable_pll()
923 reset_deassert(&hdptx->init_reset); in hdptx_post_enable_pll()
926 hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val); in hdptx_post_enable_pll()
928 reset_deassert(&hdptx->cmn_reset); in hdptx_post_enable_pll()
932 val = hdptx_grf_read(hdptx, GRF_HDPTX_STATUS); in hdptx_post_enable_pll()
940 dev_err(hdptx->dev, "hdptx phy pll can't lock!\n"); in hdptx_post_enable_pll()
944 hdptx->pll_locked = true; in hdptx_post_enable_pll()
945 dev_err(hdptx->dev, "hdptx phy pll locked!\n"); in hdptx_post_enable_pll()
1021 static int hdptx_lcpll_cmn_config(struct rockchip_hdptx_phy *hdptx, unsigned long bit_rate) in hdptx_lcpll_cmn_config() argument
1027 hdptx->rate = bit_rate * 100; in hdptx_lcpll_cmn_config()
1036 hdptx_pre_power_up(hdptx); in hdptx_lcpll_cmn_config()
1038 reset_assert(&hdptx->lcpll_reset); in hdptx_lcpll_cmn_config()
1040 reset_deassert(&hdptx->lcpll_reset); in hdptx_lcpll_cmn_config()
1042 hdptx_grf_write(hdptx, GRF_HDPTX_CON0, LC_REF_CLK_SEL << 16); in hdptx_lcpll_cmn_config()
1044 hdptx_update_bits(hdptx, CMN_REG0008, LCPLL_EN_MASK | in hdptx_lcpll_cmn_config()
1047 hdptx_write(hdptx, CMN_REG0009, 0x0c); in hdptx_lcpll_cmn_config()
1048 hdptx_write(hdptx, CMN_REG000A, 0x83); in hdptx_lcpll_cmn_config()
1049 hdptx_write(hdptx, CMN_REG000B, 0x06); in hdptx_lcpll_cmn_config()
1050 hdptx_write(hdptx, CMN_REG000C, 0x20); in hdptx_lcpll_cmn_config()
1051 hdptx_write(hdptx, CMN_REG000D, 0xb8); in hdptx_lcpll_cmn_config()
1052 hdptx_write(hdptx, CMN_REG000E, 0x0f); in hdptx_lcpll_cmn_config()
1053 hdptx_write(hdptx, CMN_REG000F, 0x0f); in hdptx_lcpll_cmn_config()
1054 hdptx_write(hdptx, CMN_REG0010, 0x04); in hdptx_lcpll_cmn_config()
1055 hdptx_write(hdptx, CMN_REG0011, 0x00); in hdptx_lcpll_cmn_config()
1056 hdptx_write(hdptx, CMN_REG0012, 0x26); in hdptx_lcpll_cmn_config()
1057 hdptx_write(hdptx, CMN_REG0013, 0x22); in hdptx_lcpll_cmn_config()
1058 hdptx_write(hdptx, CMN_REG0014, 0x24); in hdptx_lcpll_cmn_config()
1059 hdptx_write(hdptx, CMN_REG0015, 0x77); in hdptx_lcpll_cmn_config()
1060 hdptx_write(hdptx, CMN_REG0016, 0x08); in hdptx_lcpll_cmn_config()
1061 hdptx_write(hdptx, CMN_REG0017, 0x00); in hdptx_lcpll_cmn_config()
1062 hdptx_write(hdptx, CMN_REG0018, 0x04); in hdptx_lcpll_cmn_config()
1063 hdptx_write(hdptx, CMN_REG0019, 0x48); in hdptx_lcpll_cmn_config()
1064 hdptx_write(hdptx, CMN_REG001A, 0x01); in hdptx_lcpll_cmn_config()
1065 hdptx_write(hdptx, CMN_REG001B, 0x00); in hdptx_lcpll_cmn_config()
1066 hdptx_write(hdptx, CMN_REG001C, 0x01); in hdptx_lcpll_cmn_config()
1067 hdptx_write(hdptx, CMN_REG001D, 0x64); in hdptx_lcpll_cmn_config()
1068 hdptx_update_bits(hdptx, CMN_REG001E, LCPLL_PI_EN_MASK | in hdptx_lcpll_cmn_config()
1072 hdptx_write(hdptx, CMN_REG001F, 0x00); in hdptx_lcpll_cmn_config()
1073 hdptx_write(hdptx, CMN_REG0020, cfg->pms_mdiv); in hdptx_lcpll_cmn_config()
1074 hdptx_write(hdptx, CMN_REG0021, cfg->pms_mdiv_afc); in hdptx_lcpll_cmn_config()
1075 hdptx_write(hdptx, CMN_REG0022, (cfg->pms_pdiv << 4) | cfg->pms_refdiv); in hdptx_lcpll_cmn_config()
1076 hdptx_write(hdptx, CMN_REG0023, (cfg->pms_sdiv << 4) | cfg->pms_sdiv); in hdptx_lcpll_cmn_config()
1077 hdptx_write(hdptx, CMN_REG0025, 0x10); in hdptx_lcpll_cmn_config()
1078 hdptx_write(hdptx, CMN_REG0026, 0x53); in hdptx_lcpll_cmn_config()
1079 hdptx_write(hdptx, CMN_REG0027, 0x01); in hdptx_lcpll_cmn_config()
1080 hdptx_write(hdptx, CMN_REG0028, 0x0d); in hdptx_lcpll_cmn_config()
1081 hdptx_write(hdptx, CMN_REG0029, 0x01); in hdptx_lcpll_cmn_config()
1082 hdptx_write(hdptx, CMN_REG002A, cfg->sdm_deno); in hdptx_lcpll_cmn_config()
1083 hdptx_write(hdptx, CMN_REG002B, cfg->sdm_num_sign); in hdptx_lcpll_cmn_config()
1084 hdptx_write(hdptx, CMN_REG002C, cfg->sdm_num); in hdptx_lcpll_cmn_config()
1085 hdptx_update_bits(hdptx, CMN_REG002D, LCPLL_SDC_N_MASK, in hdptx_lcpll_cmn_config()
1087 hdptx_write(hdptx, CMN_REG002E, 0x02); in hdptx_lcpll_cmn_config()
1088 hdptx_write(hdptx, CMN_REG002F, 0x0d); in hdptx_lcpll_cmn_config()
1089 hdptx_write(hdptx, CMN_REG0030, 0x00); in hdptx_lcpll_cmn_config()
1090 hdptx_write(hdptx, CMN_REG0031, 0x20); in hdptx_lcpll_cmn_config()
1091 hdptx_write(hdptx, CMN_REG0032, 0x30); in hdptx_lcpll_cmn_config()
1092 hdptx_write(hdptx, CMN_REG0033, 0x0b); in hdptx_lcpll_cmn_config()
1093 hdptx_write(hdptx, CMN_REG0034, 0x23); in hdptx_lcpll_cmn_config()
1094 hdptx_write(hdptx, CMN_REG0035, 0x00); in hdptx_lcpll_cmn_config()
1095 hdptx_write(hdptx, CMN_REG0038, 0x00); in hdptx_lcpll_cmn_config()
1096 hdptx_write(hdptx, CMN_REG0039, 0x00); in hdptx_lcpll_cmn_config()
1097 hdptx_write(hdptx, CMN_REG003A, 0x00); in hdptx_lcpll_cmn_config()
1098 hdptx_write(hdptx, CMN_REG003B, 0x00); in hdptx_lcpll_cmn_config()
1099 hdptx_write(hdptx, CMN_REG003C, 0x80); in hdptx_lcpll_cmn_config()
1100 hdptx_write(hdptx, CMN_REG003D, 0x00); in hdptx_lcpll_cmn_config()
1101 hdptx_write(hdptx, CMN_REG003E, 0x0c); in hdptx_lcpll_cmn_config()
1102 hdptx_write(hdptx, CMN_REG003F, 0x83); in hdptx_lcpll_cmn_config()
1103 hdptx_write(hdptx, CMN_REG0040, 0x06); in hdptx_lcpll_cmn_config()
1104 hdptx_write(hdptx, CMN_REG0041, 0x20); in hdptx_lcpll_cmn_config()
1105 hdptx_write(hdptx, CMN_REG0042, 0xb8); in hdptx_lcpll_cmn_config()
1106 hdptx_write(hdptx, CMN_REG0043, 0x00); in hdptx_lcpll_cmn_config()
1107 hdptx_write(hdptx, CMN_REG0044, 0x46); in hdptx_lcpll_cmn_config()
1108 hdptx_write(hdptx, CMN_REG0045, 0x24); in hdptx_lcpll_cmn_config()
1109 hdptx_write(hdptx, CMN_REG0046, 0xff); in hdptx_lcpll_cmn_config()
1110 hdptx_write(hdptx, CMN_REG0047, 0x00); in hdptx_lcpll_cmn_config()
1111 hdptx_write(hdptx, CMN_REG0048, 0x44); in hdptx_lcpll_cmn_config()
1112 hdptx_write(hdptx, CMN_REG0049, 0xfa); in hdptx_lcpll_cmn_config()
1113 hdptx_write(hdptx, CMN_REG004A, 0x08); in hdptx_lcpll_cmn_config()
1114 hdptx_write(hdptx, CMN_REG004B, 0x00); in hdptx_lcpll_cmn_config()
1115 hdptx_write(hdptx, CMN_REG004C, 0x01); in hdptx_lcpll_cmn_config()
1116 hdptx_write(hdptx, CMN_REG004D, 0x64); in hdptx_lcpll_cmn_config()
1117 hdptx_write(hdptx, CMN_REG004E, 0x14); in hdptx_lcpll_cmn_config()
1118 hdptx_write(hdptx, CMN_REG004F, 0x00); in hdptx_lcpll_cmn_config()
1119 hdptx_write(hdptx, CMN_REG0050, 0x00); in hdptx_lcpll_cmn_config()
1120 hdptx_write(hdptx, CMN_REG0051, 0x00); in hdptx_lcpll_cmn_config()
1121 hdptx_write(hdptx, CMN_REG0055, 0x00); in hdptx_lcpll_cmn_config()
1122 hdptx_write(hdptx, CMN_REG0059, 0x11); in hdptx_lcpll_cmn_config()
1123 hdptx_write(hdptx, CMN_REG005A, 0x03); in hdptx_lcpll_cmn_config()
1124 hdptx_write(hdptx, CMN_REG005C, 0x05); in hdptx_lcpll_cmn_config()
1125 hdptx_write(hdptx, CMN_REG005D, 0x0c); in hdptx_lcpll_cmn_config()
1126 hdptx_write(hdptx, CMN_REG005E, 0x07); in hdptx_lcpll_cmn_config()
1127 hdptx_write(hdptx, CMN_REG005F, 0x01); in hdptx_lcpll_cmn_config()
1128 hdptx_write(hdptx, CMN_REG0060, 0x01); in hdptx_lcpll_cmn_config()
1129 hdptx_write(hdptx, CMN_REG0064, 0x07); in hdptx_lcpll_cmn_config()
1130 hdptx_write(hdptx, CMN_REG0065, 0x00); in hdptx_lcpll_cmn_config()
1131 hdptx_write(hdptx, CMN_REG0069, 0x00); in hdptx_lcpll_cmn_config()
1132 hdptx_write(hdptx, CMN_REG006B, 0x04); in hdptx_lcpll_cmn_config()
1133 hdptx_write(hdptx, CMN_REG006C, 0x00); in hdptx_lcpll_cmn_config()
1134 hdptx_write(hdptx, CMN_REG0070, 0x01); in hdptx_lcpll_cmn_config()
1135 hdptx_write(hdptx, CMN_REG0073, 0x30); in hdptx_lcpll_cmn_config()
1136 hdptx_write(hdptx, CMN_REG0074, 0x00); in hdptx_lcpll_cmn_config()
1137 hdptx_write(hdptx, CMN_REG0075, 0x20); in hdptx_lcpll_cmn_config()
1138 hdptx_write(hdptx, CMN_REG0076, 0x30); in hdptx_lcpll_cmn_config()
1139 hdptx_write(hdptx, CMN_REG0077, 0x08); in hdptx_lcpll_cmn_config()
1140 hdptx_write(hdptx, CMN_REG0078, 0x0c); in hdptx_lcpll_cmn_config()
1141 hdptx_write(hdptx, CMN_REG0079, 0x00); in hdptx_lcpll_cmn_config()
1142 hdptx_write(hdptx, CMN_REG007B, 0x00); in hdptx_lcpll_cmn_config()
1143 hdptx_write(hdptx, CMN_REG007C, 0x00); in hdptx_lcpll_cmn_config()
1144 hdptx_write(hdptx, CMN_REG007D, 0x00); in hdptx_lcpll_cmn_config()
1145 hdptx_write(hdptx, CMN_REG007E, 0x00); in hdptx_lcpll_cmn_config()
1146 hdptx_write(hdptx, CMN_REG007F, 0x00); in hdptx_lcpll_cmn_config()
1147 hdptx_write(hdptx, CMN_REG0080, 0x00); in hdptx_lcpll_cmn_config()
1148 hdptx_write(hdptx, CMN_REG0081, 0x09); in hdptx_lcpll_cmn_config()
1149 hdptx_write(hdptx, CMN_REG0082, 0x04); in hdptx_lcpll_cmn_config()
1150 hdptx_write(hdptx, CMN_REG0083, 0x24); in hdptx_lcpll_cmn_config()
1151 hdptx_write(hdptx, CMN_REG0084, 0x20); in hdptx_lcpll_cmn_config()
1152 hdptx_write(hdptx, CMN_REG0085, 0x03); in hdptx_lcpll_cmn_config()
1153 hdptx_write(hdptx, CMN_REG0086, 0x01); in hdptx_lcpll_cmn_config()
1154 hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_POSTDIV_SEL_MASK, in hdptx_lcpll_cmn_config()
1156 hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_CLK_SEL_MASK, in hdptx_lcpll_cmn_config()
1158 hdptx_write(hdptx, CMN_REG0087, 0x0c); in hdptx_lcpll_cmn_config()
1159 hdptx_write(hdptx, CMN_REG0089, 0x02); in hdptx_lcpll_cmn_config()
1160 hdptx_write(hdptx, CMN_REG008A, 0x55); in hdptx_lcpll_cmn_config()
1161 hdptx_write(hdptx, CMN_REG008B, 0x25); in hdptx_lcpll_cmn_config()
1162 hdptx_write(hdptx, CMN_REG008C, 0x2c); in hdptx_lcpll_cmn_config()
1163 hdptx_write(hdptx, CMN_REG008D, 0x22); in hdptx_lcpll_cmn_config()
1164 hdptx_write(hdptx, CMN_REG008E, 0x14); in hdptx_lcpll_cmn_config()
1165 hdptx_write(hdptx, CMN_REG008F, 0x20); in hdptx_lcpll_cmn_config()
1166 hdptx_write(hdptx, CMN_REG0090, 0x00); in hdptx_lcpll_cmn_config()
1167 hdptx_write(hdptx, CMN_REG0091, 0x00); in hdptx_lcpll_cmn_config()
1168 hdptx_write(hdptx, CMN_REG0092, 0x00); in hdptx_lcpll_cmn_config()
1169 hdptx_write(hdptx, CMN_REG0093, 0x00); in hdptx_lcpll_cmn_config()
1170 hdptx_write(hdptx, CMN_REG0095, 0x00); in hdptx_lcpll_cmn_config()
1171 hdptx_write(hdptx, CMN_REG0097, 0x00); in hdptx_lcpll_cmn_config()
1172 hdptx_write(hdptx, CMN_REG0099, 0x00); in hdptx_lcpll_cmn_config()
1173 hdptx_write(hdptx, CMN_REG009A, 0x11); in hdptx_lcpll_cmn_config()
1174 hdptx_write(hdptx, CMN_REG009B, 0x10); in hdptx_lcpll_cmn_config()
1175 hdptx_write(hdptx, SB_REG0114, 0x00); in hdptx_lcpll_cmn_config()
1176 hdptx_write(hdptx, SB_REG0115, 0x00); in hdptx_lcpll_cmn_config()
1177 hdptx_write(hdptx, SB_REG0116, 0x00); in hdptx_lcpll_cmn_config()
1178 hdptx_write(hdptx, SB_REG0117, 0x00); in hdptx_lcpll_cmn_config()
1180 return hdptx_post_enable_pll(hdptx); in hdptx_lcpll_cmn_config()
1183 static int hdptx_ropll_cmn_config(struct rockchip_hdptx_phy *hdptx, unsigned long bit_rate) in hdptx_ropll_cmn_config() argument
1185 int bus_width = hdptx->bus_width; in hdptx_ropll_cmn_config()
1191 hdptx->rate = bit_rate * 100; in hdptx_ropll_cmn_config()
1201 dev_err(hdptx->dev, "%s can't find pll cfg\n", __func__); in hdptx_ropll_cmn_config()
1206 dev_dbg(hdptx->dev, "mdiv=%u, sdiv=%u\n", in hdptx_ropll_cmn_config()
1208 dev_dbg(hdptx->dev, "sdm_en=%u, k_sign=%u, k=%u, lc=%u", in hdptx_ropll_cmn_config()
1210 dev_dbg(hdptx->dev, "n=%u, k_sub=%u, lc_sub=%u\n", in hdptx_ropll_cmn_config()
1213 hdptx_pre_power_up(hdptx); in hdptx_ropll_cmn_config()
1215 reset_assert(&hdptx->ropll_reset); in hdptx_ropll_cmn_config()
1217 reset_deassert(&hdptx->ropll_reset); in hdptx_ropll_cmn_config()
1219 hdptx_grf_write(hdptx, GRF_HDPTX_CON0, LC_REF_CLK_SEL << 16); in hdptx_ropll_cmn_config()
1221 hdptx_write(hdptx, CMN_REG0008, 0x00); in hdptx_ropll_cmn_config()
1222 hdptx_write(hdptx, CMN_REG0009, 0x0c); in hdptx_ropll_cmn_config()
1223 hdptx_write(hdptx, CMN_REG000A, 0x83); in hdptx_ropll_cmn_config()
1224 hdptx_write(hdptx, CMN_REG000B, 0x06); in hdptx_ropll_cmn_config()
1225 hdptx_write(hdptx, CMN_REG000C, 0x20); in hdptx_ropll_cmn_config()
1226 hdptx_write(hdptx, CMN_REG000D, 0xb8); in hdptx_ropll_cmn_config()
1227 hdptx_write(hdptx, CMN_REG000E, 0x0f); in hdptx_ropll_cmn_config()
1228 hdptx_write(hdptx, CMN_REG000F, 0x0f); in hdptx_ropll_cmn_config()
1229 hdptx_write(hdptx, CMN_REG0010, 0x04); in hdptx_ropll_cmn_config()
1230 hdptx_write(hdptx, CMN_REG0011, 0x01); in hdptx_ropll_cmn_config()
1231 hdptx_write(hdptx, CMN_REG0012, 0x26); in hdptx_ropll_cmn_config()
1232 hdptx_write(hdptx, CMN_REG0013, 0x22); in hdptx_ropll_cmn_config()
1233 hdptx_write(hdptx, CMN_REG0014, 0x24); in hdptx_ropll_cmn_config()
1234 hdptx_write(hdptx, CMN_REG0015, 0x77); in hdptx_ropll_cmn_config()
1235 hdptx_write(hdptx, CMN_REG0016, 0x08); in hdptx_ropll_cmn_config()
1236 hdptx_write(hdptx, CMN_REG0017, 0x20); in hdptx_ropll_cmn_config()
1237 hdptx_write(hdptx, CMN_REG0018, 0x04); in hdptx_ropll_cmn_config()
1238 hdptx_write(hdptx, CMN_REG0019, 0x48); in hdptx_ropll_cmn_config()
1239 hdptx_write(hdptx, CMN_REG001A, 0x01); in hdptx_ropll_cmn_config()
1240 hdptx_write(hdptx, CMN_REG001B, 0x00); in hdptx_ropll_cmn_config()
1241 hdptx_write(hdptx, CMN_REG001C, 0x01); in hdptx_ropll_cmn_config()
1242 hdptx_write(hdptx, CMN_REG001D, 0x64); in hdptx_ropll_cmn_config()
1243 hdptx_write(hdptx, CMN_REG001E, 0x14); in hdptx_ropll_cmn_config()
1244 hdptx_write(hdptx, CMN_REG001F, 0x00); in hdptx_ropll_cmn_config()
1245 hdptx_write(hdptx, CMN_REG0020, 0x00); in hdptx_ropll_cmn_config()
1246 hdptx_write(hdptx, CMN_REG0021, 0x00); in hdptx_ropll_cmn_config()
1247 hdptx_write(hdptx, CMN_REG0022, 0x11); in hdptx_ropll_cmn_config()
1248 hdptx_write(hdptx, CMN_REG0023, 0x00); in hdptx_ropll_cmn_config()
1249 hdptx_write(hdptx, CMN_REG0024, 0x00); in hdptx_ropll_cmn_config()
1250 hdptx_write(hdptx, CMN_REG0025, 0x53); in hdptx_ropll_cmn_config()
1251 hdptx_write(hdptx, CMN_REG0026, 0x00); in hdptx_ropll_cmn_config()
1252 hdptx_write(hdptx, CMN_REG0027, 0x00); in hdptx_ropll_cmn_config()
1253 hdptx_write(hdptx, CMN_REG0028, 0x01); in hdptx_ropll_cmn_config()
1254 hdptx_write(hdptx, CMN_REG0029, 0x01); in hdptx_ropll_cmn_config()
1255 hdptx_write(hdptx, CMN_REG002A, 0x00); in hdptx_ropll_cmn_config()
1256 hdptx_write(hdptx, CMN_REG002B, 0x00); in hdptx_ropll_cmn_config()
1257 hdptx_write(hdptx, CMN_REG002C, 0x00); in hdptx_ropll_cmn_config()
1258 hdptx_write(hdptx, CMN_REG002D, 0x00); in hdptx_ropll_cmn_config()
1259 hdptx_write(hdptx, CMN_REG002E, 0x04); in hdptx_ropll_cmn_config()
1260 hdptx_write(hdptx, CMN_REG002F, 0x00); in hdptx_ropll_cmn_config()
1261 hdptx_write(hdptx, CMN_REG0030, 0x20); in hdptx_ropll_cmn_config()
1262 hdptx_write(hdptx, CMN_REG0031, 0x30); in hdptx_ropll_cmn_config()
1263 hdptx_write(hdptx, CMN_REG0032, 0x0b); in hdptx_ropll_cmn_config()
1264 hdptx_write(hdptx, CMN_REG0033, 0x23); in hdptx_ropll_cmn_config()
1265 hdptx_write(hdptx, CMN_REG0034, 0x00); in hdptx_ropll_cmn_config()
1266 hdptx_write(hdptx, CMN_REG0035, 0x00); in hdptx_ropll_cmn_config()
1267 hdptx_write(hdptx, CMN_REG0038, 0x00); in hdptx_ropll_cmn_config()
1268 hdptx_write(hdptx, CMN_REG0039, 0x00); in hdptx_ropll_cmn_config()
1269 hdptx_write(hdptx, CMN_REG003A, 0x00); in hdptx_ropll_cmn_config()
1270 hdptx_write(hdptx, CMN_REG003B, 0x00); in hdptx_ropll_cmn_config()
1271 hdptx_write(hdptx, CMN_REG003C, 0x80); in hdptx_ropll_cmn_config()
1272 hdptx_write(hdptx, CMN_REG003D, 0x40); in hdptx_ropll_cmn_config()
1273 hdptx_write(hdptx, CMN_REG003E, 0x0c); in hdptx_ropll_cmn_config()
1274 hdptx_write(hdptx, CMN_REG003F, 0x83); in hdptx_ropll_cmn_config()
1275 hdptx_write(hdptx, CMN_REG0040, 0x06); in hdptx_ropll_cmn_config()
1276 hdptx_write(hdptx, CMN_REG0041, 0x20); in hdptx_ropll_cmn_config()
1277 hdptx_write(hdptx, CMN_REG0042, 0x78); in hdptx_ropll_cmn_config()
1278 hdptx_write(hdptx, CMN_REG0043, 0x00); in hdptx_ropll_cmn_config()
1279 hdptx_write(hdptx, CMN_REG0044, 0x46); in hdptx_ropll_cmn_config()
1280 hdptx_write(hdptx, CMN_REG0045, 0x24); in hdptx_ropll_cmn_config()
1281 hdptx_write(hdptx, CMN_REG0046, 0xdd); in hdptx_ropll_cmn_config()
1282 hdptx_write(hdptx, CMN_REG0047, 0x00); in hdptx_ropll_cmn_config()
1283 hdptx_write(hdptx, CMN_REG0048, 0x11); in hdptx_ropll_cmn_config()
1284 hdptx_write(hdptx, CMN_REG0049, 0xfa); in hdptx_ropll_cmn_config()
1285 hdptx_write(hdptx, CMN_REG004A, 0x08); in hdptx_ropll_cmn_config()
1286 hdptx_write(hdptx, CMN_REG004B, 0x00); in hdptx_ropll_cmn_config()
1287 hdptx_write(hdptx, CMN_REG004C, 0x01); in hdptx_ropll_cmn_config()
1288 hdptx_write(hdptx, CMN_REG004D, 0x64); in hdptx_ropll_cmn_config()
1289 hdptx_write(hdptx, CMN_REG004E, 0x34); in hdptx_ropll_cmn_config()
1290 hdptx_write(hdptx, CMN_REG004F, 0x00); in hdptx_ropll_cmn_config()
1291 hdptx_write(hdptx, CMN_REG0050, 0x00); in hdptx_ropll_cmn_config()
1293 hdptx_write(hdptx, CMN_REG0051, cfg->pms_mdiv); in hdptx_ropll_cmn_config()
1294 hdptx_write(hdptx, CMN_REG0055, cfg->pms_mdiv_afc); in hdptx_ropll_cmn_config()
1296 hdptx_write(hdptx, CMN_REG0059, (cfg->pms_pdiv << 4) | cfg->pms_refdiv); in hdptx_ropll_cmn_config()
1298 hdptx_write(hdptx, CMN_REG005A, (cfg->pms_sdiv << 4)); in hdptx_ropll_cmn_config()
1300 hdptx_write(hdptx, CMN_REG005C, 0x25); in hdptx_ropll_cmn_config()
1301 hdptx_write(hdptx, CMN_REG005D, 0x0c); in hdptx_ropll_cmn_config()
1302 hdptx_write(hdptx, CMN_REG005E, 0x4f); in hdptx_ropll_cmn_config()
1303 hdptx_update_bits(hdptx, CMN_REG005E, ROPLL_SDM_EN_MASK, in hdptx_ropll_cmn_config()
1306 hdptx_update_bits(hdptx, CMN_REG005E, 0xf, 0); in hdptx_ropll_cmn_config()
1308 hdptx_write(hdptx, CMN_REG005F, 0x01); in hdptx_ropll_cmn_config()
1310 hdptx_update_bits(hdptx, CMN_REG0064, ROPLL_SDM_NUM_SIGN_RBR_MASK, in hdptx_ropll_cmn_config()
1312 hdptx_write(hdptx, CMN_REG0065, cfg->sdm_num); in hdptx_ropll_cmn_config()
1313 hdptx_write(hdptx, CMN_REG0060, cfg->sdm_deno); in hdptx_ropll_cmn_config()
1315 hdptx_update_bits(hdptx, CMN_REG0069, ROPLL_SDC_N_RBR_MASK, in hdptx_ropll_cmn_config()
1318 hdptx_write(hdptx, CMN_REG006C, cfg->sdc_num); in hdptx_ropll_cmn_config()
1319 hdptx_write(hdptx, CMN_REG0070, cfg->sdc_deno); in hdptx_ropll_cmn_config()
1321 hdptx_write(hdptx, CMN_REG006B, 0x04); in hdptx_ropll_cmn_config()
1323 hdptx_write(hdptx, CMN_REG0073, 0x30); in hdptx_ropll_cmn_config()
1324 hdptx_write(hdptx, CMN_REG0074, 0x04); in hdptx_ropll_cmn_config()
1325 hdptx_write(hdptx, CMN_REG0075, 0x20); in hdptx_ropll_cmn_config()
1326 hdptx_write(hdptx, CMN_REG0076, 0x30); in hdptx_ropll_cmn_config()
1327 hdptx_write(hdptx, CMN_REG0077, 0x08); in hdptx_ropll_cmn_config()
1328 hdptx_write(hdptx, CMN_REG0078, 0x0c); in hdptx_ropll_cmn_config()
1329 hdptx_write(hdptx, CMN_REG0079, 0x00); in hdptx_ropll_cmn_config()
1330 hdptx_write(hdptx, CMN_REG007B, 0x00); in hdptx_ropll_cmn_config()
1331 hdptx_write(hdptx, CMN_REG007C, 0x00); in hdptx_ropll_cmn_config()
1332 hdptx_write(hdptx, CMN_REG007D, 0x00); in hdptx_ropll_cmn_config()
1333 hdptx_write(hdptx, CMN_REG007E, 0x00); in hdptx_ropll_cmn_config()
1334 hdptx_write(hdptx, CMN_REG007F, 0x00); in hdptx_ropll_cmn_config()
1335 hdptx_write(hdptx, CMN_REG0080, 0x00); in hdptx_ropll_cmn_config()
1336 hdptx_write(hdptx, CMN_REG0081, 0x01); in hdptx_ropll_cmn_config()
1337 hdptx_write(hdptx, CMN_REG0082, 0x04); in hdptx_ropll_cmn_config()
1338 hdptx_write(hdptx, CMN_REG0083, 0x24); in hdptx_ropll_cmn_config()
1339 hdptx_write(hdptx, CMN_REG0084, 0x20); in hdptx_ropll_cmn_config()
1340 hdptx_write(hdptx, CMN_REG0085, 0x03); in hdptx_ropll_cmn_config()
1342 hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_POSTDIV_SEL_MASK, in hdptx_ropll_cmn_config()
1345 hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_CLK_SEL_MASK, in hdptx_ropll_cmn_config()
1348 hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_CLK_EN, PLL_PCG_CLK_EN); in hdptx_ropll_cmn_config()
1350 hdptx_write(hdptx, CMN_REG0087, 0x04); in hdptx_ropll_cmn_config()
1351 hdptx_write(hdptx, CMN_REG0089, 0x00); in hdptx_ropll_cmn_config()
1352 hdptx_write(hdptx, CMN_REG008A, 0x55); in hdptx_ropll_cmn_config()
1353 hdptx_write(hdptx, CMN_REG008B, 0x25); in hdptx_ropll_cmn_config()
1354 hdptx_write(hdptx, CMN_REG008C, 0x2c); in hdptx_ropll_cmn_config()
1355 hdptx_write(hdptx, CMN_REG008D, 0x22); in hdptx_ropll_cmn_config()
1356 hdptx_write(hdptx, CMN_REG008E, 0x14); in hdptx_ropll_cmn_config()
1357 hdptx_write(hdptx, CMN_REG008F, 0x20); in hdptx_ropll_cmn_config()
1358 hdptx_write(hdptx, CMN_REG0090, 0x00); in hdptx_ropll_cmn_config()
1359 hdptx_write(hdptx, CMN_REG0091, 0x00); in hdptx_ropll_cmn_config()
1360 hdptx_write(hdptx, CMN_REG0092, 0x00); in hdptx_ropll_cmn_config()
1361 hdptx_write(hdptx, CMN_REG0093, 0x00); in hdptx_ropll_cmn_config()
1362 hdptx_write(hdptx, CMN_REG0095, 0x00); in hdptx_ropll_cmn_config()
1363 hdptx_write(hdptx, CMN_REG0097, 0x02); in hdptx_ropll_cmn_config()
1364 hdptx_write(hdptx, CMN_REG0099, 0x04); in hdptx_ropll_cmn_config()
1365 hdptx_write(hdptx, CMN_REG009A, 0x11); in hdptx_ropll_cmn_config()
1366 hdptx_write(hdptx, CMN_REG009B, 0x00); in hdptx_ropll_cmn_config()
1368 return hdptx_post_enable_pll(hdptx); in hdptx_ropll_cmn_config()
1371 static int hdptx_ropll_tmds_mode_config(struct rockchip_hdptx_phy *hdptx, u32 rate) in hdptx_ropll_tmds_mode_config() argument
1379 hdptx_write(hdptx, SB_REG0114, 0x00); in hdptx_ropll_tmds_mode_config()
1380 hdptx_write(hdptx, SB_REG0115, 0x00); in hdptx_ropll_tmds_mode_config()
1381 hdptx_write(hdptx, SB_REG0116, 0x00); in hdptx_ropll_tmds_mode_config()
1382 hdptx_write(hdptx, SB_REG0117, 0x00); in hdptx_ropll_tmds_mode_config()
1383 hdptx_write(hdptx, LNTOP_REG0200, 0x06); in hdptx_ropll_tmds_mode_config()
1387 hdptx_write(hdptx, LNTOP_REG0201, 0x00); in hdptx_ropll_tmds_mode_config()
1388 hdptx_write(hdptx, LNTOP_REG0202, 0x00); in hdptx_ropll_tmds_mode_config()
1389 hdptx_write(hdptx, LNTOP_REG0203, 0x0f); in hdptx_ropll_tmds_mode_config()
1390 hdptx_write(hdptx, LNTOP_REG0204, 0xff); in hdptx_ropll_tmds_mode_config()
1391 hdptx_write(hdptx, LNTOP_REG0205, 0xff); in hdptx_ropll_tmds_mode_config()
1394 hdptx_write(hdptx, LNTOP_REG0201, 0x07); in hdptx_ropll_tmds_mode_config()
1395 hdptx_write(hdptx, LNTOP_REG0202, 0xc1); in hdptx_ropll_tmds_mode_config()
1396 hdptx_write(hdptx, LNTOP_REG0203, 0xf0); in hdptx_ropll_tmds_mode_config()
1397 hdptx_write(hdptx, LNTOP_REG0204, 0x7c); in hdptx_ropll_tmds_mode_config()
1398 hdptx_write(hdptx, LNTOP_REG0205, 0x1f); in hdptx_ropll_tmds_mode_config()
1401 hdptx_write(hdptx, LNTOP_REG0206, 0x07); in hdptx_ropll_tmds_mode_config()
1402 hdptx_write(hdptx, LANE_REG0303, 0x0c); in hdptx_ropll_tmds_mode_config()
1403 hdptx_write(hdptx, LANE_REG0307, 0x20); in hdptx_ropll_tmds_mode_config()
1404 hdptx_write(hdptx, LANE_REG030A, 0x17); in hdptx_ropll_tmds_mode_config()
1405 hdptx_write(hdptx, LANE_REG030B, 0x77); in hdptx_ropll_tmds_mode_config()
1406 hdptx_write(hdptx, LANE_REG030C, 0x77); in hdptx_ropll_tmds_mode_config()
1407 hdptx_write(hdptx, LANE_REG030D, 0x77); in hdptx_ropll_tmds_mode_config()
1408 hdptx_write(hdptx, LANE_REG030E, 0x38); in hdptx_ropll_tmds_mode_config()
1409 hdptx_write(hdptx, LANE_REG0310, 0x03); in hdptx_ropll_tmds_mode_config()
1410 hdptx_write(hdptx, LANE_REG0311, 0x0f); in hdptx_ropll_tmds_mode_config()
1411 hdptx_write(hdptx, LANE_REG0312, 0x00); in hdptx_ropll_tmds_mode_config()
1412 hdptx_write(hdptx, LANE_REG0316, 0x02); in hdptx_ropll_tmds_mode_config()
1413 hdptx_write(hdptx, LANE_REG031B, 0x01); in hdptx_ropll_tmds_mode_config()
1414 hdptx_write(hdptx, LANE_REG031E, 0x00); in hdptx_ropll_tmds_mode_config()
1415 hdptx_write(hdptx, LANE_REG031F, 0x15); in hdptx_ropll_tmds_mode_config()
1416 hdptx_write(hdptx, LANE_REG0320, 0xa0); in hdptx_ropll_tmds_mode_config()
1417 hdptx_write(hdptx, LANE_REG0403, 0x0c); in hdptx_ropll_tmds_mode_config()
1418 hdptx_write(hdptx, LANE_REG0407, 0x20); in hdptx_ropll_tmds_mode_config()
1419 hdptx_write(hdptx, LANE_REG040A, 0x17); in hdptx_ropll_tmds_mode_config()
1420 hdptx_write(hdptx, LANE_REG040B, 0x77); in hdptx_ropll_tmds_mode_config()
1421 hdptx_write(hdptx, LANE_REG040C, 0x77); in hdptx_ropll_tmds_mode_config()
1422 hdptx_write(hdptx, LANE_REG040D, 0x77); in hdptx_ropll_tmds_mode_config()
1423 hdptx_write(hdptx, LANE_REG040E, 0x38); in hdptx_ropll_tmds_mode_config()
1424 hdptx_write(hdptx, LANE_REG0410, 0x03); in hdptx_ropll_tmds_mode_config()
1425 hdptx_write(hdptx, LANE_REG0411, 0x0f); in hdptx_ropll_tmds_mode_config()
1426 hdptx_write(hdptx, LANE_REG0412, 0x00); in hdptx_ropll_tmds_mode_config()
1427 hdptx_write(hdptx, LANE_REG0416, 0x02); in hdptx_ropll_tmds_mode_config()
1428 hdptx_write(hdptx, LANE_REG041B, 0x01); in hdptx_ropll_tmds_mode_config()
1429 hdptx_write(hdptx, LANE_REG041E, 0x00); in hdptx_ropll_tmds_mode_config()
1430 hdptx_write(hdptx, LANE_REG041F, 0x15); in hdptx_ropll_tmds_mode_config()
1431 hdptx_write(hdptx, LANE_REG0420, 0xa0); in hdptx_ropll_tmds_mode_config()
1432 hdptx_write(hdptx, LANE_REG0503, 0x0c); in hdptx_ropll_tmds_mode_config()
1433 hdptx_write(hdptx, LANE_REG0507, 0x20); in hdptx_ropll_tmds_mode_config()
1434 hdptx_write(hdptx, LANE_REG050A, 0x17); in hdptx_ropll_tmds_mode_config()
1435 hdptx_write(hdptx, LANE_REG050B, 0x77); in hdptx_ropll_tmds_mode_config()
1436 hdptx_write(hdptx, LANE_REG050C, 0x77); in hdptx_ropll_tmds_mode_config()
1437 hdptx_write(hdptx, LANE_REG050D, 0x77); in hdptx_ropll_tmds_mode_config()
1438 hdptx_write(hdptx, LANE_REG050E, 0x38); in hdptx_ropll_tmds_mode_config()
1439 hdptx_write(hdptx, LANE_REG0510, 0x03); in hdptx_ropll_tmds_mode_config()
1440 hdptx_write(hdptx, LANE_REG0511, 0x0f); in hdptx_ropll_tmds_mode_config()
1441 hdptx_write(hdptx, LANE_REG0512, 0x00); in hdptx_ropll_tmds_mode_config()
1442 hdptx_write(hdptx, LANE_REG0516, 0x02); in hdptx_ropll_tmds_mode_config()
1443 hdptx_write(hdptx, LANE_REG051B, 0x01); in hdptx_ropll_tmds_mode_config()
1444 hdptx_write(hdptx, LANE_REG051E, 0x00); in hdptx_ropll_tmds_mode_config()
1445 hdptx_write(hdptx, LANE_REG051F, 0x15); in hdptx_ropll_tmds_mode_config()
1446 hdptx_write(hdptx, LANE_REG0520, 0xa0); in hdptx_ropll_tmds_mode_config()
1447 hdptx_write(hdptx, LANE_REG0603, 0x0c); in hdptx_ropll_tmds_mode_config()
1448 hdptx_write(hdptx, LANE_REG0607, 0x20); in hdptx_ropll_tmds_mode_config()
1449 hdptx_write(hdptx, LANE_REG060A, 0x17); in hdptx_ropll_tmds_mode_config()
1450 hdptx_write(hdptx, LANE_REG060B, 0x77); in hdptx_ropll_tmds_mode_config()
1451 hdptx_write(hdptx, LANE_REG060C, 0x77); in hdptx_ropll_tmds_mode_config()
1452 hdptx_write(hdptx, LANE_REG060D, 0x77); in hdptx_ropll_tmds_mode_config()
1453 hdptx_write(hdptx, LANE_REG060E, 0x38); in hdptx_ropll_tmds_mode_config()
1454 hdptx_write(hdptx, LANE_REG0610, 0x03); in hdptx_ropll_tmds_mode_config()
1455 hdptx_write(hdptx, LANE_REG0611, 0x0f); in hdptx_ropll_tmds_mode_config()
1456 hdptx_write(hdptx, LANE_REG0612, 0x00); in hdptx_ropll_tmds_mode_config()
1457 hdptx_write(hdptx, LANE_REG0616, 0x02); in hdptx_ropll_tmds_mode_config()
1458 hdptx_write(hdptx, LANE_REG061B, 0x01); in hdptx_ropll_tmds_mode_config()
1459 hdptx_write(hdptx, LANE_REG061E, 0x08); in hdptx_ropll_tmds_mode_config()
1462 hdptx_write(hdptx, LANE_REG031E, 0x02); in hdptx_ropll_tmds_mode_config()
1463 hdptx_write(hdptx, LANE_REG041E, 0x02); in hdptx_ropll_tmds_mode_config()
1464 hdptx_write(hdptx, LANE_REG051E, 0x02); in hdptx_ropll_tmds_mode_config()
1465 hdptx_write(hdptx, LANE_REG061E, 0x0a); in hdptx_ropll_tmds_mode_config()
1467 hdptx_write(hdptx, LANE_REG061F, 0x15); in hdptx_ropll_tmds_mode_config()
1468 hdptx_write(hdptx, LANE_REG0620, 0xa0); in hdptx_ropll_tmds_mode_config()
1470 hdptx_write(hdptx, LANE_REG0303, 0x2f); in hdptx_ropll_tmds_mode_config()
1471 hdptx_write(hdptx, LANE_REG0403, 0x2f); in hdptx_ropll_tmds_mode_config()
1472 hdptx_write(hdptx, LANE_REG0503, 0x2f); in hdptx_ropll_tmds_mode_config()
1473 hdptx_write(hdptx, LANE_REG0603, 0x2f); in hdptx_ropll_tmds_mode_config()
1474 hdptx_write(hdptx, LANE_REG0305, 0x03); in hdptx_ropll_tmds_mode_config()
1475 hdptx_write(hdptx, LANE_REG0405, 0x03); in hdptx_ropll_tmds_mode_config()
1476 hdptx_write(hdptx, LANE_REG0505, 0x03); in hdptx_ropll_tmds_mode_config()
1477 hdptx_write(hdptx, LANE_REG0605, 0x03); in hdptx_ropll_tmds_mode_config()
1478 hdptx_write(hdptx, LANE_REG0306, 0x1c); in hdptx_ropll_tmds_mode_config()
1479 hdptx_write(hdptx, LANE_REG0406, 0x1c); in hdptx_ropll_tmds_mode_config()
1480 hdptx_write(hdptx, LANE_REG0506, 0x1c); in hdptx_ropll_tmds_mode_config()
1481 hdptx_write(hdptx, LANE_REG0606, 0x1c); in hdptx_ropll_tmds_mode_config()
1483 return hdptx_post_enable_lane(hdptx); in hdptx_ropll_tmds_mode_config()
1487 hdptx_lcpll_ropll_cmn_config(struct rockchip_hdptx_phy *hdptx, in hdptx_lcpll_ropll_cmn_config() argument
1494 hdptx->rate = rate * 100; in hdptx_lcpll_ropll_cmn_config()
1496 hdptx_pre_power_up(hdptx); in hdptx_lcpll_ropll_cmn_config()
1498 reset_assert(&hdptx->ropll_reset); in hdptx_lcpll_ropll_cmn_config()
1500 reset_deassert(&hdptx->ropll_reset); in hdptx_lcpll_ropll_cmn_config()
1502 reset_assert(&hdptx->lcpll_reset); in hdptx_lcpll_ropll_cmn_config()
1504 reset_deassert(&hdptx->lcpll_reset); in hdptx_lcpll_ropll_cmn_config()
1508 hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val); in hdptx_lcpll_ropll_cmn_config()
1510 hdptx_write(hdptx, CMN_REG0008, 0xd0); in hdptx_lcpll_ropll_cmn_config()
1511 hdptx_write(hdptx, CMN_REG0009, 0x0c); in hdptx_lcpll_ropll_cmn_config()
1512 hdptx_write(hdptx, CMN_REG000A, 0x83); in hdptx_lcpll_ropll_cmn_config()
1513 hdptx_write(hdptx, CMN_REG000B, 0x06); in hdptx_lcpll_ropll_cmn_config()
1514 hdptx_write(hdptx, CMN_REG000C, 0x20); in hdptx_lcpll_ropll_cmn_config()
1515 hdptx_write(hdptx, CMN_REG000D, 0xb8); in hdptx_lcpll_ropll_cmn_config()
1516 hdptx_write(hdptx, CMN_REG000E, 0x0f); in hdptx_lcpll_ropll_cmn_config()
1517 hdptx_write(hdptx, CMN_REG000F, 0x0f); in hdptx_lcpll_ropll_cmn_config()
1518 hdptx_write(hdptx, CMN_REG0010, 0x04); in hdptx_lcpll_ropll_cmn_config()
1519 hdptx_write(hdptx, CMN_REG0011, 0x00); in hdptx_lcpll_ropll_cmn_config()
1520 hdptx_write(hdptx, CMN_REG0012, 0x26); in hdptx_lcpll_ropll_cmn_config()
1521 hdptx_write(hdptx, CMN_REG0013, 0x22); in hdptx_lcpll_ropll_cmn_config()
1522 hdptx_write(hdptx, CMN_REG0014, 0x24); in hdptx_lcpll_ropll_cmn_config()
1523 hdptx_write(hdptx, CMN_REG0015, 0x77); in hdptx_lcpll_ropll_cmn_config()
1524 hdptx_write(hdptx, CMN_REG0016, 0x08); in hdptx_lcpll_ropll_cmn_config()
1525 hdptx_write(hdptx, CMN_REG0017, 0x00); in hdptx_lcpll_ropll_cmn_config()
1526 hdptx_write(hdptx, CMN_REG0018, 0x04); in hdptx_lcpll_ropll_cmn_config()
1527 hdptx_write(hdptx, CMN_REG0019, 0x48); in hdptx_lcpll_ropll_cmn_config()
1528 hdptx_write(hdptx, CMN_REG001A, 0x01); in hdptx_lcpll_ropll_cmn_config()
1529 hdptx_write(hdptx, CMN_REG001B, 0x00); in hdptx_lcpll_ropll_cmn_config()
1530 hdptx_write(hdptx, CMN_REG001C, 0x01); in hdptx_lcpll_ropll_cmn_config()
1531 hdptx_write(hdptx, CMN_REG001D, 0x64); in hdptx_lcpll_ropll_cmn_config()
1532 hdptx_write(hdptx, CMN_REG001E, 0x35); in hdptx_lcpll_ropll_cmn_config()
1533 hdptx_write(hdptx, CMN_REG001F, 0x00); in hdptx_lcpll_ropll_cmn_config()
1534 hdptx_write(hdptx, CMN_REG0020, 0x6b); in hdptx_lcpll_ropll_cmn_config()
1535 hdptx_write(hdptx, CMN_REG0021, 0x6b); in hdptx_lcpll_ropll_cmn_config()
1536 hdptx_write(hdptx, CMN_REG0022, 0x11); in hdptx_lcpll_ropll_cmn_config()
1537 hdptx_write(hdptx, CMN_REG0024, 0x00); in hdptx_lcpll_ropll_cmn_config()
1538 hdptx_write(hdptx, CMN_REG0025, 0x10); in hdptx_lcpll_ropll_cmn_config()
1539 hdptx_write(hdptx, CMN_REG0026, 0x53); in hdptx_lcpll_ropll_cmn_config()
1540 hdptx_write(hdptx, CMN_REG0027, 0x15); in hdptx_lcpll_ropll_cmn_config()
1541 hdptx_write(hdptx, CMN_REG0028, 0x0d); in hdptx_lcpll_ropll_cmn_config()
1542 hdptx_write(hdptx, CMN_REG0029, 0x01); in hdptx_lcpll_ropll_cmn_config()
1543 hdptx_write(hdptx, CMN_REG002A, 0x09); in hdptx_lcpll_ropll_cmn_config()
1544 hdptx_write(hdptx, CMN_REG002B, 0x01); in hdptx_lcpll_ropll_cmn_config()
1545 hdptx_write(hdptx, CMN_REG002C, 0x02); in hdptx_lcpll_ropll_cmn_config()
1546 hdptx_write(hdptx, CMN_REG002D, 0x02); in hdptx_lcpll_ropll_cmn_config()
1547 hdptx_write(hdptx, CMN_REG002E, 0x0d); in hdptx_lcpll_ropll_cmn_config()
1548 hdptx_write(hdptx, CMN_REG002F, 0x61); in hdptx_lcpll_ropll_cmn_config()
1549 hdptx_write(hdptx, CMN_REG0030, 0x00); in hdptx_lcpll_ropll_cmn_config()
1550 hdptx_write(hdptx, CMN_REG0031, 0x20); in hdptx_lcpll_ropll_cmn_config()
1551 hdptx_write(hdptx, CMN_REG0032, 0x30); in hdptx_lcpll_ropll_cmn_config()
1552 hdptx_write(hdptx, CMN_REG0033, 0x0b); in hdptx_lcpll_ropll_cmn_config()
1553 hdptx_write(hdptx, CMN_REG0034, 0x23); in hdptx_lcpll_ropll_cmn_config()
1554 hdptx_write(hdptx, CMN_REG0035, 0x00); in hdptx_lcpll_ropll_cmn_config()
1555 hdptx_write(hdptx, CMN_REG0037, 0x00); in hdptx_lcpll_ropll_cmn_config()
1556 hdptx_write(hdptx, CMN_REG0038, 0x00); in hdptx_lcpll_ropll_cmn_config()
1557 hdptx_write(hdptx, CMN_REG0039, 0x00); in hdptx_lcpll_ropll_cmn_config()
1558 hdptx_write(hdptx, CMN_REG003A, 0x00); in hdptx_lcpll_ropll_cmn_config()
1559 hdptx_write(hdptx, CMN_REG003B, 0x00); in hdptx_lcpll_ropll_cmn_config()
1560 hdptx_write(hdptx, CMN_REG003C, 0x80); in hdptx_lcpll_ropll_cmn_config()
1561 hdptx_write(hdptx, CMN_REG003D, 0xc0); in hdptx_lcpll_ropll_cmn_config()
1562 hdptx_write(hdptx, CMN_REG003E, 0x0c); in hdptx_lcpll_ropll_cmn_config()
1563 hdptx_write(hdptx, CMN_REG003F, 0x83); in hdptx_lcpll_ropll_cmn_config()
1564 hdptx_write(hdptx, CMN_REG0040, 0x06); in hdptx_lcpll_ropll_cmn_config()
1565 hdptx_write(hdptx, CMN_REG0041, 0x20); in hdptx_lcpll_ropll_cmn_config()
1566 hdptx_write(hdptx, CMN_REG0042, 0xb8); in hdptx_lcpll_ropll_cmn_config()
1567 hdptx_write(hdptx, CMN_REG0043, 0x00); in hdptx_lcpll_ropll_cmn_config()
1568 hdptx_write(hdptx, CMN_REG0044, 0x46); in hdptx_lcpll_ropll_cmn_config()
1569 hdptx_write(hdptx, CMN_REG0045, 0x24); in hdptx_lcpll_ropll_cmn_config()
1570 hdptx_write(hdptx, CMN_REG0046, 0xff); in hdptx_lcpll_ropll_cmn_config()
1571 hdptx_write(hdptx, CMN_REG0047, 0x00); in hdptx_lcpll_ropll_cmn_config()
1572 hdptx_write(hdptx, CMN_REG0048, 0x44); in hdptx_lcpll_ropll_cmn_config()
1573 hdptx_write(hdptx, CMN_REG0049, 0xfa); in hdptx_lcpll_ropll_cmn_config()
1574 hdptx_write(hdptx, CMN_REG004A, 0x08); in hdptx_lcpll_ropll_cmn_config()
1575 hdptx_write(hdptx, CMN_REG004B, 0x00); in hdptx_lcpll_ropll_cmn_config()
1576 hdptx_write(hdptx, CMN_REG004C, 0x01); in hdptx_lcpll_ropll_cmn_config()
1577 hdptx_write(hdptx, CMN_REG004D, 0x64); in hdptx_lcpll_ropll_cmn_config()
1578 hdptx_write(hdptx, CMN_REG004E, 0x14); in hdptx_lcpll_ropll_cmn_config()
1579 hdptx_write(hdptx, CMN_REG004F, 0x00); in hdptx_lcpll_ropll_cmn_config()
1580 hdptx_write(hdptx, CMN_REG0050, 0x00); in hdptx_lcpll_ropll_cmn_config()
1581 hdptx_write(hdptx, CMN_REG0054, 0x19); in hdptx_lcpll_ropll_cmn_config()
1582 hdptx_write(hdptx, CMN_REG0058, 0x19); in hdptx_lcpll_ropll_cmn_config()
1583 hdptx_write(hdptx, CMN_REG0059, 0x11); in hdptx_lcpll_ropll_cmn_config()
1584 hdptx_write(hdptx, CMN_REG005B, 0x30); in hdptx_lcpll_ropll_cmn_config()
1585 hdptx_write(hdptx, CMN_REG005C, 0x25); in hdptx_lcpll_ropll_cmn_config()
1586 hdptx_write(hdptx, CMN_REG005D, 0x14); in hdptx_lcpll_ropll_cmn_config()
1587 hdptx_write(hdptx, CMN_REG005E, 0x0e); in hdptx_lcpll_ropll_cmn_config()
1588 hdptx_write(hdptx, CMN_REG005F, 0x01); in hdptx_lcpll_ropll_cmn_config()
1589 hdptx_write(hdptx, CMN_REG0063, 0x01); in hdptx_lcpll_ropll_cmn_config()
1590 hdptx_write(hdptx, CMN_REG0064, 0x0e); in hdptx_lcpll_ropll_cmn_config()
1591 hdptx_write(hdptx, CMN_REG0068, 0x00); in hdptx_lcpll_ropll_cmn_config()
1592 hdptx_write(hdptx, CMN_REG0069, 0x02); in hdptx_lcpll_ropll_cmn_config()
1593 hdptx_write(hdptx, CMN_REG006B, 0x00); in hdptx_lcpll_ropll_cmn_config()
1594 hdptx_write(hdptx, CMN_REG006F, 0x00); in hdptx_lcpll_ropll_cmn_config()
1595 hdptx_write(hdptx, CMN_REG0073, 0x02); in hdptx_lcpll_ropll_cmn_config()
1596 hdptx_write(hdptx, CMN_REG0074, 0x00); in hdptx_lcpll_ropll_cmn_config()
1597 hdptx_write(hdptx, CMN_REG0075, 0x20); in hdptx_lcpll_ropll_cmn_config()
1598 hdptx_write(hdptx, CMN_REG0076, 0x30); in hdptx_lcpll_ropll_cmn_config()
1599 hdptx_write(hdptx, CMN_REG0077, 0x08); in hdptx_lcpll_ropll_cmn_config()
1600 hdptx_write(hdptx, CMN_REG0078, 0x0c); in hdptx_lcpll_ropll_cmn_config()
1601 hdptx_write(hdptx, CMN_REG007A, 0x00); in hdptx_lcpll_ropll_cmn_config()
1602 hdptx_write(hdptx, CMN_REG007B, 0x00); in hdptx_lcpll_ropll_cmn_config()
1603 hdptx_write(hdptx, CMN_REG007C, 0x00); in hdptx_lcpll_ropll_cmn_config()
1604 hdptx_write(hdptx, CMN_REG007D, 0x00); in hdptx_lcpll_ropll_cmn_config()
1605 hdptx_write(hdptx, CMN_REG007E, 0x00); in hdptx_lcpll_ropll_cmn_config()
1606 hdptx_write(hdptx, CMN_REG007F, 0x00); in hdptx_lcpll_ropll_cmn_config()
1607 hdptx_write(hdptx, CMN_REG0080, 0x00); in hdptx_lcpll_ropll_cmn_config()
1608 hdptx_write(hdptx, CMN_REG0081, 0x09); in hdptx_lcpll_ropll_cmn_config()
1609 hdptx_write(hdptx, CMN_REG0082, 0x04); in hdptx_lcpll_ropll_cmn_config()
1610 hdptx_write(hdptx, CMN_REG0083, 0x24); in hdptx_lcpll_ropll_cmn_config()
1611 hdptx_write(hdptx, CMN_REG0084, 0x20); in hdptx_lcpll_ropll_cmn_config()
1612 hdptx_write(hdptx, CMN_REG0085, 0x03); in hdptx_lcpll_ropll_cmn_config()
1613 hdptx_write(hdptx, CMN_REG0086, 0x11); in hdptx_lcpll_ropll_cmn_config()
1614 hdptx_write(hdptx, CMN_REG0087, 0x0c); in hdptx_lcpll_ropll_cmn_config()
1615 hdptx_write(hdptx, CMN_REG0089, 0x00); in hdptx_lcpll_ropll_cmn_config()
1616 hdptx_write(hdptx, CMN_REG008A, 0x55); in hdptx_lcpll_ropll_cmn_config()
1617 hdptx_write(hdptx, CMN_REG008B, 0x25); in hdptx_lcpll_ropll_cmn_config()
1618 hdptx_write(hdptx, CMN_REG008C, 0x2c); in hdptx_lcpll_ropll_cmn_config()
1619 hdptx_write(hdptx, CMN_REG008D, 0x22); in hdptx_lcpll_ropll_cmn_config()
1620 hdptx_write(hdptx, CMN_REG008E, 0x14); in hdptx_lcpll_ropll_cmn_config()
1621 hdptx_write(hdptx, CMN_REG008F, 0x20); in hdptx_lcpll_ropll_cmn_config()
1622 hdptx_write(hdptx, CMN_REG0090, 0x00); in hdptx_lcpll_ropll_cmn_config()
1623 hdptx_write(hdptx, CMN_REG0091, 0x00); in hdptx_lcpll_ropll_cmn_config()
1624 hdptx_write(hdptx, CMN_REG0092, 0x00); in hdptx_lcpll_ropll_cmn_config()
1625 hdptx_write(hdptx, CMN_REG0093, 0x00); in hdptx_lcpll_ropll_cmn_config()
1626 hdptx_write(hdptx, CMN_REG0095, 0x03); in hdptx_lcpll_ropll_cmn_config()
1627 hdptx_write(hdptx, CMN_REG0097, 0x00); in hdptx_lcpll_ropll_cmn_config()
1628 hdptx_write(hdptx, CMN_REG0099, 0x00); in hdptx_lcpll_ropll_cmn_config()
1629 hdptx_write(hdptx, CMN_REG009A, 0x11); in hdptx_lcpll_ropll_cmn_config()
1630 hdptx_write(hdptx, CMN_REG009B, 0x10); in hdptx_lcpll_ropll_cmn_config()
1632 hdptx_write(hdptx, CMN_REG009E, 0x03); in hdptx_lcpll_ropll_cmn_config()
1633 hdptx_write(hdptx, CMN_REG00A0, 0x60); in hdptx_lcpll_ropll_cmn_config()
1634 hdptx_write(hdptx, CMN_REG009F, 0xff); in hdptx_lcpll_ropll_cmn_config()
1636 return hdptx_post_enable_pll(hdptx); in hdptx_lcpll_ropll_cmn_config()
1640 static int hdptx_lcpll_ropll_frl_mode_config(struct rockchip_hdptx_phy *hdptx) in hdptx_lcpll_ropll_frl_mode_config() argument
1642 hdptx_write(hdptx, SB_REG0114, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1643 hdptx_write(hdptx, SB_REG0115, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1644 hdptx_write(hdptx, SB_REG0116, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1645 hdptx_write(hdptx, SB_REG0117, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1646 hdptx_write(hdptx, LNTOP_REG0200, 0x04); in hdptx_lcpll_ropll_frl_mode_config()
1647 hdptx_write(hdptx, LNTOP_REG0201, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1648 hdptx_write(hdptx, LNTOP_REG0202, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1649 hdptx_write(hdptx, LNTOP_REG0203, 0xf0); in hdptx_lcpll_ropll_frl_mode_config()
1650 hdptx_write(hdptx, LNTOP_REG0204, 0xff); in hdptx_lcpll_ropll_frl_mode_config()
1651 hdptx_write(hdptx, LNTOP_REG0205, 0xff); in hdptx_lcpll_ropll_frl_mode_config()
1652 hdptx_write(hdptx, LNTOP_REG0206, 0x05); in hdptx_lcpll_ropll_frl_mode_config()
1653 hdptx_write(hdptx, LANE_REG0303, 0x0c); in hdptx_lcpll_ropll_frl_mode_config()
1654 hdptx_write(hdptx, LANE_REG0307, 0x20); in hdptx_lcpll_ropll_frl_mode_config()
1655 hdptx_write(hdptx, LANE_REG030A, 0x17); in hdptx_lcpll_ropll_frl_mode_config()
1656 hdptx_write(hdptx, LANE_REG030B, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1657 hdptx_write(hdptx, LANE_REG030C, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1658 hdptx_write(hdptx, LANE_REG030D, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1659 hdptx_write(hdptx, LANE_REG030E, 0x38); in hdptx_lcpll_ropll_frl_mode_config()
1660 hdptx_write(hdptx, LANE_REG0310, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1661 hdptx_write(hdptx, LANE_REG0311, 0x0f); in hdptx_lcpll_ropll_frl_mode_config()
1662 hdptx_write(hdptx, LANE_REG0312, 0x3c); in hdptx_lcpll_ropll_frl_mode_config()
1663 hdptx_write(hdptx, LANE_REG0316, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1664 hdptx_write(hdptx, LANE_REG031B, 0x01); in hdptx_lcpll_ropll_frl_mode_config()
1665 hdptx_write(hdptx, LANE_REG031F, 0x15); in hdptx_lcpll_ropll_frl_mode_config()
1666 hdptx_write(hdptx, LANE_REG0320, 0xa0); in hdptx_lcpll_ropll_frl_mode_config()
1667 hdptx_write(hdptx, LANE_REG0403, 0x0c); in hdptx_lcpll_ropll_frl_mode_config()
1668 hdptx_write(hdptx, LANE_REG0407, 0x20); in hdptx_lcpll_ropll_frl_mode_config()
1669 hdptx_write(hdptx, LANE_REG040A, 0x17); in hdptx_lcpll_ropll_frl_mode_config()
1670 hdptx_write(hdptx, LANE_REG040B, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1671 hdptx_write(hdptx, LANE_REG040C, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1672 hdptx_write(hdptx, LANE_REG040D, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1673 hdptx_write(hdptx, LANE_REG040E, 0x38); in hdptx_lcpll_ropll_frl_mode_config()
1674 hdptx_write(hdptx, LANE_REG0410, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1675 hdptx_write(hdptx, LANE_REG0411, 0x0f); in hdptx_lcpll_ropll_frl_mode_config()
1676 hdptx_write(hdptx, LANE_REG0412, 0x3c); in hdptx_lcpll_ropll_frl_mode_config()
1677 hdptx_write(hdptx, LANE_REG0416, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1678 hdptx_write(hdptx, LANE_REG041B, 0x01); in hdptx_lcpll_ropll_frl_mode_config()
1679 hdptx_write(hdptx, LANE_REG041F, 0x15); in hdptx_lcpll_ropll_frl_mode_config()
1680 hdptx_write(hdptx, LANE_REG0420, 0xa0); in hdptx_lcpll_ropll_frl_mode_config()
1681 hdptx_write(hdptx, LANE_REG0503, 0x0c); in hdptx_lcpll_ropll_frl_mode_config()
1682 hdptx_write(hdptx, LANE_REG0507, 0x20); in hdptx_lcpll_ropll_frl_mode_config()
1683 hdptx_write(hdptx, LANE_REG050A, 0x17); in hdptx_lcpll_ropll_frl_mode_config()
1684 hdptx_write(hdptx, LANE_REG050B, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1685 hdptx_write(hdptx, LANE_REG050C, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1686 hdptx_write(hdptx, LANE_REG050D, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1687 hdptx_write(hdptx, LANE_REG0507, 0x20); in hdptx_lcpll_ropll_frl_mode_config()
1688 hdptx_write(hdptx, LANE_REG050A, 0x17); in hdptx_lcpll_ropll_frl_mode_config()
1689 hdptx_write(hdptx, LANE_REG050B, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1690 hdptx_write(hdptx, LANE_REG050C, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1691 hdptx_write(hdptx, LANE_REG050D, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1692 hdptx_write(hdptx, LANE_REG050E, 0x38); in hdptx_lcpll_ropll_frl_mode_config()
1693 hdptx_write(hdptx, LANE_REG0510, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1694 hdptx_write(hdptx, LANE_REG0511, 0x0f); in hdptx_lcpll_ropll_frl_mode_config()
1695 hdptx_write(hdptx, LANE_REG0512, 0x3c); in hdptx_lcpll_ropll_frl_mode_config()
1696 hdptx_write(hdptx, LANE_REG0516, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1697 hdptx_write(hdptx, LANE_REG051B, 0x01); in hdptx_lcpll_ropll_frl_mode_config()
1698 hdptx_write(hdptx, LANE_REG051F, 0x15); in hdptx_lcpll_ropll_frl_mode_config()
1699 hdptx_write(hdptx, LANE_REG0520, 0xa0); in hdptx_lcpll_ropll_frl_mode_config()
1700 hdptx_write(hdptx, LANE_REG0603, 0x0c); in hdptx_lcpll_ropll_frl_mode_config()
1701 hdptx_write(hdptx, LANE_REG0607, 0x20); in hdptx_lcpll_ropll_frl_mode_config()
1702 hdptx_write(hdptx, LANE_REG060A, 0x17); in hdptx_lcpll_ropll_frl_mode_config()
1703 hdptx_write(hdptx, LANE_REG060B, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1704 hdptx_write(hdptx, LANE_REG060C, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1705 hdptx_write(hdptx, LANE_REG060D, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1706 hdptx_write(hdptx, LANE_REG060E, 0x38); in hdptx_lcpll_ropll_frl_mode_config()
1707 hdptx_write(hdptx, LANE_REG0610, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1708 hdptx_write(hdptx, LANE_REG0611, 0x0f); in hdptx_lcpll_ropll_frl_mode_config()
1709 hdptx_write(hdptx, LANE_REG0612, 0x3c); in hdptx_lcpll_ropll_frl_mode_config()
1710 hdptx_write(hdptx, LANE_REG0616, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1711 hdptx_write(hdptx, LANE_REG061B, 0x01); in hdptx_lcpll_ropll_frl_mode_config()
1712 hdptx_write(hdptx, LANE_REG061F, 0x15); in hdptx_lcpll_ropll_frl_mode_config()
1713 hdptx_write(hdptx, LANE_REG0620, 0xa0); in hdptx_lcpll_ropll_frl_mode_config()
1715 hdptx_write(hdptx, LANE_REG031E, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1716 hdptx_write(hdptx, LANE_REG041E, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1717 hdptx_write(hdptx, LANE_REG051E, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1718 hdptx_write(hdptx, LANE_REG061E, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1720 hdptx_write(hdptx, LANE_REG0303, 0x2f); in hdptx_lcpll_ropll_frl_mode_config()
1721 hdptx_write(hdptx, LANE_REG0403, 0x2f); in hdptx_lcpll_ropll_frl_mode_config()
1722 hdptx_write(hdptx, LANE_REG0503, 0x2f); in hdptx_lcpll_ropll_frl_mode_config()
1723 hdptx_write(hdptx, LANE_REG0603, 0x2f); in hdptx_lcpll_ropll_frl_mode_config()
1724 hdptx_write(hdptx, LANE_REG0305, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1725 hdptx_write(hdptx, LANE_REG0405, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1726 hdptx_write(hdptx, LANE_REG0505, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1727 hdptx_write(hdptx, LANE_REG0605, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1728 hdptx_write(hdptx, LANE_REG0306, 0xfc); in hdptx_lcpll_ropll_frl_mode_config()
1729 hdptx_write(hdptx, LANE_REG0406, 0xfc); in hdptx_lcpll_ropll_frl_mode_config()
1730 hdptx_write(hdptx, LANE_REG0506, 0xfc); in hdptx_lcpll_ropll_frl_mode_config()
1731 hdptx_write(hdptx, LANE_REG0606, 0xfc); in hdptx_lcpll_ropll_frl_mode_config()
1733 hdptx_write(hdptx, LANE_REG0305, 0x4f); in hdptx_lcpll_ropll_frl_mode_config()
1734 hdptx_write(hdptx, LANE_REG0405, 0x4f); in hdptx_lcpll_ropll_frl_mode_config()
1735 hdptx_write(hdptx, LANE_REG0505, 0x4f); in hdptx_lcpll_ropll_frl_mode_config()
1736 hdptx_write(hdptx, LANE_REG0605, 0x4f); in hdptx_lcpll_ropll_frl_mode_config()
1737 hdptx_write(hdptx, LANE_REG0304, 0x14); in hdptx_lcpll_ropll_frl_mode_config()
1738 hdptx_write(hdptx, LANE_REG0404, 0x14); in hdptx_lcpll_ropll_frl_mode_config()
1739 hdptx_write(hdptx, LANE_REG0504, 0x14); in hdptx_lcpll_ropll_frl_mode_config()
1740 hdptx_write(hdptx, LANE_REG0604, 0x14); in hdptx_lcpll_ropll_frl_mode_config()
1742 return hdptx_post_enable_lane(hdptx); in hdptx_lcpll_ropll_frl_mode_config()
1746 static int hdptx_lcpll_frl_mode_config(struct rockchip_hdptx_phy *hdptx, u32 rate) in hdptx_lcpll_frl_mode_config() argument
1748 hdptx_write(hdptx, LNTOP_REG0200, 0x04); in hdptx_lcpll_frl_mode_config()
1749 hdptx_write(hdptx, LNTOP_REG0201, 0x00); in hdptx_lcpll_frl_mode_config()
1750 hdptx_write(hdptx, LNTOP_REG0202, 0x00); in hdptx_lcpll_frl_mode_config()
1751 hdptx_write(hdptx, LNTOP_REG0203, 0xf0); in hdptx_lcpll_frl_mode_config()
1752 hdptx_write(hdptx, LNTOP_REG0204, 0xff); in hdptx_lcpll_frl_mode_config()
1753 hdptx_write(hdptx, LNTOP_REG0205, 0xff); in hdptx_lcpll_frl_mode_config()
1754 hdptx_write(hdptx, LNTOP_REG0206, 0x05); in hdptx_lcpll_frl_mode_config()
1755 hdptx_write(hdptx, LANE_REG0303, 0x0c); in hdptx_lcpll_frl_mode_config()
1756 hdptx_write(hdptx, LANE_REG0307, 0x20); in hdptx_lcpll_frl_mode_config()
1757 hdptx_write(hdptx, LANE_REG030A, 0x17); in hdptx_lcpll_frl_mode_config()
1758 hdptx_write(hdptx, LANE_REG030B, 0x77); in hdptx_lcpll_frl_mode_config()
1759 hdptx_write(hdptx, LANE_REG030C, 0x77); in hdptx_lcpll_frl_mode_config()
1760 hdptx_write(hdptx, LANE_REG030D, 0x77); in hdptx_lcpll_frl_mode_config()
1761 hdptx_write(hdptx, LANE_REG030E, 0x38); in hdptx_lcpll_frl_mode_config()
1762 hdptx_write(hdptx, LANE_REG0310, 0x03); in hdptx_lcpll_frl_mode_config()
1763 hdptx_write(hdptx, LANE_REG0311, 0x0f); in hdptx_lcpll_frl_mode_config()
1764 hdptx_write(hdptx, LANE_REG0312, 0x3c); in hdptx_lcpll_frl_mode_config()
1765 hdptx_write(hdptx, LANE_REG0316, 0x02); in hdptx_lcpll_frl_mode_config()
1766 hdptx_write(hdptx, LANE_REG031B, 0x01); in hdptx_lcpll_frl_mode_config()
1767 hdptx_write(hdptx, LANE_REG031F, 0x15); in hdptx_lcpll_frl_mode_config()
1768 hdptx_write(hdptx, LANE_REG0320, 0xa0); in hdptx_lcpll_frl_mode_config()
1769 hdptx_write(hdptx, LANE_REG0403, 0x0c); in hdptx_lcpll_frl_mode_config()
1770 hdptx_write(hdptx, LANE_REG0407, 0x20); in hdptx_lcpll_frl_mode_config()
1771 hdptx_write(hdptx, LANE_REG040A, 0x17); in hdptx_lcpll_frl_mode_config()
1772 hdptx_write(hdptx, LANE_REG040B, 0x77); in hdptx_lcpll_frl_mode_config()
1773 hdptx_write(hdptx, LANE_REG040C, 0x77); in hdptx_lcpll_frl_mode_config()
1774 hdptx_write(hdptx, LANE_REG040D, 0x77); in hdptx_lcpll_frl_mode_config()
1775 hdptx_write(hdptx, LANE_REG040E, 0x38); in hdptx_lcpll_frl_mode_config()
1776 hdptx_write(hdptx, LANE_REG0410, 0x03); in hdptx_lcpll_frl_mode_config()
1777 hdptx_write(hdptx, LANE_REG0411, 0x0f); in hdptx_lcpll_frl_mode_config()
1778 hdptx_write(hdptx, LANE_REG0412, 0x3c); in hdptx_lcpll_frl_mode_config()
1779 hdptx_write(hdptx, LANE_REG0416, 0x02); in hdptx_lcpll_frl_mode_config()
1780 hdptx_write(hdptx, LANE_REG041B, 0x01); in hdptx_lcpll_frl_mode_config()
1781 hdptx_write(hdptx, LANE_REG041F, 0x15); in hdptx_lcpll_frl_mode_config()
1782 hdptx_write(hdptx, LANE_REG0420, 0xa0); in hdptx_lcpll_frl_mode_config()
1783 hdptx_write(hdptx, LANE_REG0503, 0x0c); in hdptx_lcpll_frl_mode_config()
1784 hdptx_write(hdptx, LANE_REG0507, 0x20); in hdptx_lcpll_frl_mode_config()
1785 hdptx_write(hdptx, LANE_REG050A, 0x17); in hdptx_lcpll_frl_mode_config()
1786 hdptx_write(hdptx, LANE_REG050B, 0x77); in hdptx_lcpll_frl_mode_config()
1787 hdptx_write(hdptx, LANE_REG050C, 0x77); in hdptx_lcpll_frl_mode_config()
1788 hdptx_write(hdptx, LANE_REG050D, 0x77); in hdptx_lcpll_frl_mode_config()
1789 hdptx_write(hdptx, LANE_REG050E, 0x38); in hdptx_lcpll_frl_mode_config()
1790 hdptx_write(hdptx, LANE_REG0510, 0x03); in hdptx_lcpll_frl_mode_config()
1791 hdptx_write(hdptx, LANE_REG0511, 0x0f); in hdptx_lcpll_frl_mode_config()
1792 hdptx_write(hdptx, LANE_REG0512, 0x3c); in hdptx_lcpll_frl_mode_config()
1793 hdptx_write(hdptx, LANE_REG0516, 0x02); in hdptx_lcpll_frl_mode_config()
1794 hdptx_write(hdptx, LANE_REG051B, 0x01); in hdptx_lcpll_frl_mode_config()
1795 hdptx_write(hdptx, LANE_REG051F, 0x15); in hdptx_lcpll_frl_mode_config()
1796 hdptx_write(hdptx, LANE_REG0520, 0xa0); in hdptx_lcpll_frl_mode_config()
1797 hdptx_write(hdptx, LANE_REG0603, 0x0c); in hdptx_lcpll_frl_mode_config()
1798 hdptx_write(hdptx, LANE_REG0607, 0x20); in hdptx_lcpll_frl_mode_config()
1799 hdptx_write(hdptx, LANE_REG060A, 0x17); in hdptx_lcpll_frl_mode_config()
1800 hdptx_write(hdptx, LANE_REG060B, 0x77); in hdptx_lcpll_frl_mode_config()
1801 hdptx_write(hdptx, LANE_REG060C, 0x77); in hdptx_lcpll_frl_mode_config()
1802 hdptx_write(hdptx, LANE_REG060D, 0x77); in hdptx_lcpll_frl_mode_config()
1803 hdptx_write(hdptx, LANE_REG060E, 0x38); in hdptx_lcpll_frl_mode_config()
1804 hdptx_write(hdptx, LANE_REG0610, 0x03); in hdptx_lcpll_frl_mode_config()
1805 hdptx_write(hdptx, LANE_REG0611, 0x0f); in hdptx_lcpll_frl_mode_config()
1806 hdptx_write(hdptx, LANE_REG0612, 0x3c); in hdptx_lcpll_frl_mode_config()
1807 hdptx_write(hdptx, LANE_REG0616, 0x02); in hdptx_lcpll_frl_mode_config()
1808 hdptx_write(hdptx, LANE_REG061B, 0x01); in hdptx_lcpll_frl_mode_config()
1809 hdptx_write(hdptx, LANE_REG061F, 0x15); in hdptx_lcpll_frl_mode_config()
1810 hdptx_write(hdptx, LANE_REG0620, 0xa0); in hdptx_lcpll_frl_mode_config()
1812 hdptx_write(hdptx, LANE_REG031E, 0x02); in hdptx_lcpll_frl_mode_config()
1813 hdptx_write(hdptx, LANE_REG041E, 0x02); in hdptx_lcpll_frl_mode_config()
1814 hdptx_write(hdptx, LANE_REG051E, 0x02); in hdptx_lcpll_frl_mode_config()
1815 hdptx_write(hdptx, LANE_REG061E, 0x02); in hdptx_lcpll_frl_mode_config()
1817 hdptx_write(hdptx, LANE_REG0303, 0x2f); in hdptx_lcpll_frl_mode_config()
1818 hdptx_write(hdptx, LANE_REG0403, 0x2f); in hdptx_lcpll_frl_mode_config()
1819 hdptx_write(hdptx, LANE_REG0503, 0x2f); in hdptx_lcpll_frl_mode_config()
1820 hdptx_write(hdptx, LANE_REG0603, 0x2f); in hdptx_lcpll_frl_mode_config()
1821 hdptx_write(hdptx, LANE_REG0305, 0x03); in hdptx_lcpll_frl_mode_config()
1822 hdptx_write(hdptx, LANE_REG0405, 0x03); in hdptx_lcpll_frl_mode_config()
1823 hdptx_write(hdptx, LANE_REG0505, 0x03); in hdptx_lcpll_frl_mode_config()
1824 hdptx_write(hdptx, LANE_REG0605, 0x03); in hdptx_lcpll_frl_mode_config()
1825 hdptx_write(hdptx, LANE_REG0306, 0xfc); in hdptx_lcpll_frl_mode_config()
1826 hdptx_write(hdptx, LANE_REG0406, 0xfc); in hdptx_lcpll_frl_mode_config()
1827 hdptx_write(hdptx, LANE_REG0506, 0xfc); in hdptx_lcpll_frl_mode_config()
1828 hdptx_write(hdptx, LANE_REG0606, 0xfc); in hdptx_lcpll_frl_mode_config()
1830 hdptx_write(hdptx, LANE_REG0305, 0x4f); in hdptx_lcpll_frl_mode_config()
1831 hdptx_write(hdptx, LANE_REG0405, 0x4f); in hdptx_lcpll_frl_mode_config()
1832 hdptx_write(hdptx, LANE_REG0505, 0x4f); in hdptx_lcpll_frl_mode_config()
1833 hdptx_write(hdptx, LANE_REG0605, 0x4f); in hdptx_lcpll_frl_mode_config()
1834 hdptx_write(hdptx, LANE_REG0304, 0x14); in hdptx_lcpll_frl_mode_config()
1835 hdptx_write(hdptx, LANE_REG0404, 0x14); in hdptx_lcpll_frl_mode_config()
1836 hdptx_write(hdptx, LANE_REG0504, 0x14); in hdptx_lcpll_frl_mode_config()
1837 hdptx_write(hdptx, LANE_REG0604, 0x14); in hdptx_lcpll_frl_mode_config()
1839 return hdptx_post_enable_lane(hdptx); in hdptx_lcpll_frl_mode_config()
1844 struct rockchip_hdptx_phy *hdptx = dev_get_priv(phy->dev); in rockchip_hdptx_phy_power_on() local
1845 int bus_width = hdptx->bus_width; in rockchip_hdptx_phy_power_on()
1852 return hdptx_lcpll_frl_mode_config(hdptx, bus_width); in rockchip_hdptx_phy_power_on()
1854 return hdptx_lcpll_ropll_frl_mode_config(hdptx); in rockchip_hdptx_phy_power_on()
1856 return hdptx_ropll_tmds_mode_config(hdptx, bus_width); in rockchip_hdptx_phy_power_on()
1883 struct rockchip_hdptx_phy *hdptx = dev_get_priv(phy->dev); in rockchip_hdptx_phy_clk_set_rate() local
1884 int bus_width = hdptx->bus_width; in rockchip_hdptx_phy_clk_set_rate()
1891 return hdptx_ropll_cmn_config(hdptx, rate); in rockchip_hdptx_phy_clk_set_rate()
1897 struct rockchip_hdptx_phy *hdptx = dev_get_priv(phy->dev); in rockchip_hdptx_phy_set_bus_width() local
1899 hdptx->bus_width = bus_width; in rockchip_hdptx_phy_set_bus_width()
1922 struct rockchip_hdptx_phy *hdptx = dev_get_priv(dev); in rockchip_hdptx_phy_hdmi_probe() local
1927 hdptx->id = of_alias_get_id(ofnode_to_np(dev->node), "hdptxhdmi"); in rockchip_hdptx_phy_hdmi_probe()
1928 if (hdptx->id < 0) in rockchip_hdptx_phy_hdmi_probe()
1929 hdptx->id = 0; in rockchip_hdptx_phy_hdmi_probe()
1931 if (!hdptx->id) { in rockchip_hdptx_phy_hdmi_probe()
1932 g_hdptx0 = hdptx; in rockchip_hdptx_phy_hdmi_probe()
1936 g_hdptx1 = hdptx; in rockchip_hdptx_phy_hdmi_probe()
1941 hdptx->base = dev_read_addr_ptr(dev); in rockchip_hdptx_phy_hdmi_probe()
1942 if (!hdptx->base) in rockchip_hdptx_phy_hdmi_probe()
1950 hdptx->grf = syscon_get_regmap(syscon); in rockchip_hdptx_phy_hdmi_probe()
1951 if (IS_ERR(hdptx->grf)) { in rockchip_hdptx_phy_hdmi_probe()
1952 ret = PTR_ERR(hdptx->grf); in rockchip_hdptx_phy_hdmi_probe()
1957 hdptx->dev = dev; in rockchip_hdptx_phy_hdmi_probe()
1960 ret = reset_get_by_name(dev, "apb", &hdptx->apb_reset); in rockchip_hdptx_phy_hdmi_probe()
1966 ret = reset_get_by_name(dev, "init", &hdptx->init_reset); in rockchip_hdptx_phy_hdmi_probe()
1972 ret = reset_get_by_name(dev, "cmn", &hdptx->cmn_reset); in rockchip_hdptx_phy_hdmi_probe()
1978 ret = reset_get_by_name(dev, "lane", &hdptx->lane_reset); in rockchip_hdptx_phy_hdmi_probe()
1984 ret = reset_get_by_name(dev, "ropll", &hdptx->ropll_reset); in rockchip_hdptx_phy_hdmi_probe()
1990 ret = reset_get_by_name(dev, "lcpll", &hdptx->lcpll_reset); in rockchip_hdptx_phy_hdmi_probe()
2064 struct rockchip_hdptx_phy *hdptx = get_hdptx(clk->dev); in hdptx_clk_set_rate() local
2065 int bus_width = hdptx->bus_width; in hdptx_clk_set_rate()
2076 if (!hdptx_lcpll_ropll_cmn_config(hdptx, rate)) { in hdptx_clk_set_rate()
2081 if (!hdptx_lcpll_cmn_config(hdptx, rate)) { in hdptx_clk_set_rate()
2087 if (!hdptx_ropll_cmn_config(hdptx, rate)) { in hdptx_clk_set_rate()