Lines Matching +full:decimation +full:- +full:ratio
2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch-rockchip/clock.h>
19 #include <linux/media-bus-format.h>
35 * slow so we pre-compute values we expect to see.
215 writel(val, hdmi->regs + (offset << 2)); in dw_hdmi_writel()
220 return readl(hdmi->regs + (offset << 2)); in dw_hdmi_readl()
225 writeb(val, hdmi->regs + offset); in dw_hdmi_writeb()
230 return readb(hdmi->regs + offset); in dw_hdmi_readb()
235 hdmi->write(hdmi, val, offset); in hdmi_writeb()
240 return hdmi->read(hdmi, offset); in hdmi_readb()
346 hdmi->edid_data.preferred_mode; in is_color_space_conversion()
350 (hdmi->hdmi_data.quant_range == in is_color_space_conversion()
357 if (hdmi->hdmi_data.enc_in_bus_format != in is_color_space_conversion()
358 hdmi->hdmi_data.enc_out_bus_format || in is_color_space_conversion()
359 ((hdmi->hdmi_data.quant_range == HDMI_QUANTIZATION_RANGE_LIMITED || in is_color_space_conversion()
361 hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format))) in is_color_space_conversion()
369 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) in is_color_space_decimation()
372 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) || in is_color_space_decimation()
373 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_in_bus_format)) in is_color_space_decimation()
415 struct dw_hdmi_i2c *i2c = hdmi->i2c; in dw_hdmi_i2c_read()
419 if (!i2c->is_regaddr) { in dw_hdmi_i2c_read()
421 i2c->slave_reg = 0x00; in dw_hdmi_i2c_read()
422 i2c->is_regaddr = true; in dw_hdmi_i2c_read()
430 hdmi_writeb(hdmi, i2c->slave_reg, HDMI_I2CM_ADDRESS); in dw_hdmi_i2c_read()
433 i2c->slave_reg += 8; in dw_hdmi_i2c_read()
434 length -= 8; in dw_hdmi_i2c_read()
436 i2c->slave_reg++; in dw_hdmi_i2c_read()
437 length--; in dw_hdmi_i2c_read()
440 if (i2c->is_segment) { in dw_hdmi_i2c_read()
456 while (i--) { in dw_hdmi_i2c_read()
469 __func__, i2c->slave_reg); in dw_hdmi_i2c_read()
474 return -EAGAIN; in dw_hdmi_i2c_read()
480 __func__, i2c->slave_reg, interrupt); in dw_hdmi_i2c_read()
485 return -EIO; in dw_hdmi_i2c_read()
495 i2c->is_segment = false; in dw_hdmi_i2c_read()
503 struct dw_hdmi_i2c *i2c = hdmi->i2c; in dw_hdmi_i2c_write()
507 if (!i2c->is_regaddr) { in dw_hdmi_i2c_write()
509 i2c->slave_reg = buf[0]; in dw_hdmi_i2c_write()
510 length--; in dw_hdmi_i2c_write()
512 i2c->is_regaddr = true; in dw_hdmi_i2c_write()
515 while (length--) { in dw_hdmi_i2c_write()
517 hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS); in dw_hdmi_i2c_write()
521 while (i--) { in dw_hdmi_i2c_write()
535 __func__, i2c->slave_reg); in dw_hdmi_i2c_write()
540 return -EAGAIN; in dw_hdmi_i2c_write()
543 if ((interrupt & m_I2CM_ERROR) || (i == -1)) { in dw_hdmi_i2c_write()
549 return -EIO; in dw_hdmi_i2c_write()
552 __func__, i2c->slave_reg); in dw_hdmi_i2c_write()
553 return -EAGAIN; in dw_hdmi_i2c_write()
566 struct dw_hdmi_i2c *i2c = hdmi->i2c; in dw_hdmi_i2c_xfer()
575 return -EOPNOTSUPP; in dw_hdmi_i2c_xfer()
587 i2c->is_regaddr = false; in dw_hdmi_i2c_xfer()
590 i2c->is_segment = false; in dw_hdmi_i2c_xfer()
596 i2c->is_segment = true; in dw_hdmi_i2c_xfer()
626 if (msec-- == 0) in hdmi_phy_wait_i2c_done()
700 const struct dw_hdmi_phy_data *phy = hdmi->phy.data; in dw_hdmi_phy_power_off()
704 if (phy->gen == 1) { in dw_hdmi_phy_power_off()
734 const struct dw_hdmi_phy_data *phy = hdmi->phy.data; in dw_hdmi_phy_power_on()
738 if (phy->gen == 1) { in dw_hdmi_phy_power_on()
761 return -ETIMEDOUT; in dw_hdmi_phy_power_on()
778 const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg; in hdmi_phy_configure_dwc_hdmi_3d_tx()
779 const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr; in hdmi_phy_configure_dwc_hdmi_3d_tx()
780 const struct dw_hdmi_phy_config *phy_config = pdata->phy_config; in hdmi_phy_configure_dwc_hdmi_3d_tx()
781 unsigned int tmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock; in hdmi_phy_configure_dwc_hdmi_3d_tx()
783 hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format); in hdmi_phy_configure_dwc_hdmi_3d_tx()
785 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) && in hdmi_phy_configure_dwc_hdmi_3d_tx()
786 pdata->mpll_cfg_420) in hdmi_phy_configure_dwc_hdmi_3d_tx()
787 mpll_config = pdata->mpll_cfg_420; in hdmi_phy_configure_dwc_hdmi_3d_tx()
789 /* PLL/MPLL Cfg - always match on final entry */ in hdmi_phy_configure_dwc_hdmi_3d_tx()
790 for (; mpll_config->mpixelclock != ~0UL; mpll_config++) in hdmi_phy_configure_dwc_hdmi_3d_tx()
791 if (mpixelclock <= mpll_config->mpixelclock) in hdmi_phy_configure_dwc_hdmi_3d_tx()
794 for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++) in hdmi_phy_configure_dwc_hdmi_3d_tx()
795 if (tmdsclock <= curr_ctrl->mpixelclock) in hdmi_phy_configure_dwc_hdmi_3d_tx()
798 for (; phy_config->mpixelclock != ~0UL; phy_config++) in hdmi_phy_configure_dwc_hdmi_3d_tx()
799 if (tmdsclock <= phy_config->mpixelclock) in hdmi_phy_configure_dwc_hdmi_3d_tx()
802 if (mpll_config->mpixelclock == ~0UL || in hdmi_phy_configure_dwc_hdmi_3d_tx()
803 curr_ctrl->mpixelclock == ~0UL || in hdmi_phy_configure_dwc_hdmi_3d_tx()
804 phy_config->mpixelclock == ~0UL) in hdmi_phy_configure_dwc_hdmi_3d_tx()
805 return -EINVAL; in hdmi_phy_configure_dwc_hdmi_3d_tx()
807 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) in hdmi_phy_configure_dwc_hdmi_3d_tx()
808 depth = fls(depth - 8); in hdmi_phy_configure_dwc_hdmi_3d_tx()
812 depth--; in hdmi_phy_configure_dwc_hdmi_3d_tx()
814 dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].cpce, in hdmi_phy_configure_dwc_hdmi_3d_tx()
817 dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].gmp, in hdmi_phy_configure_dwc_hdmi_3d_tx()
819 dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[depth], in hdmi_phy_configure_dwc_hdmi_3d_tx()
826 dw_hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM); in hdmi_phy_configure_dwc_hdmi_3d_tx()
827 dw_hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr, in hdmi_phy_configure_dwc_hdmi_3d_tx()
829 dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr, in hdmi_phy_configure_dwc_hdmi_3d_tx()
879 drm_scdc_readb(&hdmi->adap, SCDC_TMDS_CONFIG, &stat); in rockchip_dw_hdmi_scrambling_enable()
889 drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat); in rockchip_dw_hdmi_scrambling_enable()
903 drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat); in rockchip_dw_hdmi_scrambling_enable()
913 drm_scdc_readb(&hdmi->adap, SCDC_TMDS_CONFIG, &stat); in rockchip_dw_hdmi_scdc_set_tmds_rate()
914 if (hdmi->hdmi_data.video_mode.mtmdsclock > 340000000) in rockchip_dw_hdmi_scdc_set_tmds_rate()
918 drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat); in rockchip_dw_hdmi_scdc_set_tmds_rate()
923 const struct dw_hdmi_phy_data *phy = hdmi->phy.data; in hdmi_phy_configure()
924 const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; in hdmi_phy_configure()
925 unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock; in hdmi_phy_configure()
926 unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock; in hdmi_phy_configure()
931 /* Control for TMDS Bit Period/TMDS Clock-Period Ratio */ in hdmi_phy_configure()
932 if (hdmi->edid_data.display_info.hdmi.scdc.supported) in hdmi_phy_configure()
936 if (phy->has_svsret) in hdmi_phy_configure()
951 if (pdata->configure_phy) in hdmi_phy_configure()
952 ret = pdata->configure_phy(hdmi, pdata, mpixelclock); in hdmi_phy_configure()
954 ret = phy->configure(hdmi, pdata, mpixelclock); in hdmi_phy_configure()
1016 hdmi->dev_type == RK3528_HDMI || in dw_hdmi_detect_phy()
1017 hdmi->dev_type == RK3328_HDMI || in dw_hdmi_detect_phy()
1018 hdmi->dev_type == RK3228_HDMI) { in dw_hdmi_detect_phy()
1020 if (!hdmi->plat_data->phy_ops || !hdmi->plat_data->phy_name) { in dw_hdmi_detect_phy()
1023 return -ENODEV; in dw_hdmi_detect_phy()
1026 hdmi->phy.ops = hdmi->plat_data->phy_ops; in dw_hdmi_detect_phy()
1027 hdmi->phy.data = hdmi->plat_data->phy_data; in dw_hdmi_detect_phy()
1028 hdmi->phy.name = hdmi->plat_data->phy_name; in dw_hdmi_detect_phy()
1035 hdmi->phy.ops = &dw_hdmi_synopsys_phy_ops; in dw_hdmi_detect_phy()
1036 hdmi->phy.name = dw_hdmi_phys[i].name; in dw_hdmi_detect_phy()
1037 hdmi->phy.data = (void *)&dw_hdmi_phys[i]; in dw_hdmi_detect_phy()
1040 !hdmi->plat_data->configure_phy) { in dw_hdmi_detect_phy()
1042 hdmi->phy.name); in dw_hdmi_detect_phy()
1043 return -ENODEV; in dw_hdmi_detect_phy()
1051 return -ENODEV; in dw_hdmi_detect_phy()
1059 hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format); in hdmi_get_tmdsclock()
1061 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_get_tmdsclock()
1084 struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; in hdmi_av_composer()
1085 struct drm_hdmi_info *hdmi_info = &hdmi->edid_data.display_info.hdmi; in hdmi_av_composer()
1089 vmode->mpixelclock = mode->crtc_clock * 1000; in hdmi_av_composer()
1090 if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == in hdmi_av_composer()
1092 vmode->mpixelclock *= 2; in hdmi_av_composer()
1093 vmode->mtmdsclock = hdmi_get_tmdsclock(hdmi, vmode->mpixelclock); in hdmi_av_composer()
1094 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) in hdmi_av_composer()
1095 vmode->mtmdsclock /= 2; in hdmi_av_composer()
1097 vmode->mpixelclock, vmode->mtmdsclock); in hdmi_av_composer()
1106 inv_val |= mode->flags & DRM_MODE_FLAG_PVSYNC ? in hdmi_av_composer()
1110 inv_val |= mode->flags & DRM_MODE_FLAG_PHSYNC ? in hdmi_av_composer()
1114 inv_val |= (vmode->mdataenablepolarity ? in hdmi_av_composer()
1118 if (hdmi->vic == 39) in hdmi_av_composer()
1121 inv_val |= mode->flags & DRM_MODE_FLAG_INTERLACE ? in hdmi_av_composer()
1125 inv_val |= mode->flags & DRM_MODE_FLAG_INTERLACE ? in hdmi_av_composer()
1129 inv_val |= hdmi->sink_is_hdmi ? in hdmi_av_composer()
1135 hdisplay = mode->hdisplay; in hdmi_av_composer()
1136 hblank = mode->htotal - mode->hdisplay; in hdmi_av_composer()
1137 h_de_hs = mode->hsync_start - mode->hdisplay; in hdmi_av_composer()
1138 hsync_len = mode->hsync_end - mode->hsync_start; in hdmi_av_composer()
1144 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_av_composer()
1151 vdisplay = mode->vdisplay; in hdmi_av_composer()
1152 vblank = mode->vtotal - mode->vdisplay; in hdmi_av_composer()
1153 v_de_vs = mode->vsync_start - mode->vdisplay; in hdmi_av_composer()
1154 vsync_len = mode->vsync_end - mode->vsync_start; in hdmi_av_composer()
1160 if (mode->flags & DRM_MODE_FLAG_INTERLACE) { in hdmi_av_composer()
1165 } else if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == in hdmi_av_composer()
1167 vdisplay += mode->vtotal; in hdmi_av_composer()
1171 if (hdmi_info->scdc.supported) { in hdmi_av_composer()
1172 if (vmode->mtmdsclock > 340000000 || in hdmi_av_composer()
1173 (hdmi_info->scdc.scrambling.low_rates && in hdmi_av_composer()
1174 hdmi->scramble_low_rates)) { in hdmi_av_composer()
1175 drm_scdc_readb(&hdmi->adap, SCDC_SINK_VERSION, &bytes); in hdmi_av_composer()
1176 drm_scdc_writeb(&hdmi->adap, SCDC_SOURCE_VERSION, in hdmi_av_composer()
1221 enc_out_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format); in dw_hdmi_update_csc_coeffs()
1222 enc_in_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format); in dw_hdmi_update_csc_coeffs()
1229 if (hdmi->hdmi_data.enc_out_encoding == in dw_hdmi_update_csc_coeffs()
1235 if (hdmi->hdmi_data.enc_out_encoding == in dw_hdmi_update_csc_coeffs()
1264 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_in_bus_format)) in is_color_space_interpolation()
1267 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) || in is_color_space_interpolation()
1268 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) in is_color_space_interpolation()
1278 int decimation = 0; in hdmi_video_csc() local
1284 decimation = HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3; in hdmi_video_csc()
1286 switch (hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_csc()
1305 hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG); in hdmi_video_csc()
1341 if (hdmi->hdmi_data.video_mode.mpixelrepetitioninput) { in dw_hdmi_enable_video_path()
1373 switch (hdmi->version) { in dw_hdmi_clear_overflow()
1406 struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data; in hdmi_video_packetize()
1409 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) || in hdmi_video_packetize()
1410 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format) || in hdmi_video_packetize()
1411 hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_packetize()
1413 hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_packetize()
1430 } else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_packetize()
1432 hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_packetize()
1461 if (hdmi_data->pix_repet_factor > 0) { in hdmi_video_packetize()
1512 switch (hdmi->hdmi_data.enc_in_bus_format) { in hdmi_video_sample()
1578 if (hdmi->phy.enabled) { in dw_hdmi_disable()
1579 hdmi->phy.ops->disable(conn, hdmi, state); in dw_hdmi_disable()
1580 hdmi->phy.enabled = false; in dw_hdmi_disable()
1590 hdmi->hdmi_data.quant_range; in hdmi_config_AVI()
1592 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) || in hdmi_config_AVI()
1593 hdmi->edid_data.display_info.hdmi.scdc.supported) in hdmi_config_AVI()
1604 if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) in hdmi_config_AVI()
1606 else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) in hdmi_config_AVI()
1608 else if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) in hdmi_config_AVI()
1614 switch (hdmi->hdmi_data.enc_out_encoding) { in hdmi_config_AVI()
1616 if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV601) in hdmi_config_AVI()
1624 if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV709) in hdmi_config_AVI()
1677 /* AVI Data Byte 5- set up input and output pixel repetition */ in hdmi_config_AVI()
1678 val = (((hdmi->hdmi_data.video_mode.mpixelrepetitioninput + 1) << in hdmi_config_AVI()
1681 ((hdmi->hdmi_data.video_mode.mpixelrepetitionoutput << in hdmi_config_AVI()
1694 /* AVI Data Bytes 6-13 */ in hdmi_config_AVI()
1781 const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data; in hdmi_match_tmds_n_table()
1785 if (plat_data->tmds_n_table) { in hdmi_match_tmds_n_table()
1786 for (i = 0; plat_data->tmds_n_table[i].tmds != 0; i++) { in hdmi_match_tmds_n_table()
1787 if (pixel_clk == plat_data->tmds_n_table[i].tmds) { in hdmi_match_tmds_n_table()
1788 tmds_n = &plat_data->tmds_n_table[i]; in hdmi_match_tmds_n_table()
1804 return -ENOENT; in hdmi_match_tmds_n_table()
1808 return tmds_n->n_32k; in hdmi_match_tmds_n_table()
1812 return (freq / 44100) * tmds_n->n_44k1; in hdmi_match_tmds_n_table()
1816 return (freq / 48000) * tmds_n->n_48k; in hdmi_match_tmds_n_table()
1818 return -ENOENT; in hdmi_match_tmds_n_table()
1833 diff = final - (u64)cts * (128 * freq); in hdmi_audio_math_diff()
1858 abs(n - ideal_n) < best_n_distance)) { in hdmi_compute_n()
1861 best_n_distance = abs(best_n - ideal_n); in hdmi_compute_n()
1868 if ((best_diff == 0) && (abs(n - ideal_n) > best_n_distance)) in hdmi_compute_n()
1902 * can be up to 20 bits in total, so we need 64-bit math. Also in hdmi_set_clk_regenerator()
1914 hdmi->audio_n = n; in hdmi_set_clk_regenerator()
1915 hdmi->audio_cts = cts; in hdmi_set_clk_regenerator()
1916 hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0); in hdmi_set_clk_regenerator()
1921 hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock, in hdmi_clk_regenerator_update_pixel_clock()
1922 hdmi->sample_rate); in hdmi_clk_regenerator_update_pixel_clock()
1932 hdmi->sample_rate = rate; in dw_hdmi_set_sample_rate()
1933 hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock, in dw_hdmi_set_sample_rate()
1934 hdmi->sample_rate); in dw_hdmi_set_sample_rate()
1946 return -ENOMEM; in dw_hdmi_hdcp_load_key()
1954 return -EINVAL; in dw_hdmi_hdcp_load_key()
1957 if (hdcp_keys->KSV[0] == 0x00 && in dw_hdmi_hdcp_load_key()
1958 hdcp_keys->KSV[1] == 0x00 && in dw_hdmi_hdcp_load_key()
1959 hdcp_keys->KSV[2] == 0x00 && in dw_hdmi_hdcp_load_key()
1960 hdcp_keys->KSV[3] == 0x00 && in dw_hdmi_hdcp_load_key()
1961 hdcp_keys->KSV[4] == 0x00) { in dw_hdmi_hdcp_load_key()
1964 return -EINVAL; in dw_hdmi_hdcp_load_key()
1978 for (i = 4; i >= 0; i--) in dw_hdmi_hdcp_load_key()
1979 hdmi_writeb(hdmi, hdcp_keys->KSV[i], HDMI_HDCPREG_DPK0 + i); in dw_hdmi_hdcp_load_key()
1987 hdmi_writeb(hdmi, hdcp_keys->seeds[0], HDMI_HDCPREG_SEED1); in dw_hdmi_hdcp_load_key()
1988 hdmi_writeb(hdmi, hdcp_keys->seeds[1], HDMI_HDCPREG_SEED0); in dw_hdmi_hdcp_load_key()
1991 for (i = 0; i < DW_HDMI_HDCP_DPK_LEN - 6; i += 7) { in dw_hdmi_hdcp_load_key()
1992 for (j = 6; j >= 0; j--) in dw_hdmi_hdcp_load_key()
1993 hdmi_writeb(hdmi, hdcp_keys->devicekey[i + j], in dw_hdmi_hdcp_load_key()
2010 if (!hdmi->hdcp1x_enable) in hdmi_tx_hdcp_config()
2014 vsync_pol = mode->flags & DRM_MODE_FLAG_PVSYNC ? in hdmi_tx_hdcp_config()
2017 hsync_pol = mode->flags & DRM_MODE_FLAG_PHSYNC ? in hdmi_tx_hdcp_config()
2028 hdmi_dvi = hdmi->sink_is_hdmi ? HDMI_A_HDCPCFG0_HDMIDVI_HDMI : in hdmi_tx_hdcp_config()
2087 void *data = hdmi->plat_data->phy_data; in dw_hdmi_setup()
2090 if (!hdmi->vic) in dw_hdmi_setup()
2091 printf("Non-CEA mode used in HDMI\n"); in dw_hdmi_setup()
2093 printf("CEA mode used vic=%d\n", hdmi->vic); in dw_hdmi_setup()
2095 if (hdmi->plat_data->get_enc_out_encoding) in dw_hdmi_setup()
2096 hdmi->hdmi_data.enc_out_encoding = in dw_hdmi_setup()
2097 hdmi->plat_data->get_enc_out_encoding(data); in dw_hdmi_setup()
2098 else if (hdmi->vic == 6 || hdmi->vic == 7 || in dw_hdmi_setup()
2099 hdmi->vic == 21 || hdmi->vic == 22 || in dw_hdmi_setup()
2100 hdmi->vic == 2 || hdmi->vic == 3 || in dw_hdmi_setup()
2101 hdmi->vic == 17 || hdmi->vic == 18) in dw_hdmi_setup()
2102 hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601; in dw_hdmi_setup()
2104 hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709; in dw_hdmi_setup()
2106 if (mode->flags & DRM_MODE_FLAG_DBLCLK) { in dw_hdmi_setup()
2107 hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 1; in dw_hdmi_setup()
2108 hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 1; in dw_hdmi_setup()
2110 hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0; in dw_hdmi_setup()
2111 hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0; in dw_hdmi_setup()
2115 if (hdmi->plat_data->get_enc_in_encoding) in dw_hdmi_setup()
2116 hdmi->hdmi_data.enc_in_encoding = in dw_hdmi_setup()
2117 hdmi->plat_data->get_enc_in_encoding(data); in dw_hdmi_setup()
2118 else if (hdmi->plat_data->input_bus_encoding) in dw_hdmi_setup()
2119 hdmi->hdmi_data.enc_in_encoding = in dw_hdmi_setup()
2120 hdmi->plat_data->input_bus_encoding; in dw_hdmi_setup()
2122 hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT; in dw_hdmi_setup()
2124 if (hdmi->plat_data->get_quant_range) in dw_hdmi_setup()
2125 hdmi->hdmi_data.quant_range = in dw_hdmi_setup()
2126 hdmi->plat_data->get_quant_range(data); in dw_hdmi_setup()
2128 hdmi->hdmi_data.quant_range = HDMI_QUANTIZATION_RANGE_DEFAULT; in dw_hdmi_setup()
2131 * According to the dw-hdmi specification 6.4.2 in dw_hdmi_setup()
2136 hdmi->hdmi_data.pix_repet_factor = in dw_hdmi_setup()
2137 (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 1 : 0; in dw_hdmi_setup()
2138 hdmi->hdmi_data.video_mode.mdataenablepolarity = true; in dw_hdmi_setup()
2144 ret = hdmi->phy.ops->init(conn, hdmi, state); in dw_hdmi_setup()
2147 hdmi->phy.enabled = true; in dw_hdmi_setup()
2152 /* HDMI Initialization Step E - Configure audio */ in dw_hdmi_setup()
2153 if (hdmi->sink_has_audio) { in dw_hdmi_setup()
2160 if (hdmi->sink_is_hdmi) { in dw_hdmi_setup()
2161 /* HDMI Initialization Step F - Configure AVI InfoFrame */ in dw_hdmi_setup()
2186 return hdmi->phy.ops->read_hpd(hdmi, state); in dw_hdmi_detect_hotplug()
2191 switch (hdmi->io_width) { in dw_hdmi_set_reg_wr()
2193 hdmi->write = dw_hdmi_writel; in dw_hdmi_set_reg_wr()
2194 hdmi->read = dw_hdmi_readl; in dw_hdmi_set_reg_wr()
2197 hdmi->write = dw_hdmi_writeb; in dw_hdmi_set_reg_wr()
2198 hdmi->read = dw_hdmi_readb; in dw_hdmi_set_reg_wr()
2201 printf("reg-io-width must be 1 or 4\n"); in dw_hdmi_set_reg_wr()
2202 return -EINVAL; in dw_hdmi_set_reg_wr()
2234 hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8) in dw_hdmi_dev_init()
2245 /* Standard-mode */ in dw_hdmi_i2c_set_divs()
2246 if (hdmi->i2c->scl_high_ns < 4000) in dw_hdmi_i2c_set_divs()
2249 high_ns = hdmi->i2c->scl_high_ns; in dw_hdmi_i2c_set_divs()
2251 if (hdmi->i2c->scl_low_ns < 4700) in dw_hdmi_i2c_set_divs()
2254 low_ns = hdmi->i2c->scl_low_ns; in dw_hdmi_i2c_set_divs()
2309 hdmi->audio_enable = true; in dw_hdmi_audio_enable()
2310 hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); in dw_hdmi_audio_enable()
2315 hdmi->audio_enable = false; in dw_hdmi_audio_disable()
2316 hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0); in dw_hdmi_audio_disable()
2321 struct connector_state *conn_state = &state->conn_state; in rockchip_dw_hdmi_init()
2324 (const struct dw_hdmi_plat_data *)conn->data; in rockchip_dw_hdmi_init()
2326 (const struct dw_hdmi_plat_data *)dev_get_driver_data(conn->dev); in rockchip_dw_hdmi_init()
2327 ofnode hdmi_node = conn->dev->node; in rockchip_dw_hdmi_init()
2331 struct crtc_state *crtc_state = &state->crtc_state; in rockchip_dw_hdmi_init()
2338 return -ENOMEM; in rockchip_dw_hdmi_init()
2343 return -ENOMEM; in rockchip_dw_hdmi_init()
2346 hdmi->id = 0; in rockchip_dw_hdmi_init()
2347 hdmi->regs = (void *)RK3528_HDMI_BASE; in rockchip_dw_hdmi_init()
2348 hdmi->io_width = 4; in rockchip_dw_hdmi_init()
2349 hdmi->scramble_low_rates = false; in rockchip_dw_hdmi_init()
2350 hdmi->hdcp1x_enable = false; in rockchip_dw_hdmi_init()
2351 hdmi->output_bus_format_rgb = false; in rockchip_dw_hdmi_init()
2352 conn_state->type = DRM_MODE_CONNECTOR_HDMIA; in rockchip_dw_hdmi_init()
2354 hdmi->id = of_alias_get_id(ofnode_to_np(hdmi_node), "hdmi"); in rockchip_dw_hdmi_init()
2355 if (hdmi->id < 0) in rockchip_dw_hdmi_init()
2356 hdmi->id = 0; in rockchip_dw_hdmi_init()
2357 conn_state->disp_info = rockchip_get_disp_info(conn_state->type, hdmi->id); in rockchip_dw_hdmi_init()
2362 hdmi->dev_type = pdata->dev_type; in rockchip_dw_hdmi_init()
2363 hdmi->plat_data = pdata; in rockchip_dw_hdmi_init()
2366 hdmi->regs = dev_read_addr_ptr(conn->dev); in rockchip_dw_hdmi_init()
2367 hdmi->io_width = ofnode_read_s32_default(hdmi_node, "reg-io-width", -1); in rockchip_dw_hdmi_init()
2369 if (ofnode_read_bool(hdmi_node, "scramble-low-rates")) in rockchip_dw_hdmi_init()
2370 hdmi->scramble_low_rates = true; in rockchip_dw_hdmi_init()
2372 if (ofnode_read_bool(hdmi_node, "hdcp1x-enable")) in rockchip_dw_hdmi_init()
2373 hdmi->hdcp1x_enable = true; in rockchip_dw_hdmi_init()
2375 hdmi->hdcp1x_enable = false; in rockchip_dw_hdmi_init()
2378 ofnode_read_bool(hdmi_node, "unsupported-yuv-input")) in rockchip_dw_hdmi_init()
2379 hdmi->output_bus_format_rgb = true; in rockchip_dw_hdmi_init()
2381 hdmi->output_bus_format_rgb = false; in rockchip_dw_hdmi_init()
2383 ret = dev_read_size(conn->dev, "rockchip,phy-table"); in rockchip_dw_hdmi_init()
2384 if (ret > 0 && hdmi->plat_data->phy_config) { in rockchip_dw_hdmi_init()
2388 dev_read_u32_array(conn->dev, "rockchip,phy-table", phy_config, ret / 4); in rockchip_dw_hdmi_init()
2392 hdmi->plat_data->phy_config[i].mpixelclock = (u64)phy_config[i * 4]; in rockchip_dw_hdmi_init()
2394 hdmi->plat_data->phy_config[i].mpixelclock = ~0UL; in rockchip_dw_hdmi_init()
2395 hdmi->plat_data->phy_config[i].sym_ctr = (u16)phy_config[i * 4 + 1]; in rockchip_dw_hdmi_init()
2396 hdmi->plat_data->phy_config[i].term = (u16)phy_config[i * 4 + 2]; in rockchip_dw_hdmi_init()
2397 hdmi->plat_data->phy_config[i].vlev_ctr = (u16)phy_config[i * 4 + 3]; in rockchip_dw_hdmi_init()
2401 ddc_node = of_parse_phandle(ofnode_to_np(hdmi_node), "ddc-i2c-bus", 0); in rockchip_dw_hdmi_init()
2404 &hdmi->adap.i2c_bus); in rockchip_dw_hdmi_init()
2405 if (hdmi->adap.i2c_bus) in rockchip_dw_hdmi_init()
2406 hdmi->adap.ops = i2c_get_ops(hdmi->adap.i2c_bus); in rockchip_dw_hdmi_init()
2410 hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rockchip_dw_hdmi_init()
2411 if (hdmi->grf <= 0) { in rockchip_dw_hdmi_init()
2413 __func__, hdmi->grf); in rockchip_dw_hdmi_init()
2414 return -ENXIO; in rockchip_dw_hdmi_init()
2418 hdmi->gpio_base = (void *)RK3528_GPIO_BASE; in rockchip_dw_hdmi_init()
2420 ret = gpio_request_by_name(conn->dev, "hpd-gpios", 0, in rockchip_dw_hdmi_init()
2421 &hdmi->hpd_gpiod, GPIOD_IS_IN); in rockchip_dw_hdmi_init()
2422 if (ret && ret != -ENOENT) { in rockchip_dw_hdmi_init()
2426 hdmi->gpio_base = (void *)dev_read_addr_index(conn->dev, 1); in rockchip_dw_hdmi_init()
2428 if (!hdmi->gpio_base) in rockchip_dw_hdmi_init()
2429 return -ENODEV; in rockchip_dw_hdmi_init()
2433 if (pdata->grf_vop_sel_reg) { in rockchip_dw_hdmi_init()
2434 if (crtc_state->crtc_id) in rockchip_dw_hdmi_init()
2435 val = ((1 << pdata->vop_sel_bit) | in rockchip_dw_hdmi_init()
2436 (1 << (16 + pdata->vop_sel_bit))); in rockchip_dw_hdmi_init()
2438 val = ((0 << pdata->vop_sel_bit) | in rockchip_dw_hdmi_init()
2439 (1 << (16 + pdata->vop_sel_bit))); in rockchip_dw_hdmi_init()
2440 writel(val, hdmi->grf + pdata->grf_vop_sel_reg); in rockchip_dw_hdmi_init()
2443 hdmi->i2c = malloc(sizeof(struct dw_hdmi_i2c)); in rockchip_dw_hdmi_init()
2444 if (!hdmi->i2c) in rockchip_dw_hdmi_init()
2445 return -ENOMEM; in rockchip_dw_hdmi_init()
2446 hdmi->adap.ddc_xfer = dw_hdmi_i2c_xfer; in rockchip_dw_hdmi_init()
2453 hdmi->i2c->scl_high_ns = 9625; in rockchip_dw_hdmi_init()
2454 hdmi->i2c->scl_low_ns = 10000; in rockchip_dw_hdmi_init()
2456 hdmi->i2c->scl_high_ns = in rockchip_dw_hdmi_init()
2458 "ddc-i2c-scl-high-time-ns", 4708); in rockchip_dw_hdmi_init()
2459 hdmi->i2c->scl_low_ns = in rockchip_dw_hdmi_init()
2461 "ddc-i2c-scl-low-time-ns", 4916); in rockchip_dw_hdmi_init()
2465 conn_state->output_if |= VOP_OUTPUT_IF_HDMI0; in rockchip_dw_hdmi_init()
2466 conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA; in rockchip_dw_hdmi_init()
2468 hdmi->edid_data.mode_buf = mode_buf; in rockchip_dw_hdmi_init()
2469 hdmi->sample_rate = 48000; in rockchip_dw_hdmi_init()
2471 conn->data = hdmi; in rockchip_dw_hdmi_init()
2472 dw_hdmi_set_iomux(hdmi->grf, hdmi->gpio_base, in rockchip_dw_hdmi_init()
2473 &hdmi->hpd_gpiod, hdmi->dev_type); in rockchip_dw_hdmi_init()
2482 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_deinit()
2484 if (hdmi->i2c) in rockchip_dw_hdmi_deinit()
2485 free(hdmi->i2c); in rockchip_dw_hdmi_deinit()
2486 if (hdmi->edid_data.mode_buf) in rockchip_dw_hdmi_deinit()
2487 free(hdmi->edid_data.mode_buf); in rockchip_dw_hdmi_deinit()
2499 struct connector_state *conn_state = &state->conn_state; in rockchip_dw_hdmi_enable()
2500 struct drm_display_mode *mode = &conn_state->mode; in rockchip_dw_hdmi_enable()
2501 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_enable()
2504 return -EFAULT; in rockchip_dw_hdmi_enable()
2507 memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode)); in rockchip_dw_hdmi_enable()
2516 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_disable()
2525 struct connector_state *conn_state = &state->conn_state; in rockchip_dw_hdmi_get_timing()
2526 struct drm_display_mode *mode = &conn_state->mode; in rockchip_dw_hdmi_get_timing()
2527 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_get_timing()
2528 struct edid *edid = (struct edid *)conn_state->edid; in rockchip_dw_hdmi_get_timing()
2531 struct overscan *overscan = &conn_state->overscan; in rockchip_dw_hdmi_get_timing()
2535 return -EFAULT; in rockchip_dw_hdmi_get_timing()
2537 ret = drm_do_get_edid(&hdmi->adap, conn_state->edid); in rockchip_dw_hdmi_get_timing()
2540 hdmi->sink_is_hdmi = in rockchip_dw_hdmi_get_timing()
2542 hdmi->sink_has_audio = drm_detect_monitor_audio(edid); in rockchip_dw_hdmi_get_timing()
2543 ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid); in rockchip_dw_hdmi_get_timing()
2546 hdmi->sink_is_hdmi = true; in rockchip_dw_hdmi_get_timing()
2547 hdmi->sink_has_audio = true; in rockchip_dw_hdmi_get_timing()
2548 do_cea_modes(&hdmi->edid_data, def_modes_vic, in rockchip_dw_hdmi_get_timing()
2550 hdmi->edid_data.mode_buf[0].type |= DRM_MODE_TYPE_PREFERRED; in rockchip_dw_hdmi_get_timing()
2551 hdmi->edid_data.preferred_mode = &hdmi->edid_data.mode_buf[0]; in rockchip_dw_hdmi_get_timing()
2555 conn_state->disp_info = rockchip_get_disp_info(conn_state->type, hdmi->id); in rockchip_dw_hdmi_get_timing()
2557 drm_rk_filter_whitelist(&hdmi->edid_data); in rockchip_dw_hdmi_get_timing()
2558 if (hdmi->phy.ops->mode_valid) in rockchip_dw_hdmi_get_timing()
2559 hdmi->phy.ops->mode_valid(conn, hdmi, state); in rockchip_dw_hdmi_get_timing()
2560 drm_mode_max_resolution_filter(&hdmi->edid_data, in rockchip_dw_hdmi_get_timing()
2561 &state->crtc_state.max_output); in rockchip_dw_hdmi_get_timing()
2562 if (!drm_mode_prune_invalid(&hdmi->edid_data)) { in rockchip_dw_hdmi_get_timing()
2564 return -EINVAL; in rockchip_dw_hdmi_get_timing()
2567 for (i = 0; i < hdmi->edid_data.modes; i++) { in rockchip_dw_hdmi_get_timing()
2568 hdmi->edid_data.mode_buf[i].vrefresh = in rockchip_dw_hdmi_get_timing()
2569 drm_mode_vrefresh(&hdmi->edid_data.mode_buf[i]); in rockchip_dw_hdmi_get_timing()
2571 vic = drm_match_cea_mode(&hdmi->edid_data.mode_buf[i]); in rockchip_dw_hdmi_get_timing()
2572 if (hdmi->edid_data.mode_buf[i].picture_aspect_ratio == HDMI_PICTURE_ASPECT_NONE) { in rockchip_dw_hdmi_get_timing()
2574 hdmi->edid_data.mode_buf[i].picture_aspect_ratio = in rockchip_dw_hdmi_get_timing()
2577 hdmi->edid_data.mode_buf[i].picture_aspect_ratio = in rockchip_dw_hdmi_get_timing()
2582 drm_mode_sort(&hdmi->edid_data); in rockchip_dw_hdmi_get_timing()
2583 drm_rk_selete_output(&hdmi->edid_data, conn_state, &bus_format, in rockchip_dw_hdmi_get_timing()
2584 overscan, hdmi->dev_type, hdmi->output_bus_format_rgb); in rockchip_dw_hdmi_get_timing()
2586 *mode = *hdmi->edid_data.preferred_mode; in rockchip_dw_hdmi_get_timing()
2587 hdmi->vic = drm_match_cea_mode(mode); in rockchip_dw_hdmi_get_timing()
2589 if (state->force_output) in rockchip_dw_hdmi_get_timing()
2590 bus_format = state->force_bus_format; in rockchip_dw_hdmi_get_timing()
2591 conn_state->bus_format = bus_format; in rockchip_dw_hdmi_get_timing()
2592 hdmi->hdmi_data.enc_in_bus_format = bus_format; in rockchip_dw_hdmi_get_timing()
2593 hdmi->hdmi_data.enc_out_bus_format = bus_format; in rockchip_dw_hdmi_get_timing()
2597 conn_state->bus_format = MEDIA_BUS_FMT_YUV10_1X30; in rockchip_dw_hdmi_get_timing()
2598 hdmi->hdmi_data.enc_in_bus_format = in rockchip_dw_hdmi_get_timing()
2602 conn_state->bus_format = MEDIA_BUS_FMT_YUV8_1X24; in rockchip_dw_hdmi_get_timing()
2603 hdmi->hdmi_data.enc_in_bus_format = in rockchip_dw_hdmi_get_timing()
2608 conn_state->output_mode = ROCKCHIP_OUT_MODE_YUV420; in rockchip_dw_hdmi_get_timing()
2612 if (hdmi->vic == 6 || hdmi->vic == 7 || hdmi->vic == 21 || in rockchip_dw_hdmi_get_timing()
2613 hdmi->vic == 22 || hdmi->vic == 2 || hdmi->vic == 3 || in rockchip_dw_hdmi_get_timing()
2614 hdmi->vic == 17 || hdmi->vic == 18) in rockchip_dw_hdmi_get_timing()
2620 conn_state->color_space = V4L2_COLORSPACE_BT2020; in rockchip_dw_hdmi_get_timing()
2623 conn_state->color_space = V4L2_COLORSPACE_DEFAULT; in rockchip_dw_hdmi_get_timing()
2625 conn_state->color_space = V4L2_COLORSPACE_REC709; in rockchip_dw_hdmi_get_timing()
2627 conn_state->color_space = V4L2_COLORSPACE_SMPTE170M; in rockchip_dw_hdmi_get_timing()
2635 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_detect()
2638 return -EFAULT; in rockchip_dw_hdmi_detect()
2648 struct connector_state *conn_state = &state->conn_state; in rockchip_dw_hdmi_get_edid()
2649 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_get_edid()
2651 ret = drm_do_get_edid(&hdmi->adap, conn_state->edid); in rockchip_dw_hdmi_get_edid()
2659 struct connector_state *conn_state = &state->conn_state; in inno_dw_hdmi_phy_init()
2663 hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format); in inno_dw_hdmi_phy_init()
2665 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) in inno_dw_hdmi_phy_init()
2667 else if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) in inno_dw_hdmi_phy_init()
2671 rockchip_phy_set_bus_width(conn->phy, bus_width); in inno_dw_hdmi_phy_init()
2672 rockchip_phy_set_pll(conn->phy, in inno_dw_hdmi_phy_init()
2673 conn_state->mode.crtc_clock * 1000); in inno_dw_hdmi_phy_init()
2674 if (hdmi->edid_data.display_info.hdmi.scdc.supported) in inno_dw_hdmi_phy_init()
2676 rockchip_phy_power_on(conn->phy); in inno_dw_hdmi_phy_init()
2693 if (hdmi->dev_type == RK3328_HDMI) { in inno_dw_hdmi_phy_read_hpd()
2695 inno_dw_hdmi_set_domain(hdmi->grf, 1); in inno_dw_hdmi_phy_read_hpd()
2697 inno_dw_hdmi_set_domain(hdmi->grf, 0); in inno_dw_hdmi_phy_read_hpd()
2705 struct hdmi_edid_data *edid_data = &hdmi->edid_data; in inno_dw_hdmi_mode_valid()
2708 struct drm_display_mode *mode_buf = edid_data->mode_buf; in inno_dw_hdmi_mode_valid()
2710 for (i = 0; i < edid_data->modes; i++) { in inno_dw_hdmi_mode_valid()
2711 if (edid_data->mode_buf[i].invalid) in inno_dw_hdmi_mode_valid()
2713 if (edid_data->mode_buf[i].flags & DRM_MODE_FLAG_DBLCLK) in inno_dw_hdmi_mode_valid()
2719 ret = rockchip_phy_round_rate(conn->phy, rate); in inno_dw_hdmi_mode_valid()
2722 edid_data->mode_buf[i].invalid = true; in inno_dw_hdmi_mode_valid()