Lines Matching full:hdmi
18 #include <linux/hdmi.h>
79 /* For 297 MHz+ HDMI spec have some other rule for setting N */
147 int (*configure)(struct dw_hdmi *hdmi,
204 void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
205 u8 (*read)(struct dw_hdmi *hdmi, int offset);
213 static void dw_hdmi_writel(struct dw_hdmi *hdmi, u8 val, int offset) in dw_hdmi_writel() argument
215 writel(val, hdmi->regs + (offset << 2)); in dw_hdmi_writel()
218 static u8 dw_hdmi_readl(struct dw_hdmi *hdmi, int offset) in dw_hdmi_readl() argument
220 return readl(hdmi->regs + (offset << 2)); in dw_hdmi_readl()
223 static void dw_hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset) in dw_hdmi_writeb() argument
225 writeb(val, hdmi->regs + offset); in dw_hdmi_writeb()
228 static u8 dw_hdmi_readb(struct dw_hdmi *hdmi, int offset) in dw_hdmi_readb() argument
230 return readb(hdmi->regs + offset); in dw_hdmi_readb()
233 static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset) in hdmi_writeb() argument
235 hdmi->write(hdmi, val, offset); in hdmi_writeb()
238 static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset) in hdmi_readb() argument
240 return hdmi->read(hdmi, offset); in hdmi_readb()
243 static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg) in hdmi_modb() argument
245 u8 val = hdmi_readb(hdmi, reg) & ~mask; in hdmi_modb()
248 hdmi_writeb(hdmi, val, reg); in hdmi_modb()
251 static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg, in hdmi_mask_writeb() argument
254 hdmi_modb(hdmi, data << shift, mask, reg); in hdmi_mask_writeb()
343 static int is_color_space_conversion(struct dw_hdmi *hdmi) in is_color_space_conversion() argument
346 hdmi->edid_data.preferred_mode; in is_color_space_conversion()
350 (hdmi->hdmi_data.quant_range == in is_color_space_conversion()
357 if (hdmi->hdmi_data.enc_in_bus_format != in is_color_space_conversion()
358 hdmi->hdmi_data.enc_out_bus_format || in is_color_space_conversion()
359 ((hdmi->hdmi_data.quant_range == HDMI_QUANTIZATION_RANGE_LIMITED || in is_color_space_conversion()
361 hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format))) in is_color_space_conversion()
367 static int is_color_space_decimation(struct dw_hdmi *hdmi) in is_color_space_decimation() argument
369 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) in is_color_space_decimation()
372 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) || in is_color_space_decimation()
373 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_in_bus_format)) in is_color_space_decimation()
379 static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi, in hdmi_phy_test_clear() argument
382 hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET, in hdmi_phy_test_clear()
386 static inline void hdmi_phy_test_enable(struct dw_hdmi *hdmi, in hdmi_phy_test_enable() argument
389 hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTEN_OFFSET, in hdmi_phy_test_enable()
393 static inline void hdmi_phy_test_clock(struct dw_hdmi *hdmi, in hdmi_phy_test_clock() argument
396 hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLK_OFFSET, in hdmi_phy_test_clock()
400 static inline void hdmi_phy_test_din(struct dw_hdmi *hdmi, in hdmi_phy_test_din() argument
403 hdmi_writeb(hdmi, bit, HDMI_PHY_TST1); in hdmi_phy_test_din()
406 static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi, in hdmi_phy_test_dout() argument
409 hdmi_writeb(hdmi, bit, HDMI_PHY_TST2); in hdmi_phy_test_dout()
412 static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi, in dw_hdmi_i2c_read() argument
415 struct dw_hdmi_i2c *i2c = hdmi->i2c; in dw_hdmi_i2c_read()
430 hdmi_writeb(hdmi, i2c->slave_reg, HDMI_I2CM_ADDRESS); in dw_hdmi_i2c_read()
442 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ8_EXT, in dw_hdmi_i2c_read()
445 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ_EXT, in dw_hdmi_i2c_read()
449 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ8, in dw_hdmi_i2c_read()
452 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ, in dw_hdmi_i2c_read()
458 interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0); in dw_hdmi_i2c_read()
460 hdmi_writeb(hdmi, interrupt, in dw_hdmi_i2c_read()
470 hdmi_writeb(hdmi, 0, HDMI_I2CM_SOFTRSTZ); in dw_hdmi_i2c_read()
471 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_BUS_CLEAR, in dw_hdmi_i2c_read()
481 hdmi_writeb(hdmi, 0, HDMI_I2CM_SOFTRSTZ); in dw_hdmi_i2c_read()
482 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_BUS_CLEAR, in dw_hdmi_i2c_read()
491 *buf++ = hdmi_readb(hdmi, HDMI_I2CM_READ_BUFF0 + i); in dw_hdmi_i2c_read()
493 *buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI); in dw_hdmi_i2c_read()
500 static int dw_hdmi_i2c_write(struct dw_hdmi *hdmi, in dw_hdmi_i2c_write() argument
503 struct dw_hdmi_i2c *i2c = hdmi->i2c; in dw_hdmi_i2c_write()
516 hdmi_writeb(hdmi, *buf++, HDMI_I2CM_DATAO); in dw_hdmi_i2c_write()
517 hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS); in dw_hdmi_i2c_write()
518 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE, in dw_hdmi_i2c_write()
523 interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0); in dw_hdmi_i2c_write()
525 hdmi_writeb(hdmi, in dw_hdmi_i2c_write()
536 hdmi_writeb(hdmi, 0, HDMI_I2CM_SOFTRSTZ); in dw_hdmi_i2c_write()
537 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_BUS_CLEAR, in dw_hdmi_i2c_write()
545 hdmi_writeb(hdmi, 0, HDMI_I2CM_SOFTRSTZ); in dw_hdmi_i2c_write()
546 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_BUS_CLEAR, in dw_hdmi_i2c_write()
565 struct dw_hdmi *hdmi = container_of(adap, struct dw_hdmi, adap); in dw_hdmi_i2c_xfer() local
566 struct dw_hdmi_i2c *i2c = hdmi->i2c; in dw_hdmi_i2c_xfer()
579 hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0); in dw_hdmi_i2c_xfer()
584 hdmi_writeb(hdmi, addr, HDMI_I2CM_SLAVE); in dw_hdmi_i2c_xfer()
597 hdmi_writeb(hdmi, DDC_SEGMENT_ADDR, HDMI_I2CM_SEGADDR); in dw_hdmi_i2c_xfer()
598 hdmi_writeb(hdmi, *msgs[i].buf, HDMI_I2CM_SEGPTR); in dw_hdmi_i2c_xfer()
601 ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf, in dw_hdmi_i2c_xfer()
604 ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf, in dw_hdmi_i2c_xfer()
615 hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE, in dw_hdmi_i2c_xfer()
621 static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec) in hdmi_phy_wait_i2c_done() argument
625 while ((val = hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) { in hdmi_phy_wait_i2c_done()
630 hdmi_writeb(hdmi, val, HDMI_IH_I2CMPHY_STAT0); in hdmi_phy_wait_i2c_done()
635 static void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, in dw_hdmi_phy_i2c_write() argument
638 hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0); in dw_hdmi_phy_i2c_write()
639 hdmi_writeb(hdmi, addr, HDMI_PHY_I2CM_ADDRESS_ADDR); in dw_hdmi_phy_i2c_write()
640 hdmi_writeb(hdmi, (unsigned char)(data >> 8), in dw_hdmi_phy_i2c_write()
642 hdmi_writeb(hdmi, (unsigned char)(data >> 0), in dw_hdmi_phy_i2c_write()
644 hdmi_writeb(hdmi, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE, in dw_hdmi_phy_i2c_write()
646 hdmi_phy_wait_i2c_done(hdmi, 1000); in dw_hdmi_phy_i2c_write()
649 static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable) in dw_hdmi_phy_enable_powerdown() argument
651 hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0, in dw_hdmi_phy_enable_powerdown()
656 static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable) in dw_hdmi_phy_enable_tmds() argument
658 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, in dw_hdmi_phy_enable_tmds()
663 static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable) in dw_hdmi_phy_enable_svsret() argument
665 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, in dw_hdmi_phy_enable_svsret()
670 static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable) in dw_hdmi_phy_gen2_pddq() argument
672 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, in dw_hdmi_phy_gen2_pddq()
677 static void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable) in dw_hdmi_phy_gen2_txpwron() argument
679 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, in dw_hdmi_phy_gen2_txpwron()
684 static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable) in dw_hdmi_phy_sel_data_en_pol() argument
686 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, in dw_hdmi_phy_sel_data_en_pol()
691 static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable) in dw_hdmi_phy_sel_interface_control() argument
693 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, in dw_hdmi_phy_sel_interface_control()
698 static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi) in dw_hdmi_phy_power_off() argument
700 const struct dw_hdmi_phy_data *phy = hdmi->phy.data; in dw_hdmi_phy_power_off()
705 dw_hdmi_phy_enable_tmds(hdmi, 0); in dw_hdmi_phy_power_off()
706 dw_hdmi_phy_enable_powerdown(hdmi, true); in dw_hdmi_phy_power_off()
710 dw_hdmi_phy_gen2_txpwron(hdmi, 0); in dw_hdmi_phy_power_off()
717 val = hdmi_readb(hdmi, HDMI_PHY_STAT0); in dw_hdmi_phy_power_off()
729 dw_hdmi_phy_gen2_pddq(hdmi, 1); in dw_hdmi_phy_power_off()
732 static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi) in dw_hdmi_phy_power_on() argument
734 const struct dw_hdmi_phy_data *phy = hdmi->phy.data; in dw_hdmi_phy_power_on()
739 dw_hdmi_phy_enable_powerdown(hdmi, false); in dw_hdmi_phy_power_on()
742 dw_hdmi_phy_enable_tmds(hdmi, 0); in dw_hdmi_phy_power_on()
743 dw_hdmi_phy_enable_tmds(hdmi, 1); in dw_hdmi_phy_power_on()
747 dw_hdmi_phy_gen2_txpwron(hdmi, 1); in dw_hdmi_phy_power_on()
748 dw_hdmi_phy_gen2_pddq(hdmi, 0); in dw_hdmi_phy_power_on()
752 val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK; in dw_hdmi_phy_power_on()
769 * PHY configuration function for the DWC HDMI 3D TX PHY. Based on the available
774 int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, in hdmi_phy_configure_dwc_hdmi_3d_tx() argument
781 unsigned int tmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock; in hdmi_phy_configure_dwc_hdmi_3d_tx()
783 hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format); in hdmi_phy_configure_dwc_hdmi_3d_tx()
785 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) && in hdmi_phy_configure_dwc_hdmi_3d_tx()
807 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) in hdmi_phy_configure_dwc_hdmi_3d_tx()
814 dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].cpce, in hdmi_phy_configure_dwc_hdmi_3d_tx()
817 dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].gmp, in hdmi_phy_configure_dwc_hdmi_3d_tx()
819 dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[depth], in hdmi_phy_configure_dwc_hdmi_3d_tx()
822 dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL); in hdmi_phy_configure_dwc_hdmi_3d_tx()
823 dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK, in hdmi_phy_configure_dwc_hdmi_3d_tx()
826 dw_hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM); in hdmi_phy_configure_dwc_hdmi_3d_tx()
827 dw_hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr, in hdmi_phy_configure_dwc_hdmi_3d_tx()
829 dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr, in hdmi_phy_configure_dwc_hdmi_3d_tx()
838 .name = "DWC HDMI TX PHY",
854 .name = "DWC HDMI 3D TX PHY + HEAC PHY",
859 .name = "DWC HDMI 3D TX PHY",
864 .name = "DWC HDMI 2.0 TX PHY",
874 static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi, in rockchip_dw_hdmi_scrambling_enable() argument
879 drm_scdc_readb(&hdmi->adap, SCDC_TMDS_CONFIG, &stat); in rockchip_dw_hdmi_scrambling_enable()
889 drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat); in rockchip_dw_hdmi_scrambling_enable()
891 hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, in rockchip_dw_hdmi_scrambling_enable()
894 hdmi_writeb(hdmi, 1, HDMI_FC_SCRAMBLER_CTRL); in rockchip_dw_hdmi_scrambling_enable()
897 hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL); in rockchip_dw_hdmi_scrambling_enable()
899 hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, in rockchip_dw_hdmi_scrambling_enable()
903 drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat); in rockchip_dw_hdmi_scrambling_enable()
909 static void rockchip_dw_hdmi_scdc_set_tmds_rate(struct dw_hdmi *hdmi) in rockchip_dw_hdmi_scdc_set_tmds_rate() argument
913 drm_scdc_readb(&hdmi->adap, SCDC_TMDS_CONFIG, &stat); in rockchip_dw_hdmi_scdc_set_tmds_rate()
914 if (hdmi->hdmi_data.video_mode.mtmdsclock > 340000000) in rockchip_dw_hdmi_scdc_set_tmds_rate()
918 drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat); in rockchip_dw_hdmi_scdc_set_tmds_rate()
921 static int hdmi_phy_configure(struct dw_hdmi *hdmi) in hdmi_phy_configure() argument
923 const struct dw_hdmi_phy_data *phy = hdmi->phy.data; in hdmi_phy_configure()
924 const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; in hdmi_phy_configure()
925 unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock; in hdmi_phy_configure()
926 unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock; in hdmi_phy_configure()
929 dw_hdmi_phy_power_off(hdmi); in hdmi_phy_configure()
932 if (hdmi->edid_data.display_info.hdmi.scdc.supported) in hdmi_phy_configure()
933 rockchip_dw_hdmi_scdc_set_tmds_rate(hdmi); in hdmi_phy_configure()
937 dw_hdmi_phy_enable_svsret(hdmi, 1); in hdmi_phy_configure()
940 hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); in hdmi_phy_configure()
941 hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); in hdmi_phy_configure()
943 hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST); in hdmi_phy_configure()
945 hdmi_phy_test_clear(hdmi, 1); in hdmi_phy_configure()
946 hdmi_writeb(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2, in hdmi_phy_configure()
948 hdmi_phy_test_clear(hdmi, 0); in hdmi_phy_configure()
952 ret = pdata->configure_phy(hdmi, pdata, mpixelclock); in hdmi_phy_configure()
954 ret = phy->configure(hdmi, pdata, mpixelclock); in hdmi_phy_configure()
965 return dw_hdmi_phy_power_on(hdmi); in hdmi_phy_configure()
968 static int dw_hdmi_phy_init(struct rockchip_connector *conn, struct dw_hdmi *hdmi, in dw_hdmi_phy_init() argument
973 /* HDMI Phy spec says to do the phy initialization sequence twice */ in dw_hdmi_phy_init()
975 dw_hdmi_phy_sel_data_en_pol(hdmi, 1); in dw_hdmi_phy_init()
976 dw_hdmi_phy_sel_interface_control(hdmi, 0); in dw_hdmi_phy_init()
977 ret = hdmi_phy_configure(hdmi); in dw_hdmi_phy_init()
985 static void dw_hdmi_phy_disable(struct rockchip_connector *conn, struct dw_hdmi *hdmi, in dw_hdmi_phy_disable() argument
988 dw_hdmi_phy_power_off(hdmi); in dw_hdmi_phy_disable()
992 dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, void *data) in dw_hdmi_phy_read_hpd() argument
994 return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ? in dw_hdmi_phy_read_hpd()
1004 static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi) in dw_hdmi_detect_phy() argument
1009 phy_type = hdmi_readb(hdmi, HDMI_CONFIG2_ID); in dw_hdmi_detect_phy()
1016 hdmi->dev_type == RK3528_HDMI || in dw_hdmi_detect_phy()
1017 hdmi->dev_type == RK3328_HDMI || in dw_hdmi_detect_phy()
1018 hdmi->dev_type == RK3228_HDMI) { in dw_hdmi_detect_phy()
1020 if (!hdmi->plat_data->phy_ops || !hdmi->plat_data->phy_name) { in dw_hdmi_detect_phy()
1022 "Vendor HDMI PHY not supported by glue layer\n"); in dw_hdmi_detect_phy()
1026 hdmi->phy.ops = hdmi->plat_data->phy_ops; in dw_hdmi_detect_phy()
1027 hdmi->phy.data = hdmi->plat_data->phy_data; in dw_hdmi_detect_phy()
1028 hdmi->phy.name = hdmi->plat_data->phy_name; in dw_hdmi_detect_phy()
1035 hdmi->phy.ops = &dw_hdmi_synopsys_phy_ops; in dw_hdmi_detect_phy()
1036 hdmi->phy.name = dw_hdmi_phys[i].name; in dw_hdmi_detect_phy()
1037 hdmi->phy.data = (void *)&dw_hdmi_phys[i]; in dw_hdmi_detect_phy()
1040 !hdmi->plat_data->configure_phy) { in dw_hdmi_detect_phy()
1042 hdmi->phy.name); in dw_hdmi_detect_phy()
1050 printf("Unsupported HDMI PHY type (%02x)\n", phy_type); in dw_hdmi_detect_phy()
1055 hdmi_get_tmdsclock(struct dw_hdmi *hdmi, unsigned long mpixelclock) in hdmi_get_tmdsclock() argument
1059 hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format); in hdmi_get_tmdsclock()
1061 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_get_tmdsclock()
1080 static void hdmi_av_composer(struct dw_hdmi *hdmi, in hdmi_av_composer() argument
1084 struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; in hdmi_av_composer()
1085 struct drm_hdmi_info *hdmi_info = &hdmi->edid_data.display_info.hdmi; in hdmi_av_composer()
1093 vmode->mtmdsclock = hdmi_get_tmdsclock(hdmi, vmode->mpixelclock); in hdmi_av_composer()
1094 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) in hdmi_av_composer()
1118 if (hdmi->vic == 39) in hdmi_av_composer()
1129 inv_val |= hdmi->sink_is_hdmi ? in hdmi_av_composer()
1133 hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF); in hdmi_av_composer()
1144 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_av_composer()
1174 hdmi->scramble_low_rates)) { in hdmi_av_composer()
1175 drm_scdc_readb(&hdmi->adap, SCDC_SINK_VERSION, &bytes); in hdmi_av_composer()
1176 drm_scdc_writeb(&hdmi->adap, SCDC_SOURCE_VERSION, in hdmi_av_composer()
1178 rockchip_dw_hdmi_scrambling_enable(hdmi, 1); in hdmi_av_composer()
1180 rockchip_dw_hdmi_scrambling_enable(hdmi, 0); in hdmi_av_composer()
1185 hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1); in hdmi_av_composer()
1186 hdmi_writeb(hdmi, hdisplay, HDMI_FC_INHACTV0); in hdmi_av_composer()
1189 hdmi_writeb(hdmi, vdisplay >> 8, HDMI_FC_INVACTV1); in hdmi_av_composer()
1190 hdmi_writeb(hdmi, vdisplay, HDMI_FC_INVACTV0); in hdmi_av_composer()
1193 hdmi_writeb(hdmi, hblank >> 8, HDMI_FC_INHBLANK1); in hdmi_av_composer()
1194 hdmi_writeb(hdmi, hblank, HDMI_FC_INHBLANK0); in hdmi_av_composer()
1197 hdmi_writeb(hdmi, vblank, HDMI_FC_INVBLANK); in hdmi_av_composer()
1200 hdmi_writeb(hdmi, h_de_hs >> 8, HDMI_FC_HSYNCINDELAY1); in hdmi_av_composer()
1201 hdmi_writeb(hdmi, h_de_hs, HDMI_FC_HSYNCINDELAY0); in hdmi_av_composer()
1204 hdmi_writeb(hdmi, v_de_vs, HDMI_FC_VSYNCINDELAY); in hdmi_av_composer()
1207 hdmi_writeb(hdmi, hsync_len >> 8, HDMI_FC_HSYNCINWIDTH1); in hdmi_av_composer()
1208 hdmi_writeb(hdmi, hsync_len, HDMI_FC_HSYNCINWIDTH0); in hdmi_av_composer()
1211 hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH); in hdmi_av_composer()
1214 static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) in dw_hdmi_update_csc_coeffs() argument
1221 enc_out_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format); in dw_hdmi_update_csc_coeffs()
1222 enc_in_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format); in dw_hdmi_update_csc_coeffs()
1224 if (is_color_space_conversion(hdmi)) { in dw_hdmi_update_csc_coeffs()
1229 if (hdmi->hdmi_data.enc_out_encoding == in dw_hdmi_update_csc_coeffs()
1235 if (hdmi->hdmi_data.enc_out_encoding == in dw_hdmi_update_csc_coeffs()
1250 hdmi_writeb(hdmi, coeff_a & 0xff, HDMI_CSC_COEF_A1_LSB + i * 2); in dw_hdmi_update_csc_coeffs()
1251 hdmi_writeb(hdmi, coeff_a >> 8, HDMI_CSC_COEF_A1_MSB + i * 2); in dw_hdmi_update_csc_coeffs()
1252 hdmi_writeb(hdmi, coeff_b & 0xff, HDMI_CSC_COEF_B1_LSB + i * 2); in dw_hdmi_update_csc_coeffs()
1253 hdmi_writeb(hdmi, coeff_b >> 8, HDMI_CSC_COEF_B1_MSB + i * 2); in dw_hdmi_update_csc_coeffs()
1254 hdmi_writeb(hdmi, coeff_c & 0xff, HDMI_CSC_COEF_C1_LSB + i * 2); in dw_hdmi_update_csc_coeffs()
1255 hdmi_writeb(hdmi, coeff_c >> 8, HDMI_CSC_COEF_C1_MSB + i * 2); in dw_hdmi_update_csc_coeffs()
1258 hdmi_modb(hdmi, csc_scale, HDMI_CSC_SCALE_CSCSCALE_MASK, in dw_hdmi_update_csc_coeffs()
1262 static int is_color_space_interpolation(struct dw_hdmi *hdmi) in is_color_space_interpolation() argument
1264 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_in_bus_format)) in is_color_space_interpolation()
1267 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) || in is_color_space_interpolation()
1268 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) in is_color_space_interpolation()
1274 static void hdmi_video_csc(struct dw_hdmi *hdmi) in hdmi_video_csc() argument
1281 if (is_color_space_interpolation(hdmi)) in hdmi_video_csc()
1283 else if (is_color_space_decimation(hdmi)) in hdmi_video_csc()
1286 switch (hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_csc()
1305 hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG); in hdmi_video_csc()
1306 hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK, in hdmi_video_csc()
1309 dw_hdmi_update_csc_coeffs(hdmi); in hdmi_video_csc()
1312 static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) in dw_hdmi_enable_video_path() argument
1317 hdmi_writeb(hdmi, 12, HDMI_FC_CTRLDUR); in dw_hdmi_enable_video_path()
1318 hdmi_writeb(hdmi, 32, HDMI_FC_EXCTRLDUR); in dw_hdmi_enable_video_path()
1319 hdmi_writeb(hdmi, 1, HDMI_FC_EXCTRLSPAC); in dw_hdmi_enable_video_path()
1322 hdmi_writeb(hdmi, 0x0B, HDMI_FC_CH0PREAM); in dw_hdmi_enable_video_path()
1323 hdmi_writeb(hdmi, 0x16, HDMI_FC_CH1PREAM); in dw_hdmi_enable_video_path()
1324 hdmi_writeb(hdmi, 0x21, HDMI_FC_CH2PREAM); in dw_hdmi_enable_video_path()
1329 hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); in dw_hdmi_enable_video_path()
1332 hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); in dw_hdmi_enable_video_path()
1335 if (is_color_space_conversion(hdmi)) { in dw_hdmi_enable_video_path()
1337 hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); in dw_hdmi_enable_video_path()
1341 if (hdmi->hdmi_data.video_mode.mpixelrepetitioninput) { in dw_hdmi_enable_video_path()
1343 hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS); in dw_hdmi_enable_video_path()
1347 if (is_color_space_conversion(hdmi)) in dw_hdmi_enable_video_path()
1348 hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH, in dw_hdmi_enable_video_path()
1351 hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS, in dw_hdmi_enable_video_path()
1355 static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi) in dw_hdmi_clear_overflow() argument
1367 * The number of iterations matters and depends on the HDMI TX revision in dw_hdmi_clear_overflow()
1373 switch (hdmi->version) { in dw_hdmi_clear_overflow()
1388 hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ); in dw_hdmi_clear_overflow()
1390 val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF); in dw_hdmi_clear_overflow()
1392 hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF); in dw_hdmi_clear_overflow()
1395 static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi) in hdmi_disable_overflow_interrupts() argument
1397 hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK, in hdmi_disable_overflow_interrupts()
1401 static void hdmi_video_packetize(struct dw_hdmi *hdmi) in hdmi_video_packetize() argument
1406 struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data; in hdmi_video_packetize()
1409 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) || in hdmi_video_packetize()
1410 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format) || in hdmi_video_packetize()
1411 hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_packetize()
1413 hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_packetize()
1430 } else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_packetize()
1432 hdmi->hdmi_data.enc_out_bus_format)) { in hdmi_video_packetize()
1455 hdmi_writeb(hdmi, val, HDMI_VP_PR_CD); in hdmi_video_packetize()
1457 hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE, in hdmi_video_packetize()
1469 hdmi_modb(hdmi, vp_conf, in hdmi_video_packetize()
1473 hdmi_modb(hdmi, 0, HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, in hdmi_video_packetize()
1476 hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP); in hdmi_video_packetize()
1494 hdmi_modb(hdmi, vp_conf, in hdmi_video_packetize()
1498 hdmi_modb(hdmi, HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE | in hdmi_video_packetize()
1503 hdmi_modb(hdmi, output_select, HDMI_VP_CONF_OUTPUT_SELECTOR_MASK, in hdmi_video_packetize()
1507 static void hdmi_video_sample(struct dw_hdmi *hdmi) in hdmi_video_sample() argument
1512 switch (hdmi->hdmi_data.enc_in_bus_format) { in hdmi_video_sample()
1560 hdmi_writeb(hdmi, val, HDMI_TX_INVID0); in hdmi_video_sample()
1566 hdmi_writeb(hdmi, val, HDMI_TX_INSTUFFING); in hdmi_video_sample()
1567 hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA0); in hdmi_video_sample()
1568 hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA1); in hdmi_video_sample()
1569 hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA0); in hdmi_video_sample()
1570 hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA1); in hdmi_video_sample()
1571 hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA0); in hdmi_video_sample()
1572 hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1); in hdmi_video_sample()
1575 static void dw_hdmi_disable(struct rockchip_connector *conn, struct dw_hdmi *hdmi, in dw_hdmi_disable() argument
1578 if (hdmi->phy.enabled) { in dw_hdmi_disable()
1579 hdmi->phy.ops->disable(conn, hdmi, state); in dw_hdmi_disable()
1580 hdmi->phy.enabled = false; in dw_hdmi_disable()
1584 static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) in hdmi_config_AVI() argument
1590 hdmi->hdmi_data.quant_range; in hdmi_config_AVI()
1592 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) || in hdmi_config_AVI()
1593 hdmi->edid_data.display_info.hdmi.scdc.supported) in hdmi_config_AVI()
1604 if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) in hdmi_config_AVI()
1606 else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) in hdmi_config_AVI()
1608 else if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) in hdmi_config_AVI()
1614 switch (hdmi->hdmi_data.enc_out_encoding) { in hdmi_config_AVI()
1616 if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV601) in hdmi_config_AVI()
1624 if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV709) in hdmi_config_AVI()
1657 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF0); in hdmi_config_AVI()
1663 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF1); in hdmi_config_AVI()
1671 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF2); in hdmi_config_AVI()
1675 hdmi_writeb(hdmi, val, HDMI_FC_AVIVID); in hdmi_config_AVI()
1678 val = (((hdmi->hdmi_data.video_mode.mpixelrepetitioninput + 1) << in hdmi_config_AVI()
1681 ((hdmi->hdmi_data.video_mode.mpixelrepetitionoutput << in hdmi_config_AVI()
1684 hdmi_writeb(hdmi, val, HDMI_FC_PRCONF); in hdmi_config_AVI()
1692 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF3); in hdmi_config_AVI()
1695 hdmi_writeb(hdmi, frame.top_bar & 0xff, HDMI_FC_AVIETB0); in hdmi_config_AVI()
1696 hdmi_writeb(hdmi, (frame.top_bar >> 8) & 0xff, HDMI_FC_AVIETB1); in hdmi_config_AVI()
1697 hdmi_writeb(hdmi, frame.bottom_bar & 0xff, HDMI_FC_AVISBB0); in hdmi_config_AVI()
1698 hdmi_writeb(hdmi, (frame.bottom_bar >> 8) & 0xff, HDMI_FC_AVISBB1); in hdmi_config_AVI()
1699 hdmi_writeb(hdmi, frame.left_bar & 0xff, HDMI_FC_AVIELB0); in hdmi_config_AVI()
1700 hdmi_writeb(hdmi, (frame.left_bar >> 8) & 0xff, HDMI_FC_AVIELB1); in hdmi_config_AVI()
1701 hdmi_writeb(hdmi, frame.right_bar & 0xff, HDMI_FC_AVISRB0); in hdmi_config_AVI()
1702 hdmi_writeb(hdmi, (frame.right_bar >> 8) & 0xff, HDMI_FC_AVISRB1); in hdmi_config_AVI()
1705 static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi, in hdmi_config_vendor_specific_infoframe() argument
1712 /* Disable HDMI vendor specific infoframe send */ in hdmi_config_vendor_specific_infoframe()
1713 hdmi_mask_writeb(hdmi, 0, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET, in hdmi_config_vendor_specific_infoframe()
1732 /* Set the length of HDMI vendor specific InfoFrame payload */ in hdmi_config_vendor_specific_infoframe()
1733 hdmi_writeb(hdmi, buffer[2], HDMI_FC_VSDSIZE); in hdmi_config_vendor_specific_infoframe()
1736 hdmi_writeb(hdmi, buffer[4], HDMI_FC_VSDIEEEID0); in hdmi_config_vendor_specific_infoframe()
1737 hdmi_writeb(hdmi, buffer[5], HDMI_FC_VSDIEEEID1); in hdmi_config_vendor_specific_infoframe()
1738 hdmi_writeb(hdmi, buffer[6], HDMI_FC_VSDIEEEID2); in hdmi_config_vendor_specific_infoframe()
1741 hdmi_writeb(hdmi, buffer[7], HDMI_FC_VSDPAYLOAD0); in hdmi_config_vendor_specific_infoframe()
1742 hdmi_writeb(hdmi, buffer[8], HDMI_FC_VSDPAYLOAD1); in hdmi_config_vendor_specific_infoframe()
1745 hdmi_writeb(hdmi, buffer[9], HDMI_FC_VSDPAYLOAD2); in hdmi_config_vendor_specific_infoframe()
1748 hdmi_writeb(hdmi, 1, HDMI_FC_DATAUTO1); in hdmi_config_vendor_specific_infoframe()
1751 hdmi_writeb(hdmi, 0x11, HDMI_FC_DATAUTO2); in hdmi_config_vendor_specific_infoframe()
1754 hdmi_mask_writeb(hdmi, 1, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET, in hdmi_config_vendor_specific_infoframe()
1758 static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts, in hdmi_set_cts_n() argument
1762 hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); in hdmi_set_cts_n()
1765 hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3); in hdmi_set_cts_n()
1767 hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) | in hdmi_set_cts_n()
1769 hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2); in hdmi_set_cts_n()
1770 hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1); in hdmi_set_cts_n()
1772 hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3); in hdmi_set_cts_n()
1773 hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2); in hdmi_set_cts_n()
1774 hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1); in hdmi_set_cts_n()
1777 static int hdmi_match_tmds_n_table(struct dw_hdmi *hdmi, in hdmi_match_tmds_n_table() argument
1781 const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data; in hdmi_match_tmds_n_table()
1838 static unsigned int hdmi_compute_n(struct dw_hdmi *hdmi, in hdmi_compute_n() argument
1875 static unsigned int hdmi_find_n(struct dw_hdmi *hdmi, unsigned long pixel_clk, in hdmi_find_n() argument
1880 n = hdmi_match_tmds_n_table(hdmi, pixel_clk, sample_rate); in hdmi_find_n()
1887 return hdmi_compute_n(hdmi, pixel_clk, sample_rate); in hdmi_find_n()
1891 void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, unsigned long pixel_clk, in hdmi_set_clk_regenerator() argument
1898 n = hdmi_find_n(hdmi, pixel_clk, sample_rate); in hdmi_set_clk_regenerator()
1914 hdmi->audio_n = n; in hdmi_set_clk_regenerator()
1915 hdmi->audio_cts = cts; in hdmi_set_clk_regenerator()
1916 hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0); in hdmi_set_clk_regenerator()
1919 static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi) in hdmi_clk_regenerator_update_pixel_clock() argument
1921 hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock, in hdmi_clk_regenerator_update_pixel_clock()
1922 hdmi->sample_rate); in hdmi_clk_regenerator_update_pixel_clock()
1925 static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi) in hdmi_enable_audio_clk() argument
1927 hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS); in hdmi_enable_audio_clk()
1930 void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) in dw_hdmi_set_sample_rate() argument
1932 hdmi->sample_rate = rate; in dw_hdmi_set_sample_rate()
1933 hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock, in dw_hdmi_set_sample_rate()
1934 hdmi->sample_rate); in dw_hdmi_set_sample_rate()
1938 static int dw_hdmi_hdcp_load_key(struct dw_hdmi *hdmi) in dw_hdmi_hdcp_load_key() argument
1968 hdmi_writeb(hdmi, 0, HDMI_HDCPREG_RMCTL); in dw_hdmi_hdcp_load_key()
1971 val = hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS); in dw_hdmi_hdcp_load_key()
1974 hdmi_writeb(hdmi, 0, HDMI_HDCPREG_DPK6); in dw_hdmi_hdcp_load_key()
1975 hdmi_writeb(hdmi, 0, HDMI_HDCPREG_DPK5); in dw_hdmi_hdcp_load_key()
1979 hdmi_writeb(hdmi, hdcp_keys->KSV[i], HDMI_HDCPREG_DPK0 + i); in dw_hdmi_hdcp_load_key()
1982 val = hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS); in dw_hdmi_hdcp_load_key()
1986 hdmi_writeb(hdmi, 1, HDMI_HDCPREG_RMCTL); in dw_hdmi_hdcp_load_key()
1987 hdmi_writeb(hdmi, hdcp_keys->seeds[0], HDMI_HDCPREG_SEED1); in dw_hdmi_hdcp_load_key()
1988 hdmi_writeb(hdmi, hdcp_keys->seeds[1], HDMI_HDCPREG_SEED0); in dw_hdmi_hdcp_load_key()
1993 hdmi_writeb(hdmi, hdcp_keys->devicekey[i + j], in dw_hdmi_hdcp_load_key()
1996 val = hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS); in dw_hdmi_hdcp_load_key()
2005 static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi, in hdmi_tx_hdcp_config() argument
2010 if (!hdmi->hdcp1x_enable) in hdmi_tx_hdcp_config()
2021 hdmi_modb(hdmi, vsync_pol | hsync_pol | data_pol, in hdmi_tx_hdcp_config()
2028 hdmi_dvi = hdmi->sink_is_hdmi ? HDMI_A_HDCPCFG0_HDMIDVI_HDMI : in hdmi_tx_hdcp_config()
2030 hdmi_modb(hdmi, hdmi_dvi, HDMI_A_HDCPCFG0_HDMIDVI_MASK, in hdmi_tx_hdcp_config()
2034 if (!(hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS) & 0x3f)) in hdmi_tx_hdcp_config()
2035 dw_hdmi_hdcp_load_key(hdmi); in hdmi_tx_hdcp_config()
2038 hdmi_modb(hdmi, HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE, in hdmi_tx_hdcp_config()
2042 if (hdmi_readb(hdmi, HDMI_CONFIG1_ID) & HDMI_A_HDCP22_MASK) { in hdmi_tx_hdcp_config()
2043 hdmi_modb(hdmi, HDMI_HDCP2_OVR_ENABLE | in hdmi_tx_hdcp_config()
2048 hdmi_writeb(hdmi, 0xff, HDMI_HDCP2REG_MASK); in hdmi_tx_hdcp_config()
2049 hdmi_writeb(hdmi, 0xff, HDMI_HDCP2REG_MUTE); in hdmi_tx_hdcp_config()
2052 hdmi_writeb(hdmi, 0x40, HDMI_A_OESSWCFG); in hdmi_tx_hdcp_config()
2053 hdmi_modb(hdmi, HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE | in hdmi_tx_hdcp_config()
2060 hdmi_modb(hdmi, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE | in hdmi_tx_hdcp_config()
2066 if (hdmi_readb(hdmi, HDMI_MC_CLKDIS) & HDMI_MC_CLKDIS_HDCPCLK_MASK) { in hdmi_tx_hdcp_config()
2067 hdmi_modb(hdmi, HDMI_A_HDCPCFG1_SWRESET_ASSERT, in hdmi_tx_hdcp_config()
2071 hdmi_writeb(hdmi, 0x00, HDMI_A_APIINTMSK); in hdmi_tx_hdcp_config()
2072 hdmi_modb(hdmi, HDMI_A_HDCPCFG0_RXDETECT_ENABLE, in hdmi_tx_hdcp_config()
2075 hdmi_modb(hdmi, HDMI_MC_CLKDIS_HDCPCLK_ENABLE, in hdmi_tx_hdcp_config()
2081 static int dw_hdmi_setup(struct dw_hdmi *hdmi, in dw_hdmi_setup() argument
2087 void *data = hdmi->plat_data->phy_data; in dw_hdmi_setup()
2089 hdmi_disable_overflow_interrupts(hdmi); in dw_hdmi_setup()
2090 if (!hdmi->vic) in dw_hdmi_setup()
2091 printf("Non-CEA mode used in HDMI\n"); in dw_hdmi_setup()
2093 printf("CEA mode used vic=%d\n", hdmi->vic); in dw_hdmi_setup()
2095 if (hdmi->plat_data->get_enc_out_encoding) in dw_hdmi_setup()
2096 hdmi->hdmi_data.enc_out_encoding = in dw_hdmi_setup()
2097 hdmi->plat_data->get_enc_out_encoding(data); in dw_hdmi_setup()
2098 else if (hdmi->vic == 6 || hdmi->vic == 7 || in dw_hdmi_setup()
2099 hdmi->vic == 21 || hdmi->vic == 22 || in dw_hdmi_setup()
2100 hdmi->vic == 2 || hdmi->vic == 3 || in dw_hdmi_setup()
2101 hdmi->vic == 17 || hdmi->vic == 18) in dw_hdmi_setup()
2102 hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601; in dw_hdmi_setup()
2104 hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709; in dw_hdmi_setup()
2107 hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 1; in dw_hdmi_setup()
2108 hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 1; in dw_hdmi_setup()
2110 hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0; in dw_hdmi_setup()
2111 hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0; in dw_hdmi_setup()
2115 if (hdmi->plat_data->get_enc_in_encoding) in dw_hdmi_setup()
2116 hdmi->hdmi_data.enc_in_encoding = in dw_hdmi_setup()
2117 hdmi->plat_data->get_enc_in_encoding(data); in dw_hdmi_setup()
2118 else if (hdmi->plat_data->input_bus_encoding) in dw_hdmi_setup()
2119 hdmi->hdmi_data.enc_in_encoding = in dw_hdmi_setup()
2120 hdmi->plat_data->input_bus_encoding; in dw_hdmi_setup()
2122 hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT; in dw_hdmi_setup()
2124 if (hdmi->plat_data->get_quant_range) in dw_hdmi_setup()
2125 hdmi->hdmi_data.quant_range = in dw_hdmi_setup()
2126 hdmi->plat_data->get_quant_range(data); in dw_hdmi_setup()
2128 hdmi->hdmi_data.quant_range = HDMI_QUANTIZATION_RANGE_DEFAULT; in dw_hdmi_setup()
2131 * According to the dw-hdmi specification 6.4.2 in dw_hdmi_setup()
2136 hdmi->hdmi_data.pix_repet_factor = in dw_hdmi_setup()
2138 hdmi->hdmi_data.video_mode.mdataenablepolarity = true; in dw_hdmi_setup()
2140 /* HDMI Initialization Step B.1 */ in dw_hdmi_setup()
2141 hdmi_av_composer(hdmi, mode); in dw_hdmi_setup()
2143 /* HDMI Initialization Step B.2 */ in dw_hdmi_setup()
2144 ret = hdmi->phy.ops->init(conn, hdmi, state); in dw_hdmi_setup()
2147 hdmi->phy.enabled = true; in dw_hdmi_setup()
2149 /* HDMI Initializateion Step B.3 */ in dw_hdmi_setup()
2150 dw_hdmi_enable_video_path(hdmi); in dw_hdmi_setup()
2152 /* HDMI Initialization Step E - Configure audio */ in dw_hdmi_setup()
2153 if (hdmi->sink_has_audio) { in dw_hdmi_setup()
2155 hdmi_clk_regenerator_update_pixel_clock(hdmi); in dw_hdmi_setup()
2156 hdmi_enable_audio_clk(hdmi); in dw_hdmi_setup()
2160 if (hdmi->sink_is_hdmi) { in dw_hdmi_setup()
2161 /* HDMI Initialization Step F - Configure AVI InfoFrame */ in dw_hdmi_setup()
2162 hdmi_config_AVI(hdmi, mode); in dw_hdmi_setup()
2163 hdmi_config_vendor_specific_infoframe(hdmi, mode); in dw_hdmi_setup()
2164 hdmi_modb(hdmi, HDMI_A_HDCPCFG0_HDMIDVI_HDMI, in dw_hdmi_setup()
2168 hdmi_modb(hdmi, HDMI_A_HDCPCFG0_HDMIDVI_DVI, in dw_hdmi_setup()
2174 hdmi_video_packetize(hdmi); in dw_hdmi_setup()
2175 hdmi_video_csc(hdmi); in dw_hdmi_setup()
2176 hdmi_video_sample(hdmi); in dw_hdmi_setup()
2177 hdmi_tx_hdcp_config(hdmi, mode); in dw_hdmi_setup()
2178 dw_hdmi_clear_overflow(hdmi); in dw_hdmi_setup()
2183 int dw_hdmi_detect_hotplug(struct dw_hdmi *hdmi, in dw_hdmi_detect_hotplug() argument
2186 return hdmi->phy.ops->read_hpd(hdmi, state); in dw_hdmi_detect_hotplug()
2189 static int dw_hdmi_set_reg_wr(struct dw_hdmi *hdmi) in dw_hdmi_set_reg_wr() argument
2191 switch (hdmi->io_width) { in dw_hdmi_set_reg_wr()
2193 hdmi->write = dw_hdmi_writel; in dw_hdmi_set_reg_wr()
2194 hdmi->read = dw_hdmi_readl; in dw_hdmi_set_reg_wr()
2197 hdmi->write = dw_hdmi_writeb; in dw_hdmi_set_reg_wr()
2198 hdmi->read = dw_hdmi_readb; in dw_hdmi_set_reg_wr()
2208 static void initialize_hdmi_mutes(struct dw_hdmi *hdmi) in initialize_hdmi_mutes() argument
2211 hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK0); in initialize_hdmi_mutes()
2212 hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK1); in initialize_hdmi_mutes()
2213 hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK2); in initialize_hdmi_mutes()
2214 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0); in initialize_hdmi_mutes()
2215 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1); in initialize_hdmi_mutes()
2216 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT2); in initialize_hdmi_mutes()
2217 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AS_STAT0); in initialize_hdmi_mutes()
2218 hdmi_writeb(hdmi, 0xfe, HDMI_IH_MUTE_PHY_STAT0); in initialize_hdmi_mutes()
2219 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CM_STAT0); in initialize_hdmi_mutes()
2220 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_CEC_STAT0); in initialize_hdmi_mutes()
2221 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_VP_STAT0); in initialize_hdmi_mutes()
2222 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CMPHY_STAT0); in initialize_hdmi_mutes()
2223 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AHBDMAAUD_STAT0); in initialize_hdmi_mutes()
2224 hdmi_writeb(hdmi, 0xf1, HDMI_PHY_MASK0); in initialize_hdmi_mutes()
2227 dw_hdmi_writel(hdmi, 0x00, HDMI_FC_DBGTMDS2); in initialize_hdmi_mutes()
2228 dw_hdmi_writel(hdmi, 0x00, HDMI_FC_DBGTMDS1); in initialize_hdmi_mutes()
2229 dw_hdmi_writel(hdmi, 0x00, HDMI_FC_DBGTMDS0); in initialize_hdmi_mutes()
2232 static void dw_hdmi_dev_init(struct dw_hdmi *hdmi) in dw_hdmi_dev_init() argument
2234 hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8) in dw_hdmi_dev_init()
2235 | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0); in dw_hdmi_dev_init()
2237 initialize_hdmi_mutes(hdmi); in dw_hdmi_dev_init()
2240 static void dw_hdmi_i2c_set_divs(struct dw_hdmi *hdmi) in dw_hdmi_i2c_set_divs() argument
2246 if (hdmi->i2c->scl_high_ns < 4000) in dw_hdmi_i2c_set_divs()
2249 high_ns = hdmi->i2c->scl_high_ns; in dw_hdmi_i2c_set_divs()
2251 if (hdmi->i2c->scl_low_ns < 4700) in dw_hdmi_i2c_set_divs()
2254 low_ns = hdmi->i2c->scl_low_ns; in dw_hdmi_i2c_set_divs()
2271 hdmi_writeb(hdmi, div_high & 0xff, HDMI_I2CM_SS_SCL_HCNT_0_ADDR); in dw_hdmi_i2c_set_divs()
2272 hdmi_writeb(hdmi, (div_high >> 8) & 0xff, in dw_hdmi_i2c_set_divs()
2274 hdmi_writeb(hdmi, div_low & 0xff, HDMI_I2CM_SS_SCL_LCNT_0_ADDR); in dw_hdmi_i2c_set_divs()
2275 hdmi_writeb(hdmi, (div_low >> 8) & 0xff, in dw_hdmi_i2c_set_divs()
2279 static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi) in dw_hdmi_i2c_init() argument
2282 hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ); in dw_hdmi_i2c_init()
2285 hdmi_modb(hdmi, HDMI_I2CM_DIV_STD_MODE, in dw_hdmi_i2c_init()
2289 hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT); in dw_hdmi_i2c_init()
2290 hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL, in dw_hdmi_i2c_init()
2294 hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE, in dw_hdmi_i2c_init()
2298 hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE, in dw_hdmi_i2c_init()
2302 hdmi_writeb(hdmi, 0x48, HDMI_I2CM_SDA_HOLD); in dw_hdmi_i2c_init()
2304 dw_hdmi_i2c_set_divs(hdmi); in dw_hdmi_i2c_init()
2307 void dw_hdmi_audio_enable(struct dw_hdmi *hdmi) in dw_hdmi_audio_enable() argument
2309 hdmi->audio_enable = true; in dw_hdmi_audio_enable()
2310 hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); in dw_hdmi_audio_enable()
2313 void dw_hdmi_audio_disable(struct dw_hdmi *hdmi) in dw_hdmi_audio_disable() argument
2315 hdmi->audio_enable = false; in dw_hdmi_audio_disable()
2316 hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0); in dw_hdmi_audio_disable()
2332 struct dw_hdmi *hdmi; in rockchip_dw_hdmi_init() local
2336 hdmi = malloc(sizeof(struct dw_hdmi)); in rockchip_dw_hdmi_init()
2337 if (!hdmi) in rockchip_dw_hdmi_init()
2340 memset(hdmi, 0, sizeof(struct dw_hdmi)); in rockchip_dw_hdmi_init()
2346 hdmi->id = 0; in rockchip_dw_hdmi_init()
2347 hdmi->regs = (void *)RK3528_HDMI_BASE; in rockchip_dw_hdmi_init()
2348 hdmi->io_width = 4; in rockchip_dw_hdmi_init()
2349 hdmi->scramble_low_rates = false; in rockchip_dw_hdmi_init()
2350 hdmi->hdcp1x_enable = false; in rockchip_dw_hdmi_init()
2351 hdmi->output_bus_format_rgb = false; in rockchip_dw_hdmi_init()
2354 hdmi->id = of_alias_get_id(ofnode_to_np(hdmi_node), "hdmi"); in rockchip_dw_hdmi_init()
2355 if (hdmi->id < 0) in rockchip_dw_hdmi_init()
2356 hdmi->id = 0; in rockchip_dw_hdmi_init()
2357 conn_state->disp_info = rockchip_get_disp_info(conn_state->type, hdmi->id); in rockchip_dw_hdmi_init()
2362 hdmi->dev_type = pdata->dev_type; in rockchip_dw_hdmi_init()
2363 hdmi->plat_data = pdata; in rockchip_dw_hdmi_init()
2366 hdmi->regs = dev_read_addr_ptr(conn->dev); in rockchip_dw_hdmi_init()
2367 hdmi->io_width = ofnode_read_s32_default(hdmi_node, "reg-io-width", -1); in rockchip_dw_hdmi_init()
2370 hdmi->scramble_low_rates = true; in rockchip_dw_hdmi_init()
2373 hdmi->hdcp1x_enable = true; in rockchip_dw_hdmi_init()
2375 hdmi->hdcp1x_enable = false; in rockchip_dw_hdmi_init()
2379 hdmi->output_bus_format_rgb = true; in rockchip_dw_hdmi_init()
2381 hdmi->output_bus_format_rgb = false; in rockchip_dw_hdmi_init()
2384 if (ret > 0 && hdmi->plat_data->phy_config) { in rockchip_dw_hdmi_init()
2392 hdmi->plat_data->phy_config[i].mpixelclock = (u64)phy_config[i * 4]; in rockchip_dw_hdmi_init()
2394 hdmi->plat_data->phy_config[i].mpixelclock = ~0UL; in rockchip_dw_hdmi_init()
2395 hdmi->plat_data->phy_config[i].sym_ctr = (u16)phy_config[i * 4 + 1]; in rockchip_dw_hdmi_init()
2396 hdmi->plat_data->phy_config[i].term = (u16)phy_config[i * 4 + 2]; in rockchip_dw_hdmi_init()
2397 hdmi->plat_data->phy_config[i].vlev_ctr = (u16)phy_config[i * 4 + 3]; in rockchip_dw_hdmi_init()
2404 &hdmi->adap.i2c_bus); in rockchip_dw_hdmi_init()
2405 if (hdmi->adap.i2c_bus) in rockchip_dw_hdmi_init()
2406 hdmi->adap.ops = i2c_get_ops(hdmi->adap.i2c_bus); in rockchip_dw_hdmi_init()
2410 hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rockchip_dw_hdmi_init()
2411 if (hdmi->grf <= 0) { in rockchip_dw_hdmi_init()
2413 __func__, hdmi->grf); in rockchip_dw_hdmi_init()
2418 hdmi->gpio_base = (void *)RK3528_GPIO_BASE; in rockchip_dw_hdmi_init()
2421 &hdmi->hpd_gpiod, GPIOD_IS_IN); in rockchip_dw_hdmi_init()
2426 hdmi->gpio_base = (void *)dev_read_addr_index(conn->dev, 1); in rockchip_dw_hdmi_init()
2428 if (!hdmi->gpio_base) in rockchip_dw_hdmi_init()
2431 dw_hdmi_set_reg_wr(hdmi); in rockchip_dw_hdmi_init()
2440 writel(val, hdmi->grf + pdata->grf_vop_sel_reg); in rockchip_dw_hdmi_init()
2443 hdmi->i2c = malloc(sizeof(struct dw_hdmi_i2c)); in rockchip_dw_hdmi_init()
2444 if (!hdmi->i2c) in rockchip_dw_hdmi_init()
2446 hdmi->adap.ddc_xfer = dw_hdmi_i2c_xfer; in rockchip_dw_hdmi_init()
2453 hdmi->i2c->scl_high_ns = 9625; in rockchip_dw_hdmi_init()
2454 hdmi->i2c->scl_low_ns = 10000; in rockchip_dw_hdmi_init()
2456 hdmi->i2c->scl_high_ns = in rockchip_dw_hdmi_init()
2459 hdmi->i2c->scl_low_ns = in rockchip_dw_hdmi_init()
2464 dw_hdmi_i2c_init(hdmi); in rockchip_dw_hdmi_init()
2468 hdmi->edid_data.mode_buf = mode_buf; in rockchip_dw_hdmi_init()
2469 hdmi->sample_rate = 48000; in rockchip_dw_hdmi_init()
2471 conn->data = hdmi; in rockchip_dw_hdmi_init()
2472 dw_hdmi_set_iomux(hdmi->grf, hdmi->gpio_base, in rockchip_dw_hdmi_init()
2473 &hdmi->hpd_gpiod, hdmi->dev_type); in rockchip_dw_hdmi_init()
2474 dw_hdmi_detect_phy(hdmi); in rockchip_dw_hdmi_init()
2475 dw_hdmi_dev_init(hdmi); in rockchip_dw_hdmi_init()
2482 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_deinit() local
2484 if (hdmi->i2c) in rockchip_dw_hdmi_deinit()
2485 free(hdmi->i2c); in rockchip_dw_hdmi_deinit()
2486 if (hdmi->edid_data.mode_buf) in rockchip_dw_hdmi_deinit()
2487 free(hdmi->edid_data.mode_buf); in rockchip_dw_hdmi_deinit()
2488 if (hdmi) in rockchip_dw_hdmi_deinit()
2489 free(hdmi); in rockchip_dw_hdmi_deinit()
2501 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_enable() local
2503 if (!hdmi) in rockchip_dw_hdmi_enable()
2507 memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode)); in rockchip_dw_hdmi_enable()
2509 dw_hdmi_setup(hdmi, conn, mode, state); in rockchip_dw_hdmi_enable()
2516 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_disable() local
2518 dw_hdmi_disable(conn, hdmi, state); in rockchip_dw_hdmi_disable()
2527 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_get_timing() local
2534 if (!hdmi) in rockchip_dw_hdmi_get_timing()
2537 ret = drm_do_get_edid(&hdmi->adap, conn_state->edid); in rockchip_dw_hdmi_get_timing()
2540 hdmi->sink_is_hdmi = in rockchip_dw_hdmi_get_timing()
2542 hdmi->sink_has_audio = drm_detect_monitor_audio(edid); in rockchip_dw_hdmi_get_timing()
2543 ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid); in rockchip_dw_hdmi_get_timing()
2546 hdmi->sink_is_hdmi = true; in rockchip_dw_hdmi_get_timing()
2547 hdmi->sink_has_audio = true; in rockchip_dw_hdmi_get_timing()
2548 do_cea_modes(&hdmi->edid_data, def_modes_vic, in rockchip_dw_hdmi_get_timing()
2550 hdmi->edid_data.mode_buf[0].type |= DRM_MODE_TYPE_PREFERRED; in rockchip_dw_hdmi_get_timing()
2551 hdmi->edid_data.preferred_mode = &hdmi->edid_data.mode_buf[0]; in rockchip_dw_hdmi_get_timing()
2555 conn_state->disp_info = rockchip_get_disp_info(conn_state->type, hdmi->id); in rockchip_dw_hdmi_get_timing()
2557 drm_rk_filter_whitelist(&hdmi->edid_data); in rockchip_dw_hdmi_get_timing()
2558 if (hdmi->phy.ops->mode_valid) in rockchip_dw_hdmi_get_timing()
2559 hdmi->phy.ops->mode_valid(conn, hdmi, state); in rockchip_dw_hdmi_get_timing()
2560 drm_mode_max_resolution_filter(&hdmi->edid_data, in rockchip_dw_hdmi_get_timing()
2562 if (!drm_mode_prune_invalid(&hdmi->edid_data)) { in rockchip_dw_hdmi_get_timing()
2563 printf("can't find valid hdmi mode\n"); in rockchip_dw_hdmi_get_timing()
2567 for (i = 0; i < hdmi->edid_data.modes; i++) { in rockchip_dw_hdmi_get_timing()
2568 hdmi->edid_data.mode_buf[i].vrefresh = in rockchip_dw_hdmi_get_timing()
2569 drm_mode_vrefresh(&hdmi->edid_data.mode_buf[i]); in rockchip_dw_hdmi_get_timing()
2571 vic = drm_match_cea_mode(&hdmi->edid_data.mode_buf[i]); in rockchip_dw_hdmi_get_timing()
2572 if (hdmi->edid_data.mode_buf[i].picture_aspect_ratio == HDMI_PICTURE_ASPECT_NONE) { in rockchip_dw_hdmi_get_timing()
2574 hdmi->edid_data.mode_buf[i].picture_aspect_ratio = in rockchip_dw_hdmi_get_timing()
2577 hdmi->edid_data.mode_buf[i].picture_aspect_ratio = in rockchip_dw_hdmi_get_timing()
2582 drm_mode_sort(&hdmi->edid_data); in rockchip_dw_hdmi_get_timing()
2583 drm_rk_selete_output(&hdmi->edid_data, conn_state, &bus_format, in rockchip_dw_hdmi_get_timing()
2584 overscan, hdmi->dev_type, hdmi->output_bus_format_rgb); in rockchip_dw_hdmi_get_timing()
2586 *mode = *hdmi->edid_data.preferred_mode; in rockchip_dw_hdmi_get_timing()
2587 hdmi->vic = drm_match_cea_mode(mode); in rockchip_dw_hdmi_get_timing()
2592 hdmi->hdmi_data.enc_in_bus_format = bus_format; in rockchip_dw_hdmi_get_timing()
2593 hdmi->hdmi_data.enc_out_bus_format = bus_format; in rockchip_dw_hdmi_get_timing()
2598 hdmi->hdmi_data.enc_in_bus_format = in rockchip_dw_hdmi_get_timing()
2603 hdmi->hdmi_data.enc_in_bus_format = in rockchip_dw_hdmi_get_timing()
2612 if (hdmi->vic == 6 || hdmi->vic == 7 || hdmi->vic == 21 || in rockchip_dw_hdmi_get_timing()
2613 hdmi->vic == 22 || hdmi->vic == 2 || hdmi->vic == 3 || in rockchip_dw_hdmi_get_timing()
2614 hdmi->vic == 17 || hdmi->vic == 18) in rockchip_dw_hdmi_get_timing()
2635 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_detect() local
2637 if (!hdmi) in rockchip_dw_hdmi_detect()
2640 ret = dw_hdmi_detect_hotplug(hdmi, state); in rockchip_dw_hdmi_detect()
2649 struct dw_hdmi *hdmi = conn->data; in rockchip_dw_hdmi_get_edid() local
2651 ret = drm_do_get_edid(&hdmi->adap, conn_state->edid); in rockchip_dw_hdmi_get_edid()
2656 int inno_dw_hdmi_phy_init(struct rockchip_connector *conn, struct dw_hdmi *hdmi, void *data) in inno_dw_hdmi_phy_init() argument
2663 hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format); in inno_dw_hdmi_phy_init()
2665 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) in inno_dw_hdmi_phy_init()
2667 else if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) in inno_dw_hdmi_phy_init()
2674 if (hdmi->edid_data.display_info.hdmi.scdc.supported) in inno_dw_hdmi_phy_init()
2675 rockchip_dw_hdmi_scdc_set_tmds_rate(hdmi); in inno_dw_hdmi_phy_init()
2681 void inno_dw_hdmi_phy_disable(struct rockchip_connector *conn, struct dw_hdmi *hdmi, void *data) in inno_dw_hdmi_phy_disable() argument
2686 inno_dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, void *data) in inno_dw_hdmi_phy_read_hpd() argument
2691 status = dw_hdmi_phy_read_hpd(hdmi, state); in inno_dw_hdmi_phy_read_hpd()
2693 if (hdmi->dev_type == RK3328_HDMI) { in inno_dw_hdmi_phy_read_hpd()
2695 inno_dw_hdmi_set_domain(hdmi->grf, 1); in inno_dw_hdmi_phy_read_hpd()
2697 inno_dw_hdmi_set_domain(hdmi->grf, 0); in inno_dw_hdmi_phy_read_hpd()
2703 void inno_dw_hdmi_mode_valid(struct rockchip_connector *conn, struct dw_hdmi *hdmi, void *data) in inno_dw_hdmi_mode_valid() argument
2705 struct hdmi_edid_data *edid_data = &hdmi->edid_data; in inno_dw_hdmi_mode_valid()