Lines Matching +full:ssc +full:- +full:mode
2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0+
19 #include <asm/arch-rockchip/clock.h>
32 * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
37 * @ssc: check if SSC is supported by source
44 bool ssc; member
100 lane_count = dp->link_train.lane_count; in analogix_dp_link_start()
102 dp->link_train.lt_state = CLOCK_RECOVERY; in analogix_dp_link_start()
103 dp->link_train.eq_loop = 0; in analogix_dp_link_start()
106 dp->link_train.cr_loop[lane] = 0; in analogix_dp_link_start()
109 analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate); in analogix_dp_link_start()
110 analogix_dp_set_lane_count(dp, dp->link_train.lane_count); in analogix_dp_link_start()
113 buf[0] = dp->link_train.link_rate; in analogix_dp_link_start()
114 buf[1] = dp->link_train.lane_count; in analogix_dp_link_start()
127 /* Set TX voltage-swing and pre-emphasis to minimum */ in analogix_dp_link_start()
129 dp->link_train.training_lane[lane] = in analogix_dp_link_start()
170 return -EINVAL; in analogix_dp_clock_recovery_ok()
182 return -EINVAL; in analogix_dp_channel_eq_ok()
188 return -EINVAL; in analogix_dp_channel_eq_ok()
218 dp->link_train.lt_state = FAILED; in analogix_dp_reduce_link_rate()
227 lane_count = dp->link_train.lane_count; in analogix_dp_get_adjust_training_lane()
241 dp->link_train.training_lane[lane] = training_lane; in analogix_dp_get_adjust_training_lane()
251 dp->video_info.max_link_rate == DP_LINK_BW_5_4; in analogix_dp_tps3_supported()
265 drm_dp_link_train_clock_recovery_delay(dp->dpcd); in analogix_dp_process_clock_recovery()
267 lane_count = dp->link_train.lane_count; in analogix_dp_process_clock_recovery()
288 dev_info(dp->dev, "Link Training Clock Recovery success\n"); in analogix_dp_process_clock_recovery()
289 dp->link_train.lt_state = EQUALIZER_TRAINING; in analogix_dp_process_clock_recovery()
310 dp->link_train.cr_loop[lane]++; in analogix_dp_process_clock_recovery()
312 if (dp->link_train.cr_loop[lane] == MAX_CR_LOOP || in analogix_dp_process_clock_recovery()
315 dev_err(dp->dev, "CR Max reached (%d,%d,%d)\n", in analogix_dp_process_clock_recovery()
316 dp->link_train.cr_loop[lane], in analogix_dp_process_clock_recovery()
319 return -EIO; in analogix_dp_process_clock_recovery()
329 dp->link_train.training_lane); in analogix_dp_process_clock_recovery()
342 drm_dp_link_train_channel_eq_delay(dp->dpcd); in analogix_dp_process_equalizer_training()
344 lane_count = dp->link_train.lane_count; in analogix_dp_process_equalizer_training()
353 return -EIO; in analogix_dp_process_equalizer_training()
368 dp->link_train.link_rate = reg; in analogix_dp_process_equalizer_training()
370 dp->link_train.lane_count = reg; in analogix_dp_process_equalizer_training()
373 dp->link_train.link_rate, dp->link_train.lane_count); in analogix_dp_process_equalizer_training()
375 /* set enhanced mode if available */ in analogix_dp_process_equalizer_training()
377 dp->link_train.lt_state = FINISHED; in analogix_dp_process_equalizer_training()
383 dp->link_train.eq_loop++; in analogix_dp_process_equalizer_training()
385 if (dp->link_train.eq_loop > MAX_EQ_LOOP) { in analogix_dp_process_equalizer_training()
386 dev_dbg(dp->dev, "EQ Max loop\n"); in analogix_dp_process_equalizer_training()
388 return -EIO; in analogix_dp_process_equalizer_training()
400 lane_count, dp->link_train.training_lane); in analogix_dp_process_equalizer_training()
446 analogix_dp_get_max_rx_bandwidth(dp, &dp->link_train.link_rate); in analogix_dp_init_training()
447 analogix_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count); in analogix_dp_init_training()
450 dp->link_train.lane_count = min_t(u8, dp->link_train.lane_count, in analogix_dp_init_training()
452 dp->link_train.link_rate = min_t(u32, dp->link_train.link_rate, in analogix_dp_init_training()
456 dp->link_train.ssc = !!(dpcd & DP_MAX_DOWNSPREAD_0_5); in analogix_dp_init_training()
468 dp->link_train.lt_state = START; in analogix_dp_sw_link_training()
472 switch (dp->link_train.lt_state) { in analogix_dp_sw_link_training()
476 dev_err(dp->dev, "LT link start failed!\n"); in analogix_dp_sw_link_training()
481 dev_err(dp->dev, "LT CR failed!\n"); in analogix_dp_sw_link_training()
486 dev_err(dp->dev, "LT EQ failed!\n"); in analogix_dp_sw_link_training()
492 return -EREMOTEIO; in analogix_dp_sw_link_training()
507 dev_err(dp->dev, "failed to init training\n"); in analogix_dp_set_link_train()
529 dev_err(dp->dev, "PLL is not locked yet.\n"); in analogix_dp_config_video()
530 return -EINVAL; in analogix_dp_config_video()
538 dev_err(dp->dev, "Timeout of video streamclk ok\n"); in analogix_dp_config_video()
539 return -ETIMEDOUT; in analogix_dp_config_video()
554 /* Configure video slave mode */ in analogix_dp_config_video()
572 dev_err(dp->dev, "Timeout of video streamclk ok\n"); in analogix_dp_config_video()
573 return -ETIMEDOUT; in analogix_dp_config_video()
638 unsigned char *edid = dp->edid; in analogix_dp_read_edid()
646 * into E-EDID in I2C device, 0x30. in analogix_dp_read_edid()
649 /* Read Extension Flag, Number of 128-byte EDID extension blocks */ in analogix_dp_read_edid()
669 return -EINVAL; in analogix_dp_read_edid()
681 return -EINVAL; in analogix_dp_read_edid()
694 dev_info(dp->dev, in analogix_dp_read_edid()
705 return -EINVAL; in analogix_dp_read_edid()
730 if (retval && try--) { in analogix_dp_handle_edid()
750 struct connector_state *conn_state = &state->conn_state; in analogix_dp_connector_init()
751 struct analogix_dp_device *dp = dev_get_priv(conn->dev); in analogix_dp_connector_init()
753 conn_state->output_if |= dp->id ? VOP_OUTPUT_IF_eDP1 : VOP_OUTPUT_IF_eDP0; in analogix_dp_connector_init()
754 conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA; in analogix_dp_connector_init()
755 conn_state->color_space = V4L2_COLORSPACE_DEFAULT; in analogix_dp_connector_init()
757 reset_assert_bulk(&dp->resets); in analogix_dp_connector_init()
759 reset_deassert_bulk(&dp->resets); in analogix_dp_connector_init()
761 conn_state->disp_info = rockchip_get_disp_info(conn_state->type, dp->id); in analogix_dp_connector_init()
762 generic_phy_set_mode(&dp->phy, PHY_MODE_DP); in analogix_dp_connector_init()
763 generic_phy_power_on(&dp->phy); in analogix_dp_connector_init()
772 struct connector_state *conn_state = &state->conn_state; in analogix_dp_connector_get_edid()
773 struct analogix_dp_device *dp = dev_get_priv(conn->dev); in analogix_dp_connector_get_edid()
778 dev_err(dp->dev, "failed to get edid\n"); in analogix_dp_connector_get_edid()
782 memcpy(&conn_state->edid, &dp->edid, sizeof(dp->edid)); in analogix_dp_connector_get_edid()
792 if (dp->dpcd[DP_DPCD_REV] < 0x11) in analogix_dp_link_power_up()
816 if (dp->dpcd[DP_DPCD_REV] < 0x11) in analogix_dp_link_power_down()
836 struct connector_state *conn_state = &state->conn_state; in analogix_dp_connector_enable()
837 struct crtc_state *crtc_state = &state->crtc_state; in analogix_dp_connector_enable()
839 (const struct rockchip_dp_chip_data *)dev_get_driver_data(conn->dev); in analogix_dp_connector_enable()
840 struct analogix_dp_device *dp = dev_get_priv(conn->dev); in analogix_dp_connector_enable()
841 struct video_info *video = &dp->video_info; in analogix_dp_connector_enable()
845 if (pdata->lcdsel_grf_reg) { in analogix_dp_connector_enable()
846 if (crtc_state->crtc_id) in analogix_dp_connector_enable()
847 val = pdata->lcdsel_lit; in analogix_dp_connector_enable()
849 val = pdata->lcdsel_big; in analogix_dp_connector_enable()
851 regmap_write(dp->grf, pdata->lcdsel_grf_reg, val); in analogix_dp_connector_enable()
854 if (pdata->chip_type == RK3588_EDP) in analogix_dp_connector_enable()
855 regmap_write(dp->grf, dp->id ? RK3588_GRF_VO1_CON1 : RK3588_GRF_VO1_CON0, in analogix_dp_connector_enable()
858 switch (conn_state->bpc) { in analogix_dp_connector_enable()
860 video->color_depth = COLOR_12; in analogix_dp_connector_enable()
863 video->color_depth = COLOR_10; in analogix_dp_connector_enable()
866 video->color_depth = COLOR_6; in analogix_dp_connector_enable()
870 video->color_depth = COLOR_8; in analogix_dp_connector_enable()
875 DP_RECEIVER_CAP_SIZE, dp->dpcd); in analogix_dp_connector_enable()
877 dev_err(dp->dev, "failed to read dpcd caps: %d\n", ret); in analogix_dp_connector_enable()
883 dev_err(dp->dev, "failed to power up link: %d\n", ret); in analogix_dp_connector_enable()
887 ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count, in analogix_dp_connector_enable()
888 dp->video_info.max_link_rate); in analogix_dp_connector_enable()
890 dev_err(dp->dev, "unable to do link train\n"); in analogix_dp_connector_enable()
899 analogix_dp_set_video_format(dp, &conn_state->mode); in analogix_dp_connector_enable()
901 if (dp->video_bist_enable) in analogix_dp_connector_enable()
906 dev_err(dp->dev, "unable to config video\n"); in analogix_dp_connector_enable()
917 (const struct rockchip_dp_chip_data *)dev_get_driver_data(conn->dev); in analogix_dp_connector_disable()
918 struct analogix_dp_device *dp = dev_get_priv(conn->dev); in analogix_dp_connector_disable()
923 if (pdata->chip_type == RK3588_EDP) in analogix_dp_connector_disable()
924 regmap_write(dp->grf, dp->id ? RK3588_GRF_VO1_CON1 : RK3588_GRF_VO1_CON0, in analogix_dp_connector_disable()
933 struct analogix_dp_device *dp = dev_get_priv(conn->dev); in analogix_dp_connector_detect()
948 struct udevice *dev = dp->dev; in analogix_dp_parse_link_frequencies()
952 endpoint = rockchip_of_graph_get_endpoint_by_regs(dev->node, 1, 0); in analogix_dp_parse_link_frequencies()
956 if (of_property_read_u64(endpoint, "link-frequencies", &frequency) < 0) in analogix_dp_parse_link_frequencies()
979 struct udevice *dev = dp->dev; in analogix_dp_parse_dt()
985 dp->force_hpd = dev_read_bool(dev, "force-hpd"); in analogix_dp_parse_dt()
986 dp->video_bist_enable = dev_read_bool(dev, "analogix,video-bist-enable"); in analogix_dp_parse_dt()
987 dp->video_info.force_stream_valid = in analogix_dp_parse_dt()
988 dev_read_bool(dev, "analogix,force-stream-valid"); in analogix_dp_parse_dt()
991 if (max_link_rate && max_link_rate < drm_dp_bw_code_to_link_rate(dp->video_info.max_link_rate)) in analogix_dp_parse_dt()
992 dp->video_info.max_link_rate = drm_dp_link_rate_to_bw_code(max_link_rate); in analogix_dp_parse_dt()
994 if (dev_read_prop(dev, "data-lanes", &len)) { in analogix_dp_parse_dt()
998 return -EINVAL; in analogix_dp_parse_dt()
1001 ret = dev_read_u32_array(dev, "data-lanes", dp->lane_map, in analogix_dp_parse_dt()
1006 dp->video_info.max_lane_count = num_lanes; in analogix_dp_parse_dt()
1008 dp->lane_map[0] = 0; in analogix_dp_parse_dt()
1009 dp->lane_map[1] = 1; in analogix_dp_parse_dt()
1010 dp->lane_map[2] = 2; in analogix_dp_parse_dt()
1011 dp->lane_map[3] = 3; in analogix_dp_parse_dt()
1025 dp->reg_base = dev_read_addr_ptr(dev); in analogix_dp_probe()
1027 dp->id = of_alias_get_id(ofnode_to_np(dev->node), "edp"); in analogix_dp_probe()
1028 if (dp->id < 0) in analogix_dp_probe()
1029 dp->id = 0; in analogix_dp_probe()
1034 dp->grf = syscon_get_regmap(syscon); in analogix_dp_probe()
1035 if (!dp->grf) in analogix_dp_probe()
1036 return -ENODEV; in analogix_dp_probe()
1039 ret = reset_get_bulk(dev, &dp->resets); in analogix_dp_probe()
1045 ret = gpio_request_by_name(dev, "hpd-gpios", 0, &dp->hpd_gpio, in analogix_dp_probe()
1047 if (ret && ret != -ENOENT) { in analogix_dp_probe()
1052 generic_phy_get_by_name(dev, "dp", &dp->phy); in analogix_dp_probe()
1054 dp->plat_data.dev_type = ROCKCHIP_DP; in analogix_dp_probe()
1055 dp->plat_data.subdev_type = pdata->chip_type; in analogix_dp_probe()
1056 dp->plat_data.ssc = pdata->ssc; in analogix_dp_probe()
1058 dp->video_info.max_link_rate = pdata->max_link_rate; in analogix_dp_probe()
1059 dp->video_info.max_lane_count = pdata->max_lane_count; in analogix_dp_probe()
1061 dp->dev = dev; in analogix_dp_probe()
1069 rockchip_connector_bind(&dp->connector, dev, dp->id, &analogix_dp_connector_funcs, in analogix_dp_probe()
1097 .ssc = true,
1105 .ssc = true,
1113 .ssc = true,
1121 .compatible = "rockchip,rk3288-dp",
1124 .compatible = "rockchip,rk3368-edp",
1127 .compatible = "rockchip,rk3399-edp",
1130 .compatible = "rockchip,rk3568-edp",
1133 .compatible = "rockchip,rk3588-edp",