163 static inline void lcdc_write(unsigned int val, u32 *addr)  in lcdc_write()  function
224 		lcdc_write(LCD_CLK_MAIN_RESET,  in lcd_enable_raster()
230 		lcdc_write(0,  in lcd_enable_raster()
237 		lcdc_write(reg | LCD_RASTER_ENABLE,  in lcd_enable_raster()
254 		lcdc_write(reg & ~LCD_RASTER_ENABLE,  in lcd_disable_raster()
268 		lcdc_write(stat, &da8xx_fb_reg_base->stat);  in lcd_disable_raster()
270 		lcdc_write(stat, &da8xx_fb_reg_base->raw_stat);  in lcd_disable_raster()
304 			lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set);  in lcd_blit()
309 		lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_0);  in lcd_blit()
310 		lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);  in lcd_blit()
311 		lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_1);  in lcd_blit()
312 		lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_1);  in lcd_blit()
315 		lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_0);  in lcd_blit()
316 		lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);  in lcd_blit()
317 		lcdc_write(0, &da8xx_fb_reg_base->dma_frm_buf_base_addr_1);  in lcd_blit()
318 		lcdc_write(0, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_1);  in lcd_blit()
331 			lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set);  in lcd_blit()
334 		lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_0);  in lcd_blit()
335 		lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);  in lcd_blit()
338 	lcdc_write(reg_dma, &da8xx_fb_reg_base->dma_ctrl);  in lcd_blit()
339 	lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl);  in lcd_blit()
373 	lcdc_write(reg, &da8xx_fb_reg_base->dma_ctrl);  in lcd_cfg_dma()
386 	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_2);  in lcd_cfg_ac_bias()
398 	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_0);  in lcd_cfg_horizontal_sync()
410 	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_1);  in lcd_cfg_vertical_sync()
449 		lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set);  in lcd_cfg_display()
452 	lcdc_write(reg, &da8xx_fb_reg_base->raster_ctrl);  in lcd_cfg_display()
476 	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_2);  in lcd_cfg_display()
509 	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_0);  in lcd_cfg_frame_buffer()
515 	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_1);  in lcd_cfg_frame_buffer()
521 		lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_2);  in lcd_cfg_frame_buffer()
535 	lcdc_write(reg, &da8xx_fb_reg_base->raster_ctrl);  in lcd_cfg_frame_buffer()
634 	lcdc_write(0, &da8xx_fb_reg_base->dma_ctrl);  in lcd_reset()
635 	lcdc_write(0, &da8xx_fb_reg_base->raster_ctrl);  in lcd_reset()
638 		lcdc_write(0, &da8xx_fb_reg_base->int_ena_set);  in lcd_reset()
640 		lcdc_write(LCD_CLK_MAIN_RESET, &da8xx_fb_reg_base->clk_reset);  in lcd_reset()
641 		lcdc_write(0, &da8xx_fb_reg_base->clk_reset);  in lcd_reset()
657 	lcdc_write(LCD_CLK_DIVISOR(div) |  in lcd_calc_clk_divider()
661 		lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN |  in lcd_calc_clk_divider()
678 		lcdc_write((lcdc_read(&da8xx_fb_reg_base->raster_timing_2) |  in lcd_init()
682 		lcdc_write((lcdc_read(&da8xx_fb_reg_base->raster_timing_2) &  in lcd_init()
721 	lcdc_write((lcdc_read(&da8xx_fb_reg_base->raster_ctrl) & 0xfff00fff) |  in lcd_init()
730 	lcdc_write(par->dma_start,  in lcdc_dma_start()
732 	lcdc_write(par->dma_end,  in lcdc_dma_start()
734 	lcdc_write(0,  in lcdc_dma_start()
736 	lcdc_write(0,  in lcdc_dma_start()
749 		lcdc_write(stat, &da8xx_fb_reg_base->stat);  in lcdc_irq_handler_rev01()
762 		lcdc_write(stat, &da8xx_fb_reg_base->stat);  in lcdc_irq_handler_rev01()
767 		lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl);  in lcdc_irq_handler_rev01()
773 		lcdc_write(stat, &da8xx_fb_reg_base->stat);  in lcdc_irq_handler_rev01()
778 		lcdc_write(par->dma_start,  in lcdc_irq_handler_rev01()
780 		lcdc_write(par->dma_end,  in lcdc_irq_handler_rev01()
797 		lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);  in lcdc_irq_handler_rev02()
799 		lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);  in lcdc_irq_handler_rev02()
811 		lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);  in lcdc_irq_handler_rev02()
816 		lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_clr);  in lcdc_irq_handler_rev02()
820 		lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);  in lcdc_irq_handler_rev02()
823 		lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);  in lcdc_irq_handler_rev02()
828 		lcdc_write(par->dma_start,  in lcdc_irq_handler_rev02()
830 		lcdc_write(par->dma_end,  in lcdc_irq_handler_rev02()
833 		lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);  in lcdc_irq_handler_rev02()
836 	lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);  in lcdc_irq_handler_rev02()
1011 		lcdc_write(0xFFFF, &da8xx_fb_reg_base->stat);  in video_hw_init()
1013 		lcdc_write(0xFFFF, &da8xx_fb_reg_base->masked_stat);  in video_hw_init()