358 	u32 reg32;  in igd_setup_panel()  local
361 	reg32 = (plat->dp_hotplug[0] & 0x7) << 2;  in igd_setup_panel()
362 	reg32 |= (plat->dp_hotplug[1] & 0x7) << 10;  in igd_setup_panel()
363 	reg32 |= (plat->dp_hotplug[2] & 0x7) << 18;  in igd_setup_panel()
364 	gtt_write(priv, PCH_PORT_HOTPLUG, reg32);  in igd_setup_panel()
367 	reg32 = (plat->port_select & 0x3) << 30;  in igd_setup_panel()
368 	reg32 |= (plat->power_up_delay & 0x1fff) << 16;  in igd_setup_panel()
369 	reg32 |= (plat->power_backlight_on_delay & 0x1fff);  in igd_setup_panel()
370 	gtt_write(priv, PCH_PP_ON_DELAYS, reg32);  in igd_setup_panel()
373 	reg32 = (plat->power_down_delay & 0x1fff) << 16;  in igd_setup_panel()
374 	reg32 |= (plat->power_backlight_off_delay & 0x1fff);  in igd_setup_panel()
375 	gtt_write(priv, PCH_PP_OFF_DELAYS, reg32);  in igd_setup_panel()
379 		reg32 = gtt_read(priv, PCH_PP_DIVISOR);  in igd_setup_panel()
380 		reg32 &= ~0xff;  in igd_setup_panel()
381 		reg32 |= plat->power_cycle_delay & 0xff;  in igd_setup_panel()
382 		gtt_write(priv, PCH_PP_DIVISOR, reg32);  in igd_setup_panel()