Lines Matching refs:csr
94 u16 csr; in musb_h_tx_flush_fifo() local
98 csr = musb_readw(epio, MUSB_TXCSR); in musb_h_tx_flush_fifo()
99 while (csr & MUSB_TXCSR_FIFONOTEMPTY) { in musb_h_tx_flush_fifo()
100 if (csr != lastcsr) in musb_h_tx_flush_fifo()
101 dev_dbg(musb->controller, "Host TX FIFONOTEMPTY csr: %02x\n", csr); in musb_h_tx_flush_fifo()
102 lastcsr = csr; in musb_h_tx_flush_fifo()
103 csr |= MUSB_TXCSR_FLUSHFIFO; in musb_h_tx_flush_fifo()
104 musb_writew(epio, MUSB_TXCSR, csr); in musb_h_tx_flush_fifo()
105 csr = musb_readw(epio, MUSB_TXCSR); in musb_h_tx_flush_fifo()
108 ep->epnum, csr)) in musb_h_tx_flush_fifo()
117 u16 csr; in musb_h_ep0_flush_fifo() local
122 csr = musb_readw(epio, MUSB_TXCSR); in musb_h_ep0_flush_fifo()
123 if (!(csr & (MUSB_CSR0_TXPKTRDY | MUSB_CSR0_RXPKTRDY))) in musb_h_ep0_flush_fifo()
126 csr = musb_readw(epio, MUSB_TXCSR); in musb_h_ep0_flush_fifo()
131 ep->epnum, csr); in musb_h_ep0_flush_fifo()
318 u16 csr; in musb_save_toggle() local
326 csr = musb_readw(epio, MUSB_RXCSR) & MUSB_RXCSR_H_DATATOGGLE; in musb_save_toggle()
328 csr = musb_readw(epio, MUSB_TXCSR) & MUSB_TXCSR_H_DATATOGGLE; in musb_save_toggle()
330 usb_settoggle(urb->dev, qh->epnum, !is_in, csr ? 1 : 0); in musb_save_toggle()
427 static u16 musb_h_flush_rxfifo(struct musb_hw_ep *hw_ep, u16 csr) in musb_h_flush_rxfifo() argument
433 csr |= MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_RXPKTRDY; in musb_h_flush_rxfifo()
434 csr &= ~(MUSB_RXCSR_H_REQPKT in musb_h_flush_rxfifo()
439 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_h_flush_rxfifo()
440 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_h_flush_rxfifo()
454 u16 csr; in musb_host_packet_rx() local
531 csr = musb_readw(epio, MUSB_RXCSR); in musb_host_packet_rx()
532 csr |= MUSB_RXCSR_H_WZC_BITS; in musb_host_packet_rx()
534 musb_h_flush_rxfifo(hw_ep, csr); in musb_host_packet_rx()
537 csr &= ~(MUSB_RXCSR_RXPKTRDY | MUSB_RXCSR_H_REQPKT); in musb_host_packet_rx()
539 csr |= MUSB_RXCSR_H_REQPKT; in musb_host_packet_rx()
540 musb_writew(epio, MUSB_RXCSR, csr); in musb_host_packet_rx()
557 u16 csr; in musb_rx_reinit() local
566 csr = musb_readw(ep->regs, MUSB_TXCSR); in musb_rx_reinit()
567 if (csr & MUSB_TXCSR_MODE) { in musb_rx_reinit()
569 csr = musb_readw(ep->regs, MUSB_TXCSR); in musb_rx_reinit()
571 csr | MUSB_TXCSR_FRCDATATOG); in musb_rx_reinit()
578 if (csr & MUSB_TXCSR_DMAMODE) in musb_rx_reinit()
584 csr = musb_readw(ep->regs, MUSB_RXCSR); in musb_rx_reinit()
585 if (csr & MUSB_RXCSR_RXPKTRDY) in musb_rx_reinit()
624 u16 csr; in musb_tx_dma_program() local
631 csr = musb_readw(epio, MUSB_TXCSR); in musb_tx_dma_program()
634 csr |= MUSB_TXCSR_DMAMODE | MUSB_TXCSR_DMAENAB; in musb_tx_dma_program()
637 csr |= MUSB_TXCSR_AUTOSET; in musb_tx_dma_program()
640 csr &= ~(MUSB_TXCSR_AUTOSET | MUSB_TXCSR_DMAMODE); in musb_tx_dma_program()
641 csr |= MUSB_TXCSR_DMAENAB; /* against programmer's guide */ in musb_tx_dma_program()
644 musb_writew(epio, MUSB_TXCSR, csr); in musb_tx_dma_program()
671 csr = musb_readw(epio, MUSB_TXCSR); in musb_tx_dma_program()
672 csr &= ~(MUSB_TXCSR_AUTOSET | MUSB_TXCSR_DMAENAB); in musb_tx_dma_program()
673 musb_writew(epio, MUSB_TXCSR, csr | MUSB_TXCSR_H_WZC_BITS); in musb_tx_dma_program()
725 u16 csr; in musb_ep_program() local
729 csr = musb_readw(epio, MUSB_TXCSR); in musb_ep_program()
745 csr &= ~(MUSB_TXCSR_H_NAKTIMEOUT in musb_ep_program()
753 csr |= MUSB_TXCSR_MODE; in musb_ep_program()
756 csr |= MUSB_TXCSR_H_WR_DATATOGGLE in musb_ep_program()
759 csr |= MUSB_TXCSR_CLRDATATOG; in musb_ep_program()
761 musb_writew(epio, MUSB_TXCSR, csr); in musb_ep_program()
763 csr &= ~MUSB_TXCSR_DMAMODE; in musb_ep_program()
764 musb_writew(epio, MUSB_TXCSR, csr); in musb_ep_program()
765 csr = musb_readw(epio, MUSB_TXCSR); in musb_ep_program()
823 u16 csr; in musb_ep_program() local
830 csr = MUSB_RXCSR_H_WR_DATATOGGLE in musb_ep_program()
833 csr = 0; in musb_ep_program()
835 csr |= MUSB_RXCSR_DISNYET; in musb_ep_program()
838 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
840 if (csr & (MUSB_RXCSR_RXPKTRDY in musb_ep_program()
844 hw_ep->epnum, csr); in musb_ep_program()
847 csr &= MUSB_RXCSR_DISNYET; in musb_ep_program()
858 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_ep_program()
859 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
874 csr |= MUSB_RXCSR_DMAENAB; in musb_ep_program()
877 csr |= MUSB_RXCSR_H_REQPKT; in musb_ep_program()
878 dev_dbg(musb->controller, "RXCSR%d := %04x\n", epnum, csr); in musb_ep_program()
879 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_ep_program()
880 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
968 u16 csr, len; in musb_h_ep0_irq() local
981 csr = musb_readw(epio, MUSB_CSR0); in musb_h_ep0_irq()
982 len = (csr & MUSB_CSR0_RXPKTRDY) in musb_h_ep0_irq()
987 csr, qh, len, urb, musb->ep0_stage); in musb_h_ep0_irq()
996 if (csr & MUSB_CSR0_H_RXSTALL) { in musb_h_ep0_irq()
1000 } else if (csr & MUSB_CSR0_H_ERROR) { in musb_h_ep0_irq()
1001 dev_dbg(musb->controller, "no response, csr0 %04x\n", csr); in musb_h_ep0_irq()
1004 } else if (csr & MUSB_CSR0_H_NAKTIMEOUT) { in musb_h_ep0_irq()
1027 if (csr & MUSB_CSR0_H_REQPKT) { in musb_h_ep0_irq()
1028 csr &= ~MUSB_CSR0_H_REQPKT; in musb_h_ep0_irq()
1029 musb_writew(epio, MUSB_CSR0, csr); in musb_h_ep0_irq()
1030 csr &= ~MUSB_CSR0_H_NAKTIMEOUT; in musb_h_ep0_irq()
1031 musb_writew(epio, MUSB_CSR0, csr); in musb_h_ep0_irq()
1055 csr = (MUSB_EP0_IN == musb->ep0_stage) in musb_h_ep0_irq()
1061 csr = MUSB_CSR0_H_STATUSPKT in musb_h_ep0_irq()
1064 csr = MUSB_CSR0_H_STATUSPKT in musb_h_ep0_irq()
1070 dev_dbg(musb->controller, "ep0 STATUS, csr %04x\n", csr); in musb_h_ep0_irq()
1073 musb_writew(epio, MUSB_CSR0, csr); in musb_h_ep0_irq()
2131 u16 csr; local
2152 csr = musb_h_flush_rxfifo(ep, 0);
2160 csr = musb_readw(epio, MUSB_TXCSR);
2161 csr &= ~(MUSB_TXCSR_AUTOSET
2167 musb_writew(epio, MUSB_TXCSR, csr);
2169 musb_writew(epio, MUSB_TXCSR, csr);
2171 csr = musb_readw(epio, MUSB_TXCSR);