Lines Matching refs:musb
28 #define next_ep0_request(musb) next_in_request(&(musb)->endpoints[0]) argument
58 struct musb *musb, in service_tx_status_request() argument
61 void __iomem *mbase = musb->mregs; in service_tx_status_request()
70 result[0] = musb->is_self_powered << USB_DEVICE_SELF_POWERED; in service_tx_status_request()
71 result[0] |= musb->may_wakeup << USB_DEVICE_REMOTE_WAKEUP; in service_tx_status_request()
72 if (musb->g.is_otg) { in service_tx_status_request()
73 result[0] |= musb->g.b_hnp_enable in service_tx_status_request()
75 result[0] |= musb->g.a_alt_hnp_support in service_tx_status_request()
77 result[0] |= musb->g.a_hnp_support in service_tx_status_request()
101 ep = &musb->endpoints[epnum].ep_in; in service_tx_status_request()
103 ep = &musb->endpoints[epnum].ep_out; in service_tx_status_request()
105 regs = musb->endpoints[epnum].regs; in service_tx_status_request()
136 musb_write_fifo(&musb->endpoints[0], len, result); in service_tx_status_request()
154 service_in_request(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest) in service_in_request() argument
162 handled = service_tx_status_request(musb, in service_in_request()
178 static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req) in musb_g_ep0_giveback() argument
180 musb_g_giveback(&musb->endpoints[0].ep_in, req, 0); in musb_g_ep0_giveback()
186 static inline void musb_try_b_hnp_enable(struct musb *musb) in musb_try_b_hnp_enable() argument
188 void __iomem *mbase = musb->mregs; in musb_try_b_hnp_enable()
191 dev_dbg(musb->controller, "HNP: Setting HR\n"); in musb_try_b_hnp_enable()
207 service_zero_data_request(struct musb *musb, in service_zero_data_request() argument
209 __releases(musb->lock) in service_zero_data_request()
210 __acquires(musb->lock) in service_zero_data_request()
213 void __iomem *mbase = musb->mregs; in service_zero_data_request()
222 musb->set_address = true; in service_zero_data_request()
223 musb->address = (u8) (ctrlrequest->wValue & 0x7f); in service_zero_data_request()
233 musb->may_wakeup = 0; in service_zero_data_request()
252 ep = musb->endpoints + epnum; in service_zero_data_request()
288 dev_dbg(musb->controller, "restarting the request\n"); in service_zero_data_request()
289 musb_ep_restart(musb, request); in service_zero_data_request()
308 musb->may_wakeup = 1; in service_zero_data_request()
311 if (musb->g.speed != USB_SPEED_HIGH) in service_zero_data_request()
320 musb->test_mode_nr = in service_zero_data_request()
326 musb->test_mode_nr = in service_zero_data_request()
332 musb->test_mode_nr = in service_zero_data_request()
338 musb->test_mode_nr = in service_zero_data_request()
345 musb->test_mode_nr = in service_zero_data_request()
351 musb->test_mode_nr = in service_zero_data_request()
357 musb->test_mode_nr = in service_zero_data_request()
363 musb->test_mode_nr = in service_zero_data_request()
372 musb->test_mode = true; in service_zero_data_request()
375 if (!musb->g.is_otg) in service_zero_data_request()
377 musb->g.b_hnp_enable = 1; in service_zero_data_request()
378 musb_try_b_hnp_enable(musb); in service_zero_data_request()
381 if (!musb->g.is_otg) in service_zero_data_request()
383 musb->g.a_hnp_support = 1; in service_zero_data_request()
386 if (!musb->g.is_otg) in service_zero_data_request()
388 musb->g.a_alt_hnp_support = 1; in service_zero_data_request()
416 ep = musb->endpoints + epnum; in service_zero_data_request()
467 static void ep0_rxstate(struct musb *musb) in ep0_rxstate() argument
469 void __iomem *regs = musb->control_ep->regs; in ep0_rxstate()
474 request = next_ep0_request(musb); in ep0_rxstate()
490 musb_read_fifo(&musb->endpoints[0], count, buf); in ep0_rxstate()
494 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in ep0_rxstate()
506 musb->ackpend = csr; in ep0_rxstate()
507 musb_g_ep0_giveback(musb, req); in ep0_rxstate()
508 if (!musb->ackpend) in ep0_rxstate()
510 musb->ackpend = 0; in ep0_rxstate()
512 musb_ep_select(musb->mregs, 0); in ep0_rxstate()
522 static void ep0_txstate(struct musb *musb) in ep0_txstate() argument
524 void __iomem *regs = musb->control_ep->regs; in ep0_txstate()
525 struct musb_request *req = next_ep0_request(musb); in ep0_txstate()
533 dev_dbg(musb->controller, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0)); in ep0_txstate()
543 musb_write_fifo(&musb->endpoints[0], fifo_count, fifo_src); in ep0_txstate()
550 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT; in ep0_txstate()
556 musb_ep_select(musb->mregs, 0); in ep0_txstate()
565 musb->ackpend = csr; in ep0_txstate()
566 musb_g_ep0_giveback(musb, request); in ep0_txstate()
567 if (!musb->ackpend) in ep0_txstate()
569 musb->ackpend = 0; in ep0_txstate()
580 musb_read_setup(struct musb *musb, struct usb_ctrlrequest *req) in musb_read_setup() argument
583 void __iomem *regs = musb->control_ep->regs; in musb_read_setup()
585 musb_read_fifo(&musb->endpoints[0], sizeof *req, (u8 *)req); in musb_read_setup()
590 dev_dbg(musb->controller, "SETUP req%02x.%02x v%04x i%04x l%d\n", in musb_read_setup()
598 r = next_ep0_request(musb); in musb_read_setup()
600 musb_g_ep0_giveback(musb, &r->request); in musb_read_setup()
610 musb->set_address = false; in musb_read_setup()
611 musb->ackpend = MUSB_CSR0_P_SVDRXPKTRDY; in musb_read_setup()
614 musb->ackpend |= MUSB_CSR0_TXPKTRDY; in musb_read_setup()
615 musb->ep0_state = MUSB_EP0_STAGE_ACKWAIT; in musb_read_setup()
617 musb->ep0_state = MUSB_EP0_STAGE_TX; in musb_read_setup()
622 musb->ackpend = 0; in musb_read_setup()
624 musb->ep0_state = MUSB_EP0_STAGE_RX; in musb_read_setup()
628 forward_to_driver(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest) in forward_to_driver() argument
629 __releases(musb->lock) in forward_to_driver()
630 __acquires(musb->lock) in forward_to_driver()
633 if (!musb->gadget_driver) in forward_to_driver()
635 spin_unlock(&musb->lock); in forward_to_driver()
636 retval = musb->gadget_driver->setup(&musb->g, ctrlrequest); in forward_to_driver()
637 spin_lock(&musb->lock); in forward_to_driver()
646 irqreturn_t musb_g_ep0_irq(struct musb *musb) in musb_g_ep0_irq() argument
650 void __iomem *mbase = musb->mregs; in musb_g_ep0_irq()
651 void __iomem *regs = musb->endpoints[0].regs; in musb_g_ep0_irq()
658 dev_dbg(musb->controller, "csr %04x, count %d, myaddr %d, ep0stage %s\n", in musb_g_ep0_irq()
661 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
676 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
685 switch (musb->ep0_state) { in musb_g_ep0_irq()
687 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT; in musb_g_ep0_irq()
690 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in musb_g_ep0_irq()
694 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
704 switch (musb->ep0_state) { in musb_g_ep0_irq()
709 ep0_txstate(musb); in musb_g_ep0_irq()
717 ep0_rxstate(musb); in musb_g_ep0_irq()
730 if (musb->set_address) { in musb_g_ep0_irq()
731 musb->set_address = false; in musb_g_ep0_irq()
732 musb_writeb(mbase, MUSB_FADDR, musb->address); in musb_g_ep0_irq()
736 else if (musb->test_mode) { in musb_g_ep0_irq()
737 dev_dbg(musb->controller, "entering TESTMODE\n"); in musb_g_ep0_irq()
739 if (MUSB_TEST_PACKET == musb->test_mode_nr) in musb_g_ep0_irq()
740 musb_load_testpacket(musb); in musb_g_ep0_irq()
743 musb->test_mode_nr); in musb_g_ep0_irq()
752 req = next_ep0_request(musb); in musb_g_ep0_irq()
754 musb_g_ep0_giveback(musb, &req->request); in musb_g_ep0_irq()
765 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
776 musb->ep0_state = MUSB_EP0_STAGE_SETUP; in musb_g_ep0_irq()
789 musb_read_setup(musb, &setup); in musb_g_ep0_irq()
793 if (unlikely(musb->g.speed == USB_SPEED_UNKNOWN)) { in musb_g_ep0_irq()
800 musb->g.speed = (power & MUSB_POWER_HSMODE) in musb_g_ep0_irq()
805 switch (musb->ep0_state) { in musb_g_ep0_irq()
814 musb, &setup); in musb_g_ep0_irq()
822 musb->ackpend |= MUSB_CSR0_P_DATAEND; in musb_g_ep0_irq()
826 musb->ep0_state = in musb_g_ep0_irq()
835 handled = service_in_request(musb, &setup); in musb_g_ep0_irq()
837 musb->ackpend = MUSB_CSR0_TXPKTRDY in musb_g_ep0_irq()
839 musb->ep0_state = in musb_g_ep0_irq()
849 dev_dbg(musb->controller, "handled %d, csr %04x, ep0stage %s\n", in musb_g_ep0_irq()
851 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
862 handled = forward_to_driver(musb, &setup); in musb_g_ep0_irq()
866 dev_dbg(musb->controller, "stall (%d)\n", handled); in musb_g_ep0_irq()
867 musb->ackpend |= MUSB_CSR0_P_SENDSTALL; in musb_g_ep0_irq()
868 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
871 musb->ackpend); in musb_g_ep0_irq()
872 musb->ackpend = 0; in musb_g_ep0_irq()
888 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
914 struct musb *musb; in musb_g_ep0_queue() local
923 musb = ep->musb; in musb_g_ep0_queue()
924 regs = musb->control_ep->regs; in musb_g_ep0_queue()
927 req->musb = musb; in musb_g_ep0_queue()
932 spin_lock_irqsave(&musb->lock, lockflags); in musb_g_ep0_queue()
939 switch (musb->ep0_state) { in musb_g_ep0_queue()
946 dev_dbg(musb->controller, "ep0 request queued in state %d\n", in musb_g_ep0_queue()
947 musb->ep0_state); in musb_g_ep0_queue()
955 dev_dbg(musb->controller, "queue to %s (%s), length=%d\n", in musb_g_ep0_queue()
959 musb_ep_select(musb->mregs, 0); in musb_g_ep0_queue()
962 if (musb->ep0_state == MUSB_EP0_STAGE_TX) in musb_g_ep0_queue()
963 ep0_txstate(musb); in musb_g_ep0_queue()
966 else if (musb->ep0_state == MUSB_EP0_STAGE_ACKWAIT) { in musb_g_ep0_queue()
970 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in musb_g_ep0_queue()
972 musb->ackpend | MUSB_CSR0_P_DATAEND); in musb_g_ep0_queue()
973 musb->ackpend = 0; in musb_g_ep0_queue()
974 musb_g_ep0_giveback(ep->musb, r); in musb_g_ep0_queue()
981 } else if (musb->ackpend) { in musb_g_ep0_queue()
982 musb_writew(regs, MUSB_CSR0, musb->ackpend); in musb_g_ep0_queue()
983 musb->ackpend = 0; in musb_g_ep0_queue()
987 spin_unlock_irqrestore(&musb->lock, lockflags); in musb_g_ep0_queue()
1000 struct musb *musb; in musb_g_ep0_halt() local
1010 musb = ep->musb; in musb_g_ep0_halt()
1011 base = musb->mregs; in musb_g_ep0_halt()
1012 regs = musb->control_ep->regs; in musb_g_ep0_halt()
1015 spin_lock_irqsave(&musb->lock, flags); in musb_g_ep0_halt()
1023 csr = musb->ackpend; in musb_g_ep0_halt()
1025 switch (musb->ep0_state) { in musb_g_ep0_halt()
1044 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_halt()
1045 musb->ackpend = 0; in musb_g_ep0_halt()
1048 dev_dbg(musb->controller, "ep0 can't halt in state %d\n", musb->ep0_state); in musb_g_ep0_halt()
1053 spin_unlock_irqrestore(&musb->lock, flags); in musb_g_ep0_halt()