320 	u16			fifo_count = 0, csr;  in txstate()  local
339 	csr = musb_readw(epio, MUSB_TXCSR);  in txstate()
345 	if (csr & MUSB_TXCSR_TXPKTRDY) {  in txstate()
347 				musb_ep->end_point.name, csr);  in txstate()
351 	if (csr & MUSB_TXCSR_P_SENDSTALL) {  in txstate()
353 				musb_ep->end_point.name, csr);  in txstate()
359 			csr);  in txstate()
393 					csr &= ~(MUSB_TXCSR_AUTOSET  in txstate()
395 					musb_writew(epio, MUSB_TXCSR, csr  in txstate()
397 					csr &= ~MUSB_TXCSR_DMAMODE;  in txstate()
398 					csr |= (MUSB_TXCSR_DMAENAB |  in txstate()
402 					csr |= (MUSB_TXCSR_DMAENAB  in txstate()
406 						csr |= MUSB_TXCSR_AUTOSET;  in txstate()
408 				csr &= ~MUSB_TXCSR_P_UNDERRUN;  in txstate()
410 				musb_writew(epio, MUSB_TXCSR, csr);  in txstate()
416 		csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY);  in txstate()
417 		csr |= MUSB_TXCSR_DMAENAB | MUSB_TXCSR_DMAMODE |  in txstate()
421 				| csr);  in txstate()
424 		csr = musb_readw(epio, MUSB_TXCSR);  in txstate()
444 			csr &= ~MUSB_TXCSR_DMAENAB;  in txstate()
445 			musb_writew(epio, MUSB_TXCSR, csr);  in txstate()
468 		csr |= MUSB_TXCSR_TXPKTRDY;  in txstate()
469 		csr &= ~MUSB_TXCSR_P_UNDERRUN;  in txstate()
470 		musb_writew(epio, MUSB_TXCSR, csr);  in txstate()
488 	u16			csr;  in musb_g_tx()  local
500 	csr = musb_readw(epio, MUSB_TXCSR);  in musb_g_tx()
501 	dev_dbg(musb->controller, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr);  in musb_g_tx()
509 	if (csr & MUSB_TXCSR_P_SENTSTALL) {  in musb_g_tx()
510 		csr |=	MUSB_TXCSR_P_WZC_BITS;  in musb_g_tx()
511 		csr &= ~MUSB_TXCSR_P_SENTSTALL;  in musb_g_tx()
512 		musb_writew(epio, MUSB_TXCSR, csr);  in musb_g_tx()
516 	if (csr & MUSB_TXCSR_P_UNDERRUN) {  in musb_g_tx()
518 		csr |=	 MUSB_TXCSR_P_WZC_BITS;  in musb_g_tx()
519 		csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY);  in musb_g_tx()
520 		musb_writew(epio, MUSB_TXCSR, csr);  in musb_g_tx()
537 		if (dma && (csr & MUSB_TXCSR_DMAENAB)) {  in musb_g_tx()
539 			csr |= MUSB_TXCSR_P_WZC_BITS;  in musb_g_tx()
540 			csr &= ~(MUSB_TXCSR_DMAENAB | MUSB_TXCSR_P_UNDERRUN |  in musb_g_tx()
542 			musb_writew(epio, MUSB_TXCSR, csr);  in musb_g_tx()
544 			csr = musb_readw(epio, MUSB_TXCSR);  in musb_g_tx()
547 				epnum, csr, musb_ep->dma->actual_len, request);  in musb_g_tx()
567 			if (csr & MUSB_TXCSR_TXPKTRDY)  in musb_g_tx()
643 	u16			csr = musb_readw(epio, MUSB_RXCSR);  in rxstate()  local
667 	if (csr & MUSB_RXCSR_P_SENDSTALL) {  in rxstate()
669 		    musb_ep->end_point.name, csr);  in rxstate()
692 			csr &= ~(MUSB_RXCSR_AUTOCLEAR  in rxstate()
694 			csr |= MUSB_RXCSR_DMAENAB | MUSB_RXCSR_P_WZC_BITS;  in rxstate()
695 			musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
700 	if (csr & MUSB_RXCSR_RXPKTRDY) {  in rxstate()
747 					csr |= MUSB_RXCSR_AUTOCLEAR;  in rxstate()
748 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
749 					csr |= MUSB_RXCSR_DMAENAB;  in rxstate()
750 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
758 						csr | MUSB_RXCSR_DMAMODE);  in rxstate()
759 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
764 						csr |= MUSB_RXCSR_AUTOCLEAR;  in rxstate()
765 					csr |= MUSB_RXCSR_DMAENAB;  in rxstate()
766 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
816 				csr &= ~MUSB_RXCSR_DMAMODE;  in rxstate()
817 				csr |= (MUSB_RXCSR_DMAENAB |  in rxstate()
820 				musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
827 					csr |= MUSB_RXCSR_DMAMODE;  in rxstate()
828 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
878 				csr &= ~(MUSB_RXCSR_DMAENAB | MUSB_RXCSR_AUTOCLEAR);  in rxstate()
879 				musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
891 			csr |= MUSB_RXCSR_P_WZC_BITS;  in rxstate()
892 			csr &= ~MUSB_RXCSR_RXPKTRDY;  in rxstate()
893 			musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
907 	u16			csr;  in musb_g_rx()  local
929 	csr = musb_readw(epio, MUSB_RXCSR);  in musb_g_rx()
933 			csr, dma ? " (dma)" : "", request);  in musb_g_rx()
935 	if (csr & MUSB_RXCSR_P_SENTSTALL) {  in musb_g_rx()
936 		csr |= MUSB_RXCSR_P_WZC_BITS;  in musb_g_rx()
937 		csr &= ~MUSB_RXCSR_P_SENTSTALL;  in musb_g_rx()
938 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_g_rx()
942 	if (csr & MUSB_RXCSR_P_OVERRUN) {  in musb_g_rx()
944 		csr &= ~MUSB_RXCSR_P_OVERRUN;  in musb_g_rx()
945 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_g_rx()
951 	if (csr & MUSB_RXCSR_INCOMPRX) {  in musb_g_rx()
959 			musb_ep->end_point.name, csr);  in musb_g_rx()
963 	if (dma && (csr & MUSB_RXCSR_DMAENAB)) {  in musb_g_rx()
964 		csr &= ~(MUSB_RXCSR_AUTOCLEAR  in musb_g_rx()
968 			MUSB_RXCSR_P_WZC_BITS | csr);  in musb_g_rx()
973 			epnum, csr,  in musb_g_rx()
984 			csr &= ~MUSB_RXCSR_RXPKTRDY;  in musb_g_rx()
985 			musb_writew(epio, MUSB_RXCSR, csr);  in musb_g_rx()
995 			csr = musb_readw(epio, MUSB_RXCSR);  in musb_g_rx()
996 			if ((csr & MUSB_RXCSR_RXPKTRDY) &&  in musb_g_rx()
1037 	u16		csr;  in musb_gadget_enable()  local
1117 		csr = MUSB_TXCSR_MODE | MUSB_TXCSR_CLRDATATOG;  in musb_gadget_enable()
1120 			csr |= MUSB_TXCSR_FLUSHFIFO;  in musb_gadget_enable()
1122 			csr |= MUSB_TXCSR_P_ISO;  in musb_gadget_enable()
1125 		musb_writew(regs, MUSB_TXCSR, csr);  in musb_gadget_enable()
1127 		musb_writew(regs, MUSB_TXCSR, csr);  in musb_gadget_enable()
1159 			csr = musb_readw(regs, MUSB_TXCSR);  in musb_gadget_enable()
1160 			csr &= ~(MUSB_TXCSR_MODE | MUSB_TXCSR_TXPKTRDY);  in musb_gadget_enable()
1161 			musb_writew(regs, MUSB_TXCSR, csr);  in musb_gadget_enable()
1164 		csr = MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_CLRDATATOG;  in musb_gadget_enable()
1166 			csr |= MUSB_RXCSR_P_ISO;  in musb_gadget_enable()
1168 			csr |= MUSB_RXCSR_DISNYET;  in musb_gadget_enable()
1171 		musb_writew(regs, MUSB_RXCSR, csr);  in musb_gadget_enable()
1172 		musb_writew(regs, MUSB_RXCSR, csr);  in musb_gadget_enable()
1436 	u16			csr;  in musb_gadget_set_halt()  local
1463 			csr = musb_readw(epio, MUSB_TXCSR);  in musb_gadget_set_halt()
1464 			if (csr & MUSB_TXCSR_FIFONOTEMPTY) {  in musb_gadget_set_halt()
1476 		csr = musb_readw(epio, MUSB_TXCSR);  in musb_gadget_set_halt()
1477 		csr |= MUSB_TXCSR_P_WZC_BITS  in musb_gadget_set_halt()
1480 			csr |= MUSB_TXCSR_P_SENDSTALL;  in musb_gadget_set_halt()
1482 			csr &= ~(MUSB_TXCSR_P_SENDSTALL  in musb_gadget_set_halt()
1484 		csr &= ~MUSB_TXCSR_TXPKTRDY;  in musb_gadget_set_halt()
1485 		musb_writew(epio, MUSB_TXCSR, csr);  in musb_gadget_set_halt()
1487 		csr = musb_readw(epio, MUSB_RXCSR);  in musb_gadget_set_halt()
1488 		csr |= MUSB_RXCSR_P_WZC_BITS  in musb_gadget_set_halt()
1492 			csr |= MUSB_RXCSR_P_SENDSTALL;  in musb_gadget_set_halt()
1494 			csr &= ~(MUSB_RXCSR_P_SENDSTALL  in musb_gadget_set_halt()
1496 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_gadget_set_halt()
1558 	u16		csr, int_txe;  in musb_gadget_fifo_flush()  local
1570 		csr = musb_readw(epio, MUSB_TXCSR);  in musb_gadget_fifo_flush()
1571 		if (csr & MUSB_TXCSR_FIFONOTEMPTY) {  in musb_gadget_fifo_flush()
1572 			csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_P_WZC_BITS;  in musb_gadget_fifo_flush()
1578 			csr &= ~MUSB_TXCSR_TXPKTRDY;  in musb_gadget_fifo_flush()
1579 			musb_writew(epio, MUSB_TXCSR, csr);  in musb_gadget_fifo_flush()
1581 			musb_writew(epio, MUSB_TXCSR, csr);  in musb_gadget_fifo_flush()
1584 		csr = musb_readw(epio, MUSB_RXCSR);  in musb_gadget_fifo_flush()
1585 		csr |= MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_P_WZC_BITS;  in musb_gadget_fifo_flush()
1586 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_gadget_fifo_flush()
1587 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_gadget_fifo_flush()