usb/host/ohci-lpc32xx.c

4  * @Descr: USB driver - Embedded Artists LPC3250 OEM Board support functions
8  * SPDX-License-Identifier:	GPL-2.0+
22 /* OTG I2C controller module register structures */
24 	u32 otg_i2c_txrx;   /* OTG I2C Tx/Rx Data FIFO */
25 	u32 otg_i2c_stat;   /* OTG I2C Status Register */
26 	u32 otg_i2c_ctrl;   /* OTG I2C Control Register */
27 	u32 otg_i2c_clk_hi; /* OTG I2C Clock Divider high */
28 	u32 otg_i2c_clk_lo; /* OTG I2C Clock Divider low */
31 /* OTG controller module register structures */
34 	u32 otg_int_sts;    /* OTG int status register */
35 	u32 otg_int_enab;   /* OTG int enable register */
36 	u32 otg_int_set;    /* OTG int set register */
37 	u32 otg_int_clr;    /* OTG int clear register */
38 	u32 otg_sts_ctrl;   /* OTG status/control register */
39 	u32 otg_timer;      /* OTG timer register */
43 	u32 otg_clk_ctrl;   /* OTG clock control reg */
44 	u32 otg_clk_sts;    /* OTG clock status reg */
52 #define OTG_CLK_OTG_EN			(1 << 3) /* Enable OTG clock */
83 static struct otg_regs *otg = (struct otg_regs *)USB_BASE;  variable
126 	setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_USBDVND_EN);  in isp1301_configure()
134 	clrbits_le32(&clk_pwr->usb_ctrl,  in usbpll_setup()
138 	setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_CLK_EN1);  in usbpll_setup()
141 	setbits_le32(&clk_pwr->usb_ctrl,  in usbpll_setup()
142 		     CLK_USBCTRL_FDBK_PLUS1(192 - 1));  in usbpll_setup()
143 	setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_POSTDIV_2POW(0x01));  in usbpll_setup()
144 	setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_PWRUP);  in usbpll_setup()
146 	ret = wait_for_bit_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_STS,  in usbpll_setup()
152 	setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_CLK_EN2);  in usbpll_setup()
165 		debug("%s: No bus %d\n", __func__, I2C_2);  in usb_cpu_init()
171 	 * USB pins routing setup is done by "lpc32xx_usb_init()" and should  in usb_cpu_init()
176 	setbits_le32(&clk_pwr->usb_ctrl,  in usb_cpu_init()
180 	writel(OTG_CLK_I2C_EN, &otg->otg_clk_ctrl);  in usb_cpu_init()
181 	ret = wait_for_bit_le32(&otg->otg_clk_sts, OTG_CLK_I2C_EN, true,  in usb_cpu_init()
195 	setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_USBHSTND_EN);  in usb_cpu_init()
200 	writel(mask, &otg->otg_clk_ctrl);  in usb_cpu_init()
202 	ret = wait_for_bit_le32(&otg->otg_clk_sts, mask, true,  in usb_cpu_init()
207 	setbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN);  in usb_cpu_init()
221 		debug("%s: No bus %d\n", __func__, I2C_2);  in usb_cpu_stop()
229 	clrbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN);  in usb_cpu_stop()
231 	clrbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_HCLK_EN);  in usb_cpu_stop()