Lines Matching full:otg
22 /* OTG I2C controller module register structures */
24 u32 otg_i2c_txrx; /* OTG I2C Tx/Rx Data FIFO */
25 u32 otg_i2c_stat; /* OTG I2C Status Register */
26 u32 otg_i2c_ctrl; /* OTG I2C Control Register */
27 u32 otg_i2c_clk_hi; /* OTG I2C Clock Divider high */
28 u32 otg_i2c_clk_lo; /* OTG I2C Clock Divider low */
31 /* OTG controller module register structures */
34 u32 otg_int_sts; /* OTG int status register */
35 u32 otg_int_enab; /* OTG int enable register */
36 u32 otg_int_set; /* OTG int set register */
37 u32 otg_int_clr; /* OTG int clear register */
38 u32 otg_sts_ctrl; /* OTG status/control register */
39 u32 otg_timer; /* OTG timer register */
43 u32 otg_clk_ctrl; /* OTG clock control reg */
44 u32 otg_clk_sts; /* OTG clock status reg */
52 #define OTG_CLK_OTG_EN (1 << 3) /* Enable OTG clock */
83 static struct otg_regs *otg = (struct otg_regs *)USB_BASE; variable
180 writel(OTG_CLK_I2C_EN, &otg->otg_clk_ctrl); in usb_cpu_init()
181 ret = wait_for_bit_le32(&otg->otg_clk_sts, OTG_CLK_I2C_EN, true, in usb_cpu_init()
200 writel(mask, &otg->otg_clk_ctrl); in usb_cpu_init()
202 ret = wait_for_bit_le32(&otg->otg_clk_sts, mask, true, in usb_cpu_init()
207 setbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN); in usb_cpu_init()
229 clrbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN); in usb_cpu_stop()