230 	struct usb_ctlr *usbctlr;  in tegra_ehci_set_usbmode()  local
233 	usbctlr = config->reg;  in tegra_ehci_set_usbmode()
235 	tmp = ehci_readl(&usbctlr->usb_mode);  in tegra_ehci_set_usbmode()
237 	ehci_writel(&usbctlr->usb_mode, tmp);  in tegra_ehci_set_usbmode()
283 				  struct usb_ctlr *usbctlr)  in usbf_reset_controller()  argument
293 		setbits_le32(&usbctlr->usb1_legacy_ctrl, USB1_NO_LEGACY_MODE);  in usbf_reset_controller()
296 	setbits_le32(&usbctlr->susp_ctrl, UTMIP_RESET);  in usbf_reset_controller()
300 		setbits_le32(&usbctlr->susp_ctrl, UTMIP_PHY_ENB);  in usbf_reset_controller()
317 	struct usb_ctlr *usbctlr = config->reg;  in init_phy_mux()  local
321 		clrsetbits_le32(&usbctlr->port_sc1, PTS1_MASK,  in init_phy_mux()
323 		clrbits_le32(&usbctlr->port_sc1, STS1);  in init_phy_mux()
325 		clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK,  in init_phy_mux()
327 		clrbits_le32(&usbctlr->port_sc1, STS);  in init_phy_mux()
331 	clrsetbits_le32(&usbctlr->usb_mode, USBMODE_CM_HC,  in init_phy_mux()
340 	clrsetbits_le32(&usbctlr->hostpc1_devlc, PTS_MASK,  in init_phy_mux()
342 	clrbits_le32(&usbctlr->hostpc1_devlc, STS);  in init_phy_mux()
354 	struct usb_ctlr *usbctlr = config->reg;  in init_utmi_usb_controller()  local
361 	usbf_reset_controller(config, usbctlr);  in init_utmi_usb_controller()
364 	clrbits_le32(&usbctlr->utmip_misc_cfg1, UTMIP_PHY_XTAL_CLOCKEN);  in init_utmi_usb_controller()
370 	clrsetbits_le32(&usbctlr->phy_vbus_sensors, b_sess_valid_mask,  in init_utmi_usb_controller()
379 		clrsetbits_le32(&usbctlr->usb1_legacy_ctrl,  in init_utmi_usb_controller()
393 		val = readl(&usbctlr->utmip_misc_cfg1);  in init_utmi_usb_controller()
400 		writel(val, &usbctlr->utmip_misc_cfg1);  in init_utmi_usb_controller()
403 		val = readl(&usbctlr->utmip_pll_cfg1);  in init_utmi_usb_controller()
410 		writel(val, &usbctlr->utmip_pll_cfg1);  in init_utmi_usb_controller()
439 		val = readl(&usbctlr->utmip_xcvr_cfg0);  in init_utmi_usb_controller()
446 		writel(val, &usbctlr->utmip_xcvr_cfg0);  in init_utmi_usb_controller()
447 		clrsetbits_le32(&usbctlr->utmip_xcvr_cfg1,  in init_utmi_usb_controller()
468 		clrbits_le32(&usbctlr->utmip_misc_cfg0,  in init_utmi_usb_controller()
473 	clrsetbits_le32(&usbctlr->utmip_bias_cfg1,  in init_utmi_usb_controller()
478 	clrsetbits_le32(&usbctlr->utmip_debounce_cfg0,  in init_utmi_usb_controller()
483 		clrsetbits_le32(&usbctlr->utmip_debounce_cfg0,  in init_utmi_usb_controller()
487 		clrsetbits_le32(&usbctlr->utmip_bias_cfg1,  in init_utmi_usb_controller()
492 	setbits_le32(&usbctlr->utmip_tx_cfg0, UTMIP_FS_PREAMBLE_J);  in init_utmi_usb_controller()
495 	setbits_le32(&usbctlr->utmip_bat_chrg_cfg0, UTMIP_PD_CHRG);  in init_utmi_usb_controller()
497 	clrbits_le32(&usbctlr->utmip_xcvr_cfg0, UTMIP_XCVR_LSBIAS_SE);  in init_utmi_usb_controller()
498 	setbits_le32(&usbctlr->utmip_spare_cfg0, FUSE_SETUP_SEL);  in init_utmi_usb_controller()
510 	val = readl(&usbctlr->utmip_hsrx_cfg0);  in init_utmi_usb_controller()
515 	writel(val, &usbctlr->utmip_hsrx_cfg0);  in init_utmi_usb_controller()
518 	clrsetbits_le32(&usbctlr->utmip_hsrx_cfg1,  in init_utmi_usb_controller()
526 	setbits_le32(&usbctlr->utmip_misc_cfg1, UTMIP_PHY_XTAL_CLOCKEN);  in init_utmi_usb_controller()
542 	clrbits_le32(&usbctlr->susp_ctrl, UTMIP_RESET);  in init_utmi_usb_controller()
546 		if (readl(&usbctlr->susp_ctrl) & USB_PHY_CLK_VALID)  in init_utmi_usb_controller()
554 	clrbits_le32(&usbctlr->icusb_ctrl, IC_ENB1);  in init_utmi_usb_controller()
560 	clrbits_le32(&usbctlr->utmip_xcvr_cfg0, UTMIP_FORCE_PD_POWERDOWN |  in init_utmi_usb_controller()
562 	clrbits_le32(&usbctlr->utmip_xcvr_cfg1, UTMIP_FORCE_PDDISC_POWERDOWN |  in init_utmi_usb_controller()
593 	struct usb_ctlr *usbctlr = config->reg;  in init_ulpi_usb_controller()  local
618 	usbf_reset_controller(config, usbctlr);  in init_ulpi_usb_controller()
621 	setbits_le32(&usbctlr->ulpi_timing_ctrl_0,  in init_ulpi_usb_controller()
628 	setbits_le32(&usbctlr->susp_ctrl, ULPI_PHY_ENB);  in init_ulpi_usb_controller()
632 	writel(val, &usbctlr->ulpi_timing_ctrl_1);  in init_ulpi_usb_controller()
637 	writel(val, &usbctlr->ulpi_timing_ctrl_1);  in init_ulpi_usb_controller()
643 	writel(val, &usbctlr->ulpi_timing_ctrl_1);  in init_ulpi_usb_controller()
647 	ulpi_vp.viewport_addr = (u32)&usbctlr->ulpi_viewport;  in init_ulpi_usb_controller()
659 	setbits_le32(&usbctlr->port_sc1, WKCN | WKDS | WKOC);  in init_ulpi_usb_controller()
662 	setbits_le32(&usbctlr->susp_ctrl, USB_SUSP_CLR);  in init_ulpi_usb_controller()
664 		if (readl(&usbctlr->susp_ctrl) & USB_PHY_CLK_VALID)  in init_ulpi_usb_controller()
670 	clrbits_le32(&usbctlr->susp_ctrl, USB_SUSP_CLR);  in init_ulpi_usb_controller()
797 	struct usb_ctlr *usbctlr;  in usb_common_uninit()  local
799 	usbctlr = priv->reg;  in usb_common_uninit()
802 	writel(0, &usbctlr->usb_cmd);  in usb_common_uninit()
806 	writel(2, &usbctlr->usb_cmd);  in usb_common_uninit()