187 		debug("udccs%d = %02x\n", i, *dev->ep->reg_udccs);  in dump_state()
506 		writel(UDCCS_BI_TPC, ep->reg_udccs);  in write_fifo()
508 			writel(UDCCS_BI_TSP, ep->reg_udccs);  in write_fifo()
524 	} while (readl(ep->reg_udccs) & UDCCS_BI_TFS);  in write_fifo()
617 		udccs = readl(ep->reg_udccs);  in read_fifo()
653 		writel(UDCCS_BO_RPC, ep->reg_udccs);  in read_fifo()
816 			if ((readl(ep->reg_udccs) & UDCCS_BI_TFS) != 0  in pxa25x_ep_queue()
819 		} else if ((readl(ep->reg_udccs) & UDCCS_BO_RFS) != 0  in pxa25x_ep_queue()
913 			&& ((readl(ep->reg_udccs) & UDCCS_BI_TFS) == 0  in pxa25x_ep_set_halt()
920 	writel(UDCCS_BI_FST|UDCCS_BI_FTF, ep->reg_udccs);  in pxa25x_ep_set_halt()
932 			if (readl(ep->reg_udccs) & UDCCS_BI_SST)  in pxa25x_ep_set_halt()
956 			|| (readl(ep->reg_udccs) & UDCCS_BO_RFS) == 0)  in pxa25x_ep_fifo_status()
976 		while (((readl(ep->reg_udccs)) & UDCCS_BO_RNE) != 0)  in pxa25x_ep_fifo_flush()
984 			? 0 : UDCCS_BI_SST), ep->reg_udccs);  in pxa25x_ep_fifo_flush()
1478 		udccs = readl(ep->reg_udccs);  in handle_ep()
1485 				writel(tmp, ep->reg_udccs);  in handle_ep()
1496 				writel(tmp, ep->reg_udccs);  in handle_ep()
1647 		.reg_udccs	= &UDC_REGS->udccs[0],
1662 		.reg_udccs	= &UDC_REGS->udccs[1],
1675 		.reg_udccs	= &UDC_REGS->udccs[2],
1690 		.reg_udccs	= &UDC_REGS->udccs[3],
1703 		.reg_udccs	= &UDC_REGS->udccs[4],
1717 		.reg_udccs	= &UDC_REGS->udccs[5],
1732 		.reg_udccs	= &UDC_REGS->udccs[6],
1745 		.reg_udccs	= &UDC_REGS->udccs[7],
1759 		.reg_udccs	= &UDC_REGS->udccs[8],
1772 		.reg_udccs	= &UDC_REGS->udccs[9],
1786 		.reg_udccs	= &UDC_REGS->udccs[10],
1801 		.reg_udccs	= &UDC_REGS->udccs[11],
1814 		.reg_udccs	= &UDC_REGS->udccs[12],
1828 		.reg_udccs	= &UDC_REGS->udccs[13],
1841 		.reg_udccs	= &UDC_REGS->udccs[14],
1855 		.reg_udccs	= &UDC_REGS->udccs[15],