Lines Matching +full:0 +full:x000001ff
11 #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
12 #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
13 #define USB_VENDOR_REQUEST_GET_STATS 0xA2
17 #define TX_CMD_A_LEN_MASK 0x000FFFFF
21 #define RX_CMD_A_LEN_MASK 0x00003FFF
24 #define ID_REV 0x00
25 #define ID_REV_CHIP_ID_MASK 0xFFFF0000
26 #define ID_REV_CHIP_ID_7500 0x7500
27 #define ID_REV_CHIP_ID_7800 0x7800
28 #define ID_REV_CHIP_ID_7850 0x7850
30 #define INT_STS 0x0C
32 #define HW_CFG 0x010
35 #define PMT_CTL 0x014
40 #define E2P_CMD 0x040
42 #define E2P_CMD_EPC_CMD_READ 0x00000000
44 #define E2P_CMD_EPC_ADDR_MASK 0x000001FF
46 #define E2P_DATA 0x044
55 #define MAC_CR 0x100
60 #define MAC_RX 0x104
62 #define MAC_RX_RXEN BIT(0)
64 #define MAC_TX 0x108
65 #define MAC_TX_TXEN BIT(0)
67 #define FLOW 0x10C
71 #define RX_ADDRH 0x118
72 #define RX_ADDRL 0x11C
74 #define MII_ACC 0x120
75 #define MII_ACC_MII_READ 0x00000000
76 #define MII_ACC_MII_WRITE 0x00000002
77 #define MII_ACC_MII_BUSY BIT(0)
79 #define MII_DATA 0x124
87 #define DEFAULT_BULK_IN_DELAY 0x0800
89 #define EEPROM_INDICATOR 0xA5
90 #define EEPROM_MAC_OFFSET 0x01
133 unsigned long start = get_timer(0); in lan7x_wait_for_bit()
142 return 0; in lan7x_wait_for_bit()
156 debug("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg, in lan7x_wait_for_bit()
175 unsigned long start = get_timer(0); in lan7x_mdio_wait_for_bit()
184 return 0; in lan7x_mdio_wait_for_bit()
198 debug("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg, in lan7x_mdio_wait_for_bit()