Lines Matching refs:hba
58 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba);
59 static inline void ufshcd_hba_stop(struct ufs_hba *hba);
60 static int ufshcd_hba_enable(struct ufs_hba *hba);
65 static int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, in ufshcd_wait_for_register() argument
74 while ((ufshcd_readl(hba, reg) & mask) != val) { in ufshcd_wait_for_register()
76 if ((ufshcd_readl(hba, reg) & mask) != val) in ufshcd_wait_for_register()
89 static void ufshcd_init_pwr_info(struct ufs_hba *hba) in ufshcd_init_pwr_info() argument
91 hba->pwr_info.gear_rx = UFS_PWM_G1; in ufshcd_init_pwr_info()
92 hba->pwr_info.gear_tx = UFS_PWM_G1; in ufshcd_init_pwr_info()
93 hba->pwr_info.lane_rx = 1; in ufshcd_init_pwr_info()
94 hba->pwr_info.lane_tx = 1; in ufshcd_init_pwr_info()
95 hba->pwr_info.pwr_rx = SLOWAUTO_MODE; in ufshcd_init_pwr_info()
96 hba->pwr_info.pwr_tx = SLOWAUTO_MODE; in ufshcd_init_pwr_info()
97 hba->pwr_info.hs_rate = 0; in ufshcd_init_pwr_info()
104 static void ufshcd_print_pwr_info(struct ufs_hba *hba) in ufshcd_print_pwr_info() argument
116 dev_err(hba->dev, "[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n", in ufshcd_print_pwr_info()
117 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx, in ufshcd_print_pwr_info()
118 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx, in ufshcd_print_pwr_info()
119 names[hba->pwr_info.pwr_rx], in ufshcd_print_pwr_info()
120 names[hba->pwr_info.pwr_tx], in ufshcd_print_pwr_info()
121 hba->pwr_info.hs_rate); in ufshcd_print_pwr_info()
128 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba) in ufshcd_ready_for_uic_cmd() argument
130 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY) in ufshcd_ready_for_uic_cmd()
139 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba) in ufshcd_get_uic_cmd_result() argument
141 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) & in ufshcd_get_uic_cmd_result()
148 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba) in ufshcd_get_dme_attr_val() argument
150 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3); in ufshcd_get_dme_attr_val()
157 static inline bool ufshcd_is_device_present(struct ufs_hba *hba) in ufshcd_is_device_present() argument
159 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & in ufshcd_is_device_present()
167 static int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd) in ufshcd_send_uic_cmd() argument
173 if (!ufshcd_ready_for_uic_cmd(hba)) { in ufshcd_send_uic_cmd()
174 dev_err(hba->dev, in ufshcd_send_uic_cmd()
182 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1); in ufshcd_send_uic_cmd()
183 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2); in ufshcd_send_uic_cmd()
184 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3); in ufshcd_send_uic_cmd()
187 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK, in ufshcd_send_uic_cmd()
192 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS); in ufshcd_send_uic_cmd()
193 enabled_intr_status = intr_status & hba->intr_mask; in ufshcd_send_uic_cmd()
194 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS); in ufshcd_send_uic_cmd()
197 dev_err(hba->dev, in ufshcd_send_uic_cmd()
204 dev_err(hba->dev, "Error in status:%08x\n", in ufshcd_send_uic_cmd()
211 uic_cmd->argument2 = ufshcd_get_uic_cmd_result(hba); in ufshcd_send_uic_cmd()
212 uic_cmd->argument3 = ufshcd_get_dme_attr_val(hba); in ufshcd_send_uic_cmd()
223 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel, u8 attr_set, in ufshcd_dme_set_attr() argument
243 ret = ufshcd_send_uic_cmd(hba, &uic_cmd); in ufshcd_dme_set_attr()
245 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n", in ufshcd_dme_set_attr()
250 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n", in ufshcd_dme_set_attr()
261 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel, in ufshcd_dme_get_attr() argument
279 ret = ufshcd_send_uic_cmd(hba, &uic_cmd); in ufshcd_dme_get_attr()
281 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n", in ufshcd_dme_get_attr()
286 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n", in ufshcd_dme_get_attr()
296 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer) in ufshcd_disable_tx_lcc() argument
301 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), in ufshcd_disable_tx_lcc()
304 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), in ufshcd_disable_tx_lcc()
308 err = ufshcd_dme_set(hba, in ufshcd_disable_tx_lcc()
313 err = ufshcd_dme_peer_set(hba, in ufshcd_disable_tx_lcc()
318 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d", in ufshcd_disable_tx_lcc()
327 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba) in ufshcd_disable_device_tx_lcc() argument
329 return ufshcd_disable_tx_lcc(hba, true); in ufshcd_disable_device_tx_lcc()
336 static int ufshcd_dme_link_startup(struct ufs_hba *hba) in ufshcd_dme_link_startup() argument
343 ret = ufshcd_send_uic_cmd(hba, &uic_cmd); in ufshcd_dme_link_startup()
345 dev_dbg(hba->dev, in ufshcd_dme_link_startup()
354 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba) in ufshcd_disable_intr_aggr() argument
356 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL); in ufshcd_disable_intr_aggr()
372 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba) in ufshcd_enable_run_stop_reg() argument
374 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT, in ufshcd_enable_run_stop_reg()
376 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT, in ufshcd_enable_run_stop_reg()
383 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs) in ufshcd_enable_intr() argument
385 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE); in ufshcd_enable_intr()
388 if (hba->version == UFSHCI_VERSION_10) { in ufshcd_enable_intr()
395 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE); in ufshcd_enable_intr()
397 hba->intr_mask = set; in ufshcd_enable_intr()
410 static int ufshcd_make_hba_operational(struct ufs_hba *hba) in ufshcd_make_hba_operational() argument
416 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS); in ufshcd_make_hba_operational()
419 ufshcd_disable_intr_aggr(hba); in ufshcd_make_hba_operational()
422 ufshcd_writel(hba, lower_32_bits((dma_addr_t)hba->utrdl), in ufshcd_make_hba_operational()
424 ufshcd_writel(hba, upper_32_bits((dma_addr_t)hba->utrdl), in ufshcd_make_hba_operational()
426 ufshcd_writel(hba, lower_32_bits((dma_addr_t)hba->utmrdl), in ufshcd_make_hba_operational()
428 ufshcd_writel(hba, upper_32_bits((dma_addr_t)hba->utmrdl), in ufshcd_make_hba_operational()
434 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS); in ufshcd_make_hba_operational()
436 ufshcd_enable_run_stop_reg(hba); in ufshcd_make_hba_operational()
438 dev_err(hba->dev, in ufshcd_make_hba_operational()
451 static int ufshcd_link_startup(struct ufs_hba *hba) in ufshcd_link_startup() argument
459 ufshcd_ops_link_startup_notify(hba, PRE_CHANGE); in ufshcd_link_startup()
461 ret = ufshcd_dme_link_startup(hba); in ufshcd_link_startup()
464 if (!ret && !ufshcd_is_device_present(hba)) { in ufshcd_link_startup()
465 dev_err(hba->dev, "%s: Device not present\n", __func__); in ufshcd_link_startup()
475 if (ret && ufshcd_hba_enable(hba)) in ufshcd_link_startup()
490 ufshcd_init_pwr_info(hba); in ufshcd_link_startup()
492 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) { in ufshcd_link_startup()
493 ret = ufshcd_disable_device_tx_lcc(hba); in ufshcd_link_startup()
499 ret = ufshcd_ops_link_startup_notify(hba, POST_CHANGE); in ufshcd_link_startup()
503 ret = ufshcd_make_hba_operational(hba); in ufshcd_link_startup()
506 dev_err(hba->dev, "link startup failed %d\n", ret); in ufshcd_link_startup()
514 static inline void ufshcd_hba_stop(struct ufs_hba *hba) in ufshcd_hba_stop() argument
518 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE); in ufshcd_hba_stop()
519 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE, in ufshcd_hba_stop()
523 dev_err(hba->dev, "%s: Controller disable failed\n", __func__); in ufshcd_hba_stop()
529 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba) in ufshcd_is_hba_active() argument
531 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE) in ufshcd_is_hba_active()
538 static inline void ufshcd_hba_start(struct ufs_hba *hba) in ufshcd_hba_start() argument
540 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE); in ufshcd_hba_start()
546 static int ufshcd_hba_enable(struct ufs_hba *hba) in ufshcd_hba_enable() argument
550 if (!ufshcd_is_hba_active(hba)) in ufshcd_hba_enable()
552 ufshcd_hba_stop(hba); in ufshcd_hba_enable()
554 ufshcd_ops_hce_enable_notify(hba, PRE_CHANGE); in ufshcd_hba_enable()
557 ufshcd_hba_start(hba); in ufshcd_hba_enable()
573 while (ufshcd_is_hba_active(hba)) { in ufshcd_hba_enable()
577 dev_err(hba->dev, "Controller enable failed\n"); in ufshcd_hba_enable()
584 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK); in ufshcd_hba_enable()
586 ufshcd_ops_hce_enable_notify(hba, POST_CHANGE); in ufshcd_hba_enable()
595 static void ufshcd_host_memory_configure(struct ufs_hba *hba) in ufshcd_host_memory_configure() argument
602 utrdlp = hba->utrdl; in ufshcd_host_memory_configure()
603 cmd_desc_dma_addr = (dma_addr_t)hba->ucdl; in ufshcd_host_memory_configure()
617 hba->ucd_req_ptr = (struct utp_upiu_req *)hba->ucdl; in ufshcd_host_memory_configure()
618 hba->ucd_rsp_ptr = in ufshcd_host_memory_configure()
619 (struct utp_upiu_rsp *)&hba->ucdl->response_upiu; in ufshcd_host_memory_configure()
620 hba->ucd_prdt_ptr = in ufshcd_host_memory_configure()
621 (struct ufshcd_sg_entry *)&hba->ucdl->prd_table; in ufshcd_host_memory_configure()
627 static int ufshcd_memory_alloc(struct ufs_hba *hba) in ufshcd_memory_alloc() argument
632 hba->utrdl = memalign(1024, sizeof(struct utp_transfer_req_desc)); in ufshcd_memory_alloc()
633 if (!hba->utrdl) { in ufshcd_memory_alloc()
634 dev_err(hba->dev, "Transfer Descriptor memory allocation failed\n"); in ufshcd_memory_alloc()
641 hba->ucdl = memalign(1024, sizeof(struct utp_transfer_cmd_desc)); in ufshcd_memory_alloc()
642 if (!hba->ucdl) { in ufshcd_memory_alloc()
643 dev_err(hba->dev, "Command descriptor memory allocation failed\n"); in ufshcd_memory_alloc()
653 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba) in ufshcd_get_intr_mask() argument
657 switch (hba->version) { in ufshcd_get_intr_mask()
677 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba) in ufshcd_get_ufs_version() argument
679 return ufshcd_readl(hba, REG_UFS_VERSION); in ufshcd_get_ufs_version()
685 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba) in ufshcd_get_upmcrs() argument
687 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7; in ufshcd_get_upmcrs()
734 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba, in ufshcd_prepare_utp_query_req_upiu() argument
737 struct utp_upiu_req *ucd_req_ptr = hba->ucd_req_ptr; in ufshcd_prepare_utp_query_req_upiu()
738 struct ufs_query *query = &hba->dev_cmd.query; in ufshcd_prepare_utp_query_req_upiu()
763 memset(hba->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); in ufshcd_prepare_utp_query_req_upiu()
766 static inline void ufshcd_prepare_utp_nop_upiu(struct ufs_hba *hba) in ufshcd_prepare_utp_nop_upiu() argument
768 struct utp_upiu_req *ucd_req_ptr = hba->ucd_req_ptr; in ufshcd_prepare_utp_nop_upiu()
779 memset(hba->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); in ufshcd_prepare_utp_nop_upiu()
786 static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, in ufshcd_comp_devman_upiu() argument
791 struct utp_transfer_req_desc *req_desc = hba->utrdl; in ufshcd_comp_devman_upiu()
793 hba->dev_cmd.type = cmd_type; in ufshcd_comp_devman_upiu()
798 ufshcd_prepare_utp_query_req_upiu(hba, upiu_flags); in ufshcd_comp_devman_upiu()
801 ufshcd_prepare_utp_nop_upiu(hba); in ufshcd_comp_devman_upiu()
810 static int ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag) in ufshcd_send_command() argument
816 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL); in ufshcd_send_command()
820 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS); in ufshcd_send_command()
821 enabled_intr_status = intr_status & hba->intr_mask; in ufshcd_send_command()
822 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS); in ufshcd_send_command()
825 dev_err(hba->dev, in ufshcd_send_command()
832 dev_err(hba->dev, "Error in status:%08x\n", in ufshcd_send_command()
854 static inline int ufshcd_get_tr_ocs(struct ufs_hba *hba) in ufshcd_get_tr_ocs() argument
856 return le32_to_cpu(hba->utrdl->header.dword_2) & MASK_OCS; in ufshcd_get_tr_ocs()
864 static int ufshcd_check_query_response(struct ufs_hba *hba) in ufshcd_check_query_response() argument
866 struct ufs_query_res *query_res = &hba->dev_cmd.query.response; in ufshcd_check_query_response()
869 query_res->response = ufshcd_get_rsp_upiu_result(hba->ucd_rsp_ptr) >> in ufshcd_check_query_response()
878 static int ufshcd_copy_query_response(struct ufs_hba *hba) in ufshcd_copy_query_response() argument
880 struct ufs_query_res *query_res = &hba->dev_cmd.query.response; in ufshcd_copy_query_response()
882 memcpy(&query_res->upiu_res, &hba->ucd_rsp_ptr->qr, QUERY_OSF_SIZE); in ufshcd_copy_query_response()
885 if (hba->dev_cmd.query.descriptor && in ufshcd_copy_query_response()
886 hba->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) { in ufshcd_copy_query_response()
887 u8 *descp = (u8 *)hba->ucd_rsp_ptr + in ufshcd_copy_query_response()
893 resp_len = be32_to_cpu(hba->ucd_rsp_ptr->header.dword_2) & in ufshcd_copy_query_response()
896 be16_to_cpu(hba->dev_cmd.query.request.upiu_req.length); in ufshcd_copy_query_response()
898 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len); in ufshcd_copy_query_response()
900 dev_warn(hba->dev, in ufshcd_copy_query_response()
913 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba, enum dev_cmd_type cmd_type, in ufshcd_exec_dev_cmd() argument
919 err = ufshcd_comp_devman_upiu(hba, cmd_type); in ufshcd_exec_dev_cmd()
923 err = ufshcd_send_command(hba, TASK_TAG); in ufshcd_exec_dev_cmd()
927 err = ufshcd_get_tr_ocs(hba); in ufshcd_exec_dev_cmd()
929 dev_err(hba->dev, "Error in OCS:%d\n", err); in ufshcd_exec_dev_cmd()
933 resp = ufshcd_get_req_rsp(hba->ucd_rsp_ptr); in ufshcd_exec_dev_cmd()
938 err = ufshcd_check_query_response(hba); in ufshcd_exec_dev_cmd()
940 err = ufshcd_copy_query_response(hba); in ufshcd_exec_dev_cmd()
945 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n", in ufshcd_exec_dev_cmd()
950 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n", in ufshcd_exec_dev_cmd()
960 static inline void ufshcd_init_query(struct ufs_hba *hba, in ufshcd_init_query() argument
966 *request = &hba->dev_cmd.query.request; in ufshcd_init_query()
967 *response = &hba->dev_cmd.query.response; in ufshcd_init_query()
979 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode, in ufshcd_query_flag() argument
987 ufshcd_init_query(hba, &request, &response, opcode, idn, index, in ufshcd_query_flag()
1000 dev_err(hba->dev, "%s: Invalid argument for read request\n", in ufshcd_query_flag()
1007 dev_err(hba->dev, in ufshcd_query_flag()
1014 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout); in ufshcd_query_flag()
1017 dev_err(hba->dev, in ufshcd_query_flag()
1031 static int ufshcd_query_flag_retry(struct ufs_hba *hba, in ufshcd_query_flag_retry() argument
1039 ret = ufshcd_query_flag(hba, opcode, idn, flag_res); in ufshcd_query_flag_retry()
1041 dev_dbg(hba->dev, in ufshcd_query_flag_retry()
1049 dev_err(hba->dev, in ufshcd_query_flag_retry()
1055 static int __ufshcd_query_descriptor(struct ufs_hba *hba, in __ufshcd_query_descriptor() argument
1065 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n", in __ufshcd_query_descriptor()
1072 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n", in __ufshcd_query_descriptor()
1078 ufshcd_init_query(hba, &request, &response, opcode, idn, index, in __ufshcd_query_descriptor()
1080 hba->dev_cmd.query.descriptor = desc_buf; in __ufshcd_query_descriptor()
1091 dev_err(hba->dev, "%s: Expected query descriptor opcode but got = 0x%.2x\n", in __ufshcd_query_descriptor()
1097 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT); in __ufshcd_query_descriptor()
1100 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n", in __ufshcd_query_descriptor()
1105 hba->dev_cmd.query.descriptor = NULL; in __ufshcd_query_descriptor()
1115 int ufshcd_query_descriptor_retry(struct ufs_hba *hba, enum query_opcode opcode, in ufshcd_query_descriptor_retry() argument
1123 err = __ufshcd_query_descriptor(hba, opcode, idn, index, in ufshcd_query_descriptor_retry()
1135 static int ufshcd_read_desc_length(struct ufs_hba *hba, enum desc_idn desc_id, in ufshcd_read_desc_length() argument
1145 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC, in ufshcd_read_desc_length()
1150 dev_err(hba->dev, "%s: Failed to get descriptor header id %d", in ufshcd_read_desc_length()
1154 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch", in ufshcd_read_desc_length()
1165 static void ufshcd_init_desc_sizes(struct ufs_hba *hba) in ufshcd_init_desc_sizes() argument
1169 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0, in ufshcd_init_desc_sizes()
1170 &hba->desc_size.dev_desc); in ufshcd_init_desc_sizes()
1172 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE; in ufshcd_init_desc_sizes()
1174 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0, in ufshcd_init_desc_sizes()
1175 &hba->desc_size.pwr_desc); in ufshcd_init_desc_sizes()
1177 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE; in ufshcd_init_desc_sizes()
1179 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0, in ufshcd_init_desc_sizes()
1180 &hba->desc_size.interc_desc); in ufshcd_init_desc_sizes()
1182 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE; in ufshcd_init_desc_sizes()
1184 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0, in ufshcd_init_desc_sizes()
1185 &hba->desc_size.conf_desc); in ufshcd_init_desc_sizes()
1187 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE; in ufshcd_init_desc_sizes()
1189 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0, in ufshcd_init_desc_sizes()
1190 &hba->desc_size.unit_desc); in ufshcd_init_desc_sizes()
1192 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE; in ufshcd_init_desc_sizes()
1194 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0, in ufshcd_init_desc_sizes()
1195 &hba->desc_size.geom_desc); in ufshcd_init_desc_sizes()
1197 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE; in ufshcd_init_desc_sizes()
1199 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0, in ufshcd_init_desc_sizes()
1200 &hba->desc_size.hlth_desc); in ufshcd_init_desc_sizes()
1202 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE; in ufshcd_init_desc_sizes()
1209 int ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id, in ufshcd_map_desc_id_to_length() argument
1214 *desc_len = hba->desc_size.dev_desc; in ufshcd_map_desc_id_to_length()
1217 *desc_len = hba->desc_size.pwr_desc; in ufshcd_map_desc_id_to_length()
1220 *desc_len = hba->desc_size.geom_desc; in ufshcd_map_desc_id_to_length()
1223 *desc_len = hba->desc_size.conf_desc; in ufshcd_map_desc_id_to_length()
1226 *desc_len = hba->desc_size.unit_desc; in ufshcd_map_desc_id_to_length()
1229 *desc_len = hba->desc_size.interc_desc; in ufshcd_map_desc_id_to_length()
1235 *desc_len = hba->desc_size.hlth_desc; in ufshcd_map_desc_id_to_length()
1253 int ufshcd_read_desc_param(struct ufs_hba *hba, enum desc_idn desc_id, in ufshcd_read_desc_param() argument
1269 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len); in ufshcd_read_desc_param()
1273 dev_err(hba->dev, "%s: Failed to get full descriptor length", in ufshcd_read_desc_param()
1289 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC, in ufshcd_read_desc_param()
1294 …dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret … in ufshcd_read_desc_param()
1301 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header", in ufshcd_read_desc_param()
1334 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd) in ufshcd_uic_pwr_ctrl() argument
1340 ret = ufshcd_send_uic_cmd(hba, cmd); in ufshcd_uic_pwr_ctrl()
1342 dev_err(hba->dev, in ufshcd_uic_pwr_ctrl()
1351 status = ufshcd_get_upmcrs(hba); in ufshcd_uic_pwr_ctrl()
1353 dev_err(hba->dev, in ufshcd_uic_pwr_ctrl()
1368 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode) in ufshcd_uic_change_pwr_mode() argument
1376 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd); in ufshcd_uic_change_pwr_mode()
1382 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufs_hba *hba, in ufshcd_prepare_utp_scsi_cmd_upiu() argument
1385 struct utp_upiu_req *ucd_req_ptr = hba->ucd_req_ptr; in ufshcd_prepare_utp_scsi_cmd_upiu()
1404 memset(hba->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); in ufshcd_prepare_utp_scsi_cmd_upiu()
1415 static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) in prepare_prdt_table() argument
1417 struct utp_transfer_req_desc *req_desc = hba->utrdl; in prepare_prdt_table()
1418 struct ufshcd_sg_entry *prd_table = hba->ucd_prdt_ptr; in prepare_prdt_table()
1446 struct ufs_hba *hba = dev_get_uclass_priv(scsi_dev->parent); in ufs_scsi_exec() local
1447 struct utp_transfer_req_desc *req_desc = hba->utrdl; in ufs_scsi_exec()
1453 ufshcd_prepare_utp_scsi_cmd_upiu(hba, pccb, upiu_flags); in ufs_scsi_exec()
1454 prepare_prdt_table(hba, pccb); in ufs_scsi_exec()
1456 ufshcd_send_command(hba, TASK_TAG); in ufs_scsi_exec()
1458 ocs = ufshcd_get_tr_ocs(hba); in ufs_scsi_exec()
1461 result = ufshcd_get_req_rsp(hba->ucd_rsp_ptr); in ufs_scsi_exec()
1464 result = ufshcd_get_rsp_upiu_result(hba->ucd_rsp_ptr); in ufs_scsi_exec()
1473 dev_err(hba->dev, in ufs_scsi_exec()
1477 dev_err(hba->dev, in ufs_scsi_exec()
1484 dev_err(hba->dev, "OCS error from controller = %x\n", ocs); in ufs_scsi_exec()
1491 static inline int ufshcd_read_desc(struct ufs_hba *hba, enum desc_idn desc_id, in ufshcd_read_desc() argument
1494 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size); in ufshcd_read_desc()
1497 static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size) in ufshcd_read_device_desc() argument
1499 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size); in ufshcd_read_device_desc()
1506 int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, in ufshcd_read_string_desc() argument
1511 err = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING, desc_index, buf, in ufshcd_read_string_desc()
1515 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n", in ufshcd_read_string_desc()
1530 dev_err(hba->dev, "%s: buffer allocated size is too small\n", in ufshcd_read_string_desc()
1563 static int ufs_get_device_desc(struct ufs_hba *hba, in ufs_get_device_desc() argument
1571 buff_len = max_t(size_t, hba->desc_size.dev_desc, in ufs_get_device_desc()
1579 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc); in ufs_get_device_desc()
1581 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n", in ufs_get_device_desc()
1598 err = ufshcd_read_string_desc(hba, model_index, desc_buf, in ufs_get_device_desc()
1601 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n", in ufs_get_device_desc()
1622 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba) in ufshcd_get_max_pwr_mode() argument
1624 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info; in ufshcd_get_max_pwr_mode()
1626 if (hba->max_pwr_info.is_valid) in ufshcd_get_max_pwr_mode()
1634 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES), in ufshcd_get_max_pwr_mode()
1636 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), in ufshcd_get_max_pwr_mode()
1640 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n", in ufshcd_get_max_pwr_mode()
1650 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx); in ufshcd_get_max_pwr_mode()
1652 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR), in ufshcd_get_max_pwr_mode()
1655 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n", in ufshcd_get_max_pwr_mode()
1662 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), in ufshcd_get_max_pwr_mode()
1665 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR), in ufshcd_get_max_pwr_mode()
1668 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n", in ufshcd_get_max_pwr_mode()
1675 hba->max_pwr_info.is_valid = true; in ufshcd_get_max_pwr_mode()
1679 static int ufshcd_change_power_mode(struct ufs_hba *hba, in ufshcd_change_power_mode() argument
1685 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx && in ufshcd_change_power_mode()
1686 pwr_mode->gear_tx == hba->pwr_info.gear_tx && in ufshcd_change_power_mode()
1687 pwr_mode->lane_rx == hba->pwr_info.lane_rx && in ufshcd_change_power_mode()
1688 pwr_mode->lane_tx == hba->pwr_info.lane_tx && in ufshcd_change_power_mode()
1689 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx && in ufshcd_change_power_mode()
1690 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx && in ufshcd_change_power_mode()
1691 pwr_mode->hs_rate == hba->pwr_info.hs_rate) { in ufshcd_change_power_mode()
1692 dev_dbg(hba->dev, "%s: power already configured\n", __func__); in ufshcd_change_power_mode()
1702 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx); in ufshcd_change_power_mode()
1703 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES), in ufshcd_change_power_mode()
1706 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE); in ufshcd_change_power_mode()
1708 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE); in ufshcd_change_power_mode()
1710 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx); in ufshcd_change_power_mode()
1711 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES), in ufshcd_change_power_mode()
1714 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE); in ufshcd_change_power_mode()
1716 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE); in ufshcd_change_power_mode()
1722 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES), in ufshcd_change_power_mode()
1725 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4 | in ufshcd_change_power_mode()
1729 dev_err(hba->dev, in ufshcd_change_power_mode()
1736 memcpy(&hba->pwr_info, pwr_mode, sizeof(struct ufs_pa_layer_attr)); in ufshcd_change_power_mode()
1745 static int ufshcd_verify_dev_init(struct ufs_hba *hba) in ufshcd_verify_dev_init() argument
1751 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP, in ufshcd_verify_dev_init()
1756 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err); in ufshcd_verify_dev_init()
1760 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err); in ufshcd_verify_dev_init()
1768 static int ufshcd_complete_dev_init(struct ufs_hba *hba) in ufshcd_complete_dev_init() argument
1774 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG, in ufshcd_complete_dev_init()
1777 dev_err(hba->dev, in ufshcd_complete_dev_init()
1785 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG, in ufshcd_complete_dev_init()
1790 dev_err(hba->dev, in ufshcd_complete_dev_init()
1794 dev_err(hba->dev, in ufshcd_complete_dev_init()
1802 static void ufshcd_def_desc_sizes(struct ufs_hba *hba) in ufshcd_def_desc_sizes() argument
1804 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE; in ufshcd_def_desc_sizes()
1805 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE; in ufshcd_def_desc_sizes()
1806 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE; in ufshcd_def_desc_sizes()
1807 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE; in ufshcd_def_desc_sizes()
1808 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE; in ufshcd_def_desc_sizes()
1809 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE; in ufshcd_def_desc_sizes()
1810 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE; in ufshcd_def_desc_sizes()
1813 int ufs_start(struct ufs_hba *hba) in ufs_start() argument
1818 ret = ufshcd_link_startup(hba); in ufs_start()
1822 ret = ufshcd_verify_dev_init(hba); in ufs_start()
1826 ret = ufshcd_complete_dev_init(hba); in ufs_start()
1831 ufshcd_init_desc_sizes(hba); in ufs_start()
1833 ret = ufs_get_device_desc(hba, &card); in ufs_start()
1835 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n", in ufs_start()
1841 if (ufshcd_get_max_pwr_mode(hba)) { in ufs_start()
1842 dev_err(hba->dev, in ufs_start()
1846 ret = ufshcd_change_power_mode(hba, &hba->max_pwr_info.info); in ufs_start()
1848 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n", in ufs_start()
1854 printf("Device at %s up at:", hba->dev->name); in ufs_start()
1855 ufshcd_print_pwr_info(hba); in ufs_start()
1863 struct ufs_hba *hba = dev_get_uclass_priv(ufs_dev); in ufshcd_probe() local
1877 hba->dev = ufs_dev; in ufshcd_probe()
1878 hba->ops = hba_ops; in ufshcd_probe()
1879 hba->mmio_base = (void *)dev_read_addr(ufs_dev); in ufshcd_probe()
1882 ufshcd_def_desc_sizes(hba); in ufshcd_probe()
1884 ufshcd_ops_init(hba); in ufshcd_probe()
1887 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES); in ufshcd_probe()
1890 hba->version = ufshcd_get_ufs_version(hba); in ufshcd_probe()
1891 if (hba->version != UFSHCI_VERSION_10 && in ufshcd_probe()
1892 hba->version != UFSHCI_VERSION_11 && in ufshcd_probe()
1893 hba->version != UFSHCI_VERSION_20 && in ufshcd_probe()
1894 hba->version != UFSHCI_VERSION_21) in ufshcd_probe()
1895 dev_err(hba->dev, "invalid UFS version 0x%x\n", in ufshcd_probe()
1896 hba->version); in ufshcd_probe()
1899 hba->intr_mask = ufshcd_get_intr_mask(hba); in ufshcd_probe()
1902 err = ufshcd_memory_alloc(hba); in ufshcd_probe()
1904 dev_err(hba->dev, "Memory allocation failed\n"); in ufshcd_probe()
1909 ufshcd_host_memory_configure(hba); in ufshcd_probe()
1916 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS), in ufshcd_probe()
1918 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE); in ufshcd_probe()
1920 err = ufshcd_hba_enable(hba); in ufshcd_probe()
1922 dev_err(hba->dev, "Host controller enable failed\n"); in ufshcd_probe()
1926 err = ufs_start(hba); in ufshcd_probe()