Lines Matching +full:cs +full:- +full:x
4 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/imx-regs.h>
16 #include <asm/mach-imx/spi.h>
28 __weak int board_spi_cs_gpio(unsigned bus, unsigned cs) in board_spi_cs_gpio() argument
30 return -1; in board_spi_cs_gpio()
64 dm_gpio_set_value(&mxcs->ss, mxcs->ss_pol); in mxc_spi_cs_activate()
66 if (mxcs->gpio > 0) in mxc_spi_cs_activate()
67 gpio_set_value(mxcs->gpio, mxcs->ss_pol); in mxc_spi_cs_activate()
74 dm_gpio_set_value(&mxcs->ss, !(mxcs->ss_pol)); in mxc_spi_cs_deactivate()
76 if (mxcs->gpio > 0) in mxc_spi_cs_deactivate()
77 gpio_set_value(mxcs->gpio, !(mxcs->ss_pol)); in mxc_spi_cs_deactivate()
93 static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) in spi_cfg_mxc() argument
98 unsigned int max_hz = mxcs->max_hz; in spi_cfg_mxc()
99 unsigned int mode = mxcs->mode; in spi_cfg_mxc()
109 ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) | in spi_cfg_mxc()
124 mxcs->ctrl_reg = ctrl_reg; in spi_cfg_mxc()
131 static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) in spi_cfg_mxc() argument
137 struct cspi_regs *regs = (struct cspi_regs *)mxcs->base; in spi_cfg_mxc()
138 unsigned int max_hz = mxcs->max_hz; in spi_cfg_mxc()
139 unsigned int mode = mxcs->mode; in spi_cfg_mxc()
147 reg_write(®s->ctrl, reg_ctrl); in spi_cfg_mxc()
149 reg_write(®s->ctrl, reg_ctrl); in spi_cfg_mxc()
152 pre_div = (clk_src - 1) / max_hz; in spi_cfg_mxc()
156 post_div -= 4; in spi_cfg_mxc()
160 return -1; in spi_cfg_mxc()
170 MXC_CSPICTRL_SELCHAN(cs); in spi_cfg_mxc()
187 reg_config = reg_read(®s->cfg); in spi_cfg_mxc()
193 reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_SSPOL))) | in spi_cfg_mxc()
194 (ss_pol << (cs + MXC_CSPICON_SSPOL)); in spi_cfg_mxc()
195 reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_POL))) | in spi_cfg_mxc()
196 (sclkpol << (cs + MXC_CSPICON_POL)); in spi_cfg_mxc()
197 reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_CTL))) | in spi_cfg_mxc()
198 (sclkctl << (cs + MXC_CSPICON_CTL)); in spi_cfg_mxc()
199 reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_PHA))) | in spi_cfg_mxc()
200 (sclkpha << (cs + MXC_CSPICON_PHA)); in spi_cfg_mxc()
202 debug("reg_ctrl = 0x%x\n", reg_ctrl); in spi_cfg_mxc()
203 reg_write(®s->ctrl, reg_ctrl); in spi_cfg_mxc()
204 debug("reg_config = 0x%x\n", reg_config); in spi_cfg_mxc()
205 reg_write(®s->cfg, reg_config); in spi_cfg_mxc()
208 mxcs->ctrl_reg = reg_ctrl; in spi_cfg_mxc()
209 mxcs->cfg_reg = reg_config; in spi_cfg_mxc()
212 reg_write(®s->intr, 0); in spi_cfg_mxc()
213 reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF); in spi_cfg_mxc()
224 struct cspi_regs *regs = (struct cspi_regs *)mxcs->base; in spi_xchg_single()
228 debug("%s: bitlen %d dout 0x%x din 0x%x\n", in spi_xchg_single()
231 mxcs->ctrl_reg = (mxcs->ctrl_reg & in spi_xchg_single()
233 MXC_CSPICTRL_BITCOUNT(bitlen - 1); in spi_xchg_single()
235 reg_write(®s->ctrl, mxcs->ctrl_reg | MXC_CSPICTRL_EN); in spi_xchg_single()
237 reg_write(®s->cfg, mxcs->cfg_reg); in spi_xchg_single()
241 reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF); in spi_xchg_single()
256 debug("Sending SPI 0x%x\n", data); in spi_xchg_single()
258 reg_write(®s->txdata, data); in spi_xchg_single()
259 nbytes -= cnt; in spi_xchg_single()
267 /* Buffer is not 32-bit aligned */ in spi_xchg_single()
278 debug("Sending SPI 0x%x\n", data); in spi_xchg_single()
279 reg_write(®s->txdata, data); in spi_xchg_single()
280 nbytes -= 4; in spi_xchg_single()
284 reg_write(®s->ctrl, mxcs->ctrl_reg | in spi_xchg_single()
288 status = reg_read(®s->stat); in spi_xchg_single()
293 return -1; in spi_xchg_single()
295 status = reg_read(®s->stat); in spi_xchg_single()
299 reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF); in spi_xchg_single()
306 data = reg_read(®s->rxdata); in spi_xchg_single()
308 data = cpu_to_be32(data) >> ((sizeof(data) - cnt) * 8); in spi_xchg_single()
309 debug("SPI Rx unaligned: 0x%x\n", data); in spi_xchg_single()
314 nbytes -= cnt; in spi_xchg_single()
319 tmp = reg_read(®s->rxdata); in spi_xchg_single()
321 debug("SPI Rx: 0x%x 0x%x\n", tmp, data); in spi_xchg_single()
327 nbytes -= cnt; in spi_xchg_single()
346 return -EINVAL; in mxc_spi_xfer_internal()
367 n_bytes -= blk_size; in mxc_spi_xfer_internal()
377 static int mxc_spi_claim_bus_internal(struct mxc_spi_slave *mxcs, int cs) in mxc_spi_claim_bus_internal() argument
379 struct cspi_regs *regs = (struct cspi_regs *)mxcs->base; in mxc_spi_claim_bus_internal()
382 reg_write(®s->rxdata, 1); in mxc_spi_claim_bus_internal()
384 ret = spi_cfg_mxc(mxcs, cs); in mxc_spi_claim_bus_internal()
389 reg_write(®s->period, MXC_CSPIPERIOD_32KHZ); in mxc_spi_claim_bus_internal()
390 reg_write(®s->intr, 0); in mxc_spi_claim_bus_internal()
409 * Some SPI devices require active chip-select over multiple
413 * a gpio value for each cs (-1 if cs doesn't need to use gpio).
414 * You must use some unused on this SPI controller cs between 0 and 3.
417 unsigned int bus, unsigned int cs) in setup_cs_gpio() argument
421 mxcs->gpio = board_spi_cs_gpio(bus, cs); in setup_cs_gpio()
422 if (mxcs->gpio == -1) in setup_cs_gpio()
425 gpio_request(mxcs->gpio, "spi-cs"); in setup_cs_gpio()
426 ret = gpio_direction_output(mxcs->gpio, !(mxcs->ss_pol)); in setup_cs_gpio()
428 printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio); in setup_cs_gpio()
429 return -EINVAL; in setup_cs_gpio()
439 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, in spi_setup_slave() argument
453 mxcs = spi_alloc_slave(struct mxc_spi_slave, bus, cs); in spi_setup_slave()
459 mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0; in spi_setup_slave()
461 ret = setup_cs_gpio(mxcs, bus, cs); in spi_setup_slave()
467 mxcs->base = spi_bases[bus]; in spi_setup_slave()
468 mxcs->max_hz = max_hz; in spi_setup_slave()
469 mxcs->mode = mode; in spi_setup_slave()
471 return &mxcs->slave; in spi_setup_slave()
485 return mxc_spi_claim_bus_internal(mxcs, slave->cs); in spi_claim_bus()
496 struct mxc_spi_slave *plat = bus->platdata; in mxc_spi_probe()
499 const void *blob = gd->fdt_blob; in mxc_spi_probe()
502 if (gpio_request_by_name(bus, "cs-gpios", 0, &plat->ss, in mxc_spi_probe()
504 dev_err(bus, "No cs-gpios property\n"); in mxc_spi_probe()
505 return -EINVAL; in mxc_spi_probe()
508 plat->base = dev_get_addr(bus); in mxc_spi_probe()
509 if (plat->base == FDT_ADDR_T_NONE) in mxc_spi_probe()
510 return -ENODEV; in mxc_spi_probe()
512 ret = dm_gpio_set_value(&plat->ss, !(mxcs->ss_pol)); in mxc_spi_probe()
514 dev_err(bus, "Setting cs error\n"); in mxc_spi_probe()
518 mxcs->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", in mxc_spi_probe()
527 struct mxc_spi_slave *mxcs = dev_get_platdata(dev->parent); in mxc_spi_xfer()
535 struct mxc_spi_slave *mxcs = dev_get_platdata(dev->parent); in mxc_spi_claim_bus()
538 return mxc_spi_claim_bus_internal(mxcs, slave_plat->cs); in mxc_spi_claim_bus()
556 mxcs->mode = mode; in mxc_spi_set_mode()
557 mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0; in mxc_spi_set_mode()
571 { .compatible = "fsl,imx51-ecspi" },