Lines Matching +full:spi +full:- +full:slave
4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
6 * Derived from drivers/spi/mpc8xxx_spi.c
8 * SPDX-License-Identifier: GPL-2.0+
14 #include <spi.h>
20 #include <asm/arch-mvebu/spi.h>
24 setbits_le32(®->ctrl, KWSPI_CSN_ACT); in _spi_cs_activate()
29 clrbits_le32(®->ctrl, KWSPI_CSN_ACT); in _spi_cs_deactivate()
44 * handle data in 8-bit chunks in _spi_xfer()
47 clrsetbits_le32(®->cfg, KWSPI_XFERLEN_MASK, KWSPI_XFERLEN_1BYTE); in _spi_xfer()
53 /* Shift data so it's msb-justified */ in _spi_xfer()
57 clrbits_le32(®->irq_cause, KWSPI_SMEMRDIRQ); in _spi_xfer()
58 writel(tmpdout, ®->dout); /* Write the data out */ in _spi_xfer()
63 * Wait for SPI transmit to get out in _spi_xfer()
68 if (readl(®->irq_cause) & KWSPI_SMEMRDIRQ) { in _spi_xfer()
70 tmpdin = readl(®->din); in _spi_xfer()
80 bitlen -= 8; in _spi_xfer()
86 printf("*** spi_xfer: Time out during SPI transfer\n"); in _spi_xfer()
109 struct spi_slave *slave; in spi_setup_slave() local
121 slave = spi_alloc_slave_base(bus, cs); in spi_setup_slave()
122 if (!slave) in spi_setup_slave()
125 writel(KWSPI_SMEMRDY, &spireg->ctrl); in spi_setup_slave()
127 /* calculate spi clock prescaller using max_hz */ in spi_setup_slave()
132 /* program spi clock prescaller using max_hz */ in spi_setup_slave()
133 writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg); in spi_setup_slave()
136 writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause); in spi_setup_slave()
137 writel(KWSPI_IRQMASK, &spireg->irq_mask); in spi_setup_slave()
144 return slave; in spi_setup_slave()
147 void spi_free_slave(struct spi_slave *slave) in spi_free_slave() argument
152 free(slave); in spi_free_slave()
159 __attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave) in board_spi_claim_bus() argument
164 int spi_claim_bus(struct spi_slave *slave) in spi_claim_bus() argument
190 /* set new spi mpp and save current mpp config */ in spi_claim_bus()
194 return board_spi_claim_bus(slave); in spi_claim_bus()
197 __attribute__((weak)) void board_spi_release_bus(struct spi_slave *slave) in board_spi_release_bus() argument
201 void spi_release_bus(struct spi_slave *slave) in spi_release_bus() argument
207 board_spi_release_bus(slave); in spi_release_bus()
226 void spi_cs_activate(struct spi_slave *slave) in spi_cs_activate() argument
231 void spi_cs_deactivate(struct spi_slave *slave) in spi_cs_deactivate() argument
236 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, in spi_xfer() argument
261 struct kwspi_registers *reg = plat->spireg; in mvebu_spi_set_speed()
264 /* calculate spi clock prescaller using max_hz */ in mvebu_spi_set_speed()
269 /* program spi clock prescaler using max_hz */ in mvebu_spi_set_speed()
270 writel(KWSPI_ADRLEN_3BYTE | data, ®->cfg); in mvebu_spi_set_speed()
279 struct kwspi_registers *reg = plat->spireg; in mvebu_spi_50mhz_ac_timing_erratum()
283 * Erratum description: (Erratum NO. FE-9144572) The device in mvebu_spi_50mhz_ac_timing_erratum()
284 * SPI interface supports frequencies of up to 50 MHz. in mvebu_spi_50mhz_ac_timing_erratum()
286 * 250 MHz and the SPI interfaces is configured for 50MHz SPI in mvebu_spi_50mhz_ac_timing_erratum()
288 * reads from the SPI device. in mvebu_spi_50mhz_ac_timing_erratum()
291 * 1. Set CPOL=CPHA=0 in "SPI Interface Configuration in mvebu_spi_50mhz_ac_timing_erratum()
293 * 2. Set TMISO_SAMPLE value to 0x2 in "SPI Timing Parameters 1 in mvebu_spi_50mhz_ac_timing_erratum()
296 data = readl(®->timing1); in mvebu_spi_50mhz_ac_timing_erratum()
306 writel(data, ®->timing1); in mvebu_spi_50mhz_ac_timing_erratum()
312 struct kwspi_registers *reg = plat->spireg; in mvebu_spi_set_mode()
314 u32 data = readl(®->cfg); in mvebu_spi_set_mode()
325 writel(data, ®->cfg); in mvebu_spi_set_mode()
328 if (drvdata->is_errata_50mhz_ac) in mvebu_spi_set_mode()
337 struct udevice *bus = dev->parent; in mvebu_spi_xfer()
340 return _spi_xfer(plat->spireg, bitlen, dout, din, flags); in mvebu_spi_xfer()
345 struct udevice *bus = dev->parent; in mvebu_spi_claim_bus()
348 /* Configure the chip-select in the CTRL register */ in mvebu_spi_claim_bus()
349 clrsetbits_le32(&plat->spireg->ctrl, in mvebu_spi_claim_bus()
359 struct kwspi_registers *reg = plat->spireg; in mvebu_spi_probe()
361 writel(KWSPI_SMEMRDY, ®->ctrl); in mvebu_spi_probe()
362 writel(KWSPI_SMEMRDIRQ, ®->irq_cause); in mvebu_spi_probe()
363 writel(KWSPI_IRQMASK, ®->irq_mask); in mvebu_spi_probe()
372 plat->spireg = (struct kwspi_registers *)devfdt_get_addr(bus); in mvebu_spi_ofdata_to_platdata()
402 .compatible = "marvell,armada-375-spi",
406 .compatible = "marvell,armada-380-spi",
410 .compatible = "marvell,armada-xp-spi",