79 /* fsl_qspi_platdata flags */
92  * @flags: Flags for QSPI QSPI_FLAG_...
101 	u32 flags;  member
114  * @flags: Flags for QSPI QSPI_FLAG_...
127 	u32 flags;  member
147 static u32 qspi_read32(u32 flags, u32 *addr)  in qspi_read32()  argument
149 	return flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ?  in qspi_read32()
153 static void qspi_write32(u32 flags, u32 *addr, u32 val)  in qspi_write32()  argument
155 	flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ?  in qspi_write32()
176 	qspi_write32(priv->flags, &regs->lutkey, LUT_KEY_VALUE);  in qspi_set_lut()
177 	qspi_write32(priv->flags, &regs->lckcr, QSPI_LCKCR_UNLOCK);  in qspi_set_lut()
181 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_WREN) |  in qspi_set_lut()
183 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);  in qspi_set_lut()
184 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
185 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
190 	qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
196 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
201 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
207 	qspi_write32(priv->flags, &regs->lut[lut_base + 1],  in qspi_set_lut()
211 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
212 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
216 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_RDSR) |  in qspi_set_lut()
219 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);  in qspi_set_lut()
220 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
221 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
226 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_SE) |  in qspi_set_lut()
231 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
236 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
241 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);  in qspi_set_lut()
242 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
243 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
247 	qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
250 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);  in qspi_set_lut()
251 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
252 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
257 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_PP) |  in qspi_set_lut()
262 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
267 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
278 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], OPRND0(0) |  in qspi_set_lut()
281 	qspi_write32(priv->flags, &regs->lut[lut_base + 1],  in qspi_set_lut()
285 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
286 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
290 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_RDID) |  in qspi_set_lut()
293 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);  in qspi_set_lut()
294 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
295 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
299 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_BE_4K) |  in qspi_set_lut()
310 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_BRRD) |  in qspi_set_lut()
315 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_BRWR) |  in qspi_set_lut()
320 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_RDEAR) |  in qspi_set_lut()
325 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_WREAR) |  in qspi_set_lut()
335 	qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
339 	qspi_write32(priv->flags, &regs->lut[lut_base + 1],  in qspi_set_lut()
349 	qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
353 	qspi_write32(priv->flags, &regs->lut[lut_base + 1],  in qspi_set_lut()
357 	qspi_write32(priv->flags, &regs->lutkey, LUT_KEY_VALUE);  in qspi_set_lut()
358 	qspi_write32(priv->flags, &regs->lckcr, QSPI_LCKCR_LOCK);  in qspi_set_lut()
373 	reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_ahb_invalid()
375 	qspi_write32(priv->flags, &regs->mcr, reg);  in qspi_ahb_invalid()
384 	qspi_write32(priv->flags, &regs->mcr, reg);  in qspi_ahb_invalid()
394 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_ahb_read()
396 	qspi_write32(priv->flags, &regs->mcr,  in qspi_ahb_read()
404 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_ahb_read()
412 	reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_enable_ddr_mode()
414 	qspi_write32(priv->flags, &regs->mcr, reg | QSPI_MCR_MDIS_MASK);  in qspi_enable_ddr_mode()
417 	reg2 = qspi_read32(priv->flags, &regs->smpr);  in qspi_enable_ddr_mode()
420 	qspi_write32(priv->flags, &regs->smpr, reg2);  in qspi_enable_ddr_mode()
427 	qspi_write32(priv->flags, &regs->mcr, reg);  in qspi_enable_ddr_mode()
448 	qspi_write32(priv->flags, &regs->buf0cr, QSPI_BUFXCR_INVALID_MSTRID);  in qspi_init_ahb_read()
449 	qspi_write32(priv->flags, &regs->buf1cr, QSPI_BUFXCR_INVALID_MSTRID);  in qspi_init_ahb_read()
450 	qspi_write32(priv->flags, &regs->buf2cr, QSPI_BUFXCR_INVALID_MSTRID);  in qspi_init_ahb_read()
451 	qspi_write32(priv->flags, &regs->buf3cr, QSPI_BUF3CR_ALLMST_MASK |  in qspi_init_ahb_read()
455 	qspi_write32(priv->flags, &regs->buf0ind, 0);  in qspi_init_ahb_read()
456 	qspi_write32(priv->flags, &regs->buf1ind, 0);  in qspi_init_ahb_read()
457 	qspi_write32(priv->flags, &regs->buf2ind, 0);  in qspi_init_ahb_read()
463 	qspi_write32(priv->flags, &regs->bfgencr,  in qspi_init_ahb_read()
478 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_rdbank()
479 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_rdbank()
482 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_rdbank()
484 	qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base);  in qspi_op_rdbank()
491 	qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_rdbank()
495 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_rdbank()
501 		reg = qspi_read32(priv->flags, &regs->rbsr);  in qspi_op_rdbank()
503 			data = qspi_read32(priv->flags, &regs->rbdr[0]);  in qspi_op_rdbank()
506 			qspi_write32(priv->flags, &regs->mcr,  in qspi_op_rdbank()
507 				     qspi_read32(priv->flags, &regs->mcr) |  in qspi_op_rdbank()
513 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_rdbank()
523 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_rdid()
524 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_rdid()
527 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_rdid()
529 	qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base);  in qspi_op_rdid()
531 	qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_rdid()
533 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_rdid()
540 		rbsr_reg = qspi_read32(priv->flags, &regs->rbsr);  in qspi_op_rdid()
542 			data = qspi_read32(priv->flags, &regs->rbdr[i]);  in qspi_op_rdid()
552 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_rdid()
569 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_read()
570 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_read()
573 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_read()
580 		qspi_write32(priv->flags, &regs->sfar, to_or_from);  in qspi_op_read()
585 		qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_read()
588 		while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_read()
596 			data = qspi_read32(priv->flags, &regs->rbdr[i]);  in qspi_op_read()
606 		qspi_write32(priv->flags, &regs->mcr,  in qspi_op_read()
607 			     qspi_read32(priv->flags, &regs->mcr) |  in qspi_op_read()
611 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_read()
621 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_write()
622 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_write()
625 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_write()
631 		qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_write()
633 		while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_write()
636 		qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_write()
638 		while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_write()
641 		reg = qspi_read32(priv->flags, &regs->rbsr);  in qspi_op_write()
643 			status_reg = qspi_read32(priv->flags, &regs->rbdr[0]);  in qspi_op_write()
646 		qspi_write32(priv->flags, &regs->mcr,  in qspi_op_write()
647 			     qspi_read32(priv->flags, &regs->mcr) |  in qspi_op_write()
664 	qspi_write32(priv->flags, &regs->sfar, to_or_from);  in qspi_op_write()
679 		qspi_write32(priv->flags, &regs->tbdr, data);  in qspi_op_write()
683 	qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_write()
685 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_write()
688 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_write()
696 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_rdsr()
697 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_rdsr()
700 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_rdsr()
702 	qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base);  in qspi_op_rdsr()
704 	qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_rdsr()
706 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_rdsr()
712 		reg = qspi_read32(priv->flags, &regs->rbsr);  in qspi_op_rdsr()
714 			data = qspi_read32(priv->flags, &regs->rbdr[0]);  in qspi_op_rdsr()
717 			qspi_write32(priv->flags, &regs->mcr,  in qspi_op_rdsr()
718 				     qspi_read32(priv->flags, &regs->mcr) |  in qspi_op_rdsr()
724 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_rdsr()
733 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_erase()
734 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_erase()
737 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_erase()
740 	qspi_write32(priv->flags, &regs->sfar, to_or_from);  in qspi_op_erase()
742 	qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_erase()
744 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_erase()
748 		qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_erase()
751 		qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_erase()
754 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_erase()
757 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_erase()
761 		const void *dout, void *din, unsigned long flags)  in qspi_xfer()  argument
770 		if (flags & SPI_XFER_BEGIN) {  in qspi_xfer()
775 		if (flags == SPI_XFER_END) {  in qspi_xfer()
837 	mcr_val = qspi_read32(priv->flags, &priv->regs->mcr);  in qspi_module_disable()
842 	qspi_write32(priv->flags, &priv->regs->mcr, mcr_val);  in qspi_module_disable()
849 	smpr_val = qspi_read32(priv->flags, &priv->regs->smpr);  in qspi_cfg_smpr()
852 	qspi_write32(priv->flags, &priv->regs->smpr, smpr_val);  in qspi_cfg_smpr()
893 	qspi->priv.flags |= QSPI_FLAG_REGMAP_ENDIAN_BIG;  in spi_setup_slave()
909 	mcr_val = qspi_read32(qspi->priv.flags, &regs->mcr);  in spi_setup_slave()
915 	qspi_write32(qspi->priv.flags, &regs->mcr,  in spi_setup_slave()
934 	qspi_write32(qspi->priv.flags, &regs->sfa1ad,  in spi_setup_slave()
936 	qspi_write32(qspi->priv.flags, &regs->sfa2ad,  in spi_setup_slave()
938 	qspi_write32(qspi->priv.flags, &regs->sfb1ad,  in spi_setup_slave()
940 	qspi_write32(qspi->priv.flags, &regs->sfb2ad,  in spi_setup_slave()
972 		const void *dout, void *din, unsigned long flags)  in spi_xfer()  argument
976 	return qspi_xfer(&qspi->priv, bitlen, dout, din, flags);  in spi_xfer()
1007 	priv->flags = plat->flags;  in fsl_qspi_probe()
1032 	mcr_val = qspi_read32(priv->flags, &priv->regs->mcr);  in fsl_qspi_probe()
1038 	qspi_write32(priv->flags, &priv->regs->mcr,  in fsl_qspi_probe()
1071 	qspi_write32(priv->flags, &priv->regs->sfa1ad,  in fsl_qspi_probe()
1077 		qspi_write32(priv->flags, &priv->regs->sfa2ad,  in fsl_qspi_probe()
1079 		qspi_write32(priv->flags, &priv->regs->sfb1ad,  in fsl_qspi_probe()
1081 		qspi_write32(priv->flags, &priv->regs->sfb2ad,  in fsl_qspi_probe()
1085 		qspi_write32(priv->flags, &priv->regs->sfa2ad,  in fsl_qspi_probe()
1087 		qspi_write32(priv->flags, &priv->regs->sfb1ad,  in fsl_qspi_probe()
1089 		qspi_write32(priv->flags, &priv->regs->sfb2ad,  in fsl_qspi_probe()
1119 		plat->flags |= QSPI_FLAG_REGMAP_ENDIAN_BIG;  in fsl_qspi_ofdata_to_platdata()
1159 	      plat->flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le"  in fsl_qspi_ofdata_to_platdata()
1166 		const void *dout, void *din, unsigned long flags)  in fsl_qspi_xfer()  argument
1174 	return qspi_xfer(priv, bitlen, dout, din, flags);  in fsl_qspi_xfer()