4  * SPDX-License-Identifier:	GPL-2.0+
45 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,  in spi_setup_slave()  argument
53 	if (!spi_cs_is_valid(bus, cs))  in spi_setup_slave()
80 	scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz;  in spi_setup_slave()
94 	as = spi_alloc_slave(struct atmel_spi_slave, bus, cs);  in spi_setup_slave()
98 	as->regs = regs;  in spi_setup_slave()
99 	as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS  in spi_setup_slave()
100 			| ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf);  in spi_setup_slave()
102 		as->mr |= ATMEL_SPI_MR_WDRBT;  in spi_setup_slave()
104 	spi_writel(as, CSR(cs), csrx);  in spi_setup_slave()
106 	return &as->slave;  in spi_setup_slave()
127 	spi_writel(as, MR, as->mr);  in spi_claim_bus()
154 		goto out;  in spi_xfer()
157 	 * TODO: The controller can do non-multiple-of-8 bit  in spi_xfer()
167 		goto out;  in spi_xfer()
173 	 * The controller can do automatic CS control, but it is  in spi_xfer()
175 	 * in the context of U-Boot.  in spi_xfer()
193 			return -1;  in spi_xfer()
211 out:  in spi_xfer()
215 		 * we deactivate CS.  in spi_xfer()
250 	struct at91_spi *reg_base = bus_plat->regs;  in atmel_spi_claim_bus()
251 	u32 cs = slave_plat->cs;  in atmel_spi_claim_bus()  local
252 	u32 freq = priv->freq;  in atmel_spi_claim_bus()
255 	scbr = (priv->bus_clk_rate + freq - 1) / freq;  in atmel_spi_claim_bus()
257 		return -EINVAL;  in atmel_spi_claim_bus()
265 	if (!(priv->mode & SPI_CPHA))  in atmel_spi_claim_bus()
267 	if (priv->mode & SPI_CPOL)  in atmel_spi_claim_bus()
270 	writel(csrx, &reg_base->csr[cs]);  in atmel_spi_claim_bus()
275 	       ATMEL_SPI_MR_PCS(~(1 << cs));  in atmel_spi_claim_bus()
277 	writel(mode, &reg_base->mr);  in atmel_spi_claim_bus()
279 	writel(ATMEL_SPI_CR_SPIEN, &reg_base->cr);  in atmel_spi_claim_bus()
289 	writel(ATMEL_SPI_CR_SPIDIS, &bus_plat->regs->cr);  in atmel_spi_release_bus()
300 	u32 cs = slave_plat->cs;  in atmel_spi_cs_activate()  local
302 	if (!dm_gpio_is_valid(&priv->cs_gpios[cs]))  in atmel_spi_cs_activate()
305 	dm_gpio_set_value(&priv->cs_gpios[cs], 0);  in atmel_spi_cs_activate()
315 	u32 cs = slave_plat->cs;  in atmel_spi_cs_deactivate()  local
317 	if (!dm_gpio_is_valid(&priv->cs_gpios[cs]))  in atmel_spi_cs_deactivate()
320 	dm_gpio_set_value(&priv->cs_gpios[cs], 1);  in atmel_spi_cs_deactivate()
329 	struct at91_spi *reg_base = bus_plat->regs;  in atmel_spi_xfer()
338 		goto out;  in atmel_spi_xfer()
341 	 * The controller can do non-multiple-of-8 bit  in atmel_spi_xfer()
351 		goto out;  in atmel_spi_xfer()
357 	 * The controller can do automatic CS control, but it is  in atmel_spi_xfer()
359 	 * in the context of U-Boot.  in atmel_spi_xfer()
371 		readl(&reg_base->rdr);  in atmel_spi_xfer()
375 		status = readl(&reg_base->sr);  in atmel_spi_xfer()
378 			return -1;  in atmel_spi_xfer()
385 			writel(value, &reg_base->tdr);  in atmel_spi_xfer()
390 			value = readl(&reg_base->rdr);  in atmel_spi_xfer()
397 out:  in atmel_spi_xfer()
401 		 * we deactivate CS.  in atmel_spi_xfer()
403 		wait_for_bit_le32(&reg_base->sr,  in atmel_spi_xfer()
416 	priv->freq = speed;  in atmel_spi_set_speed()
425 	priv->mode = mode;  in atmel_spi_set_mode()
451 		return -EINVAL;  in atmel_spi_enable_clk()
459 		return -EINVAL;  in atmel_spi_enable_clk()
461 	priv->bus_clk_rate = clk_rate;  in atmel_spi_enable_clk()
477 	bus_plat->regs = (struct at91_spi *)devfdt_get_addr(bus);  in atmel_spi_probe()
483 	ret = gpio_request_list_by_name(bus, "cs-gpios", priv->cs_gpios,  in atmel_spi_probe()
484 					ARRAY_SIZE(priv->cs_gpios), 0);  in atmel_spi_probe()
486 		pr_err("Can't get %s gpios! Error: %d", bus->name, ret);  in atmel_spi_probe()
490 	for(i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {  in atmel_spi_probe()
491 		if (!dm_gpio_is_valid(&priv->cs_gpios[i]))  in atmel_spi_probe()
494 		dm_gpio_set_dir_flags(&priv->cs_gpios[i],  in atmel_spi_probe()
499 	writel(ATMEL_SPI_CR_SWRST, &bus_plat->regs->cr);  in atmel_spi_probe()
505 	{ .compatible = "atmel,at91rm9200-spi" },