2  * TI serdes driver for keystone2.
50 /* SERDES PHY lane enable configuration value, indexed by PHY interface */
56 /* SERDES PHY PLL enable configuration value, indexed by PHY interface  */
63  * Array to hold all possible serdes configurations.
140 static void ks2_serdes_cmu_comlane_enable(u32 base, struct ks2_serdes *serdes)  in ks2_serdes_cmu_comlane_enable()  argument
142 	/* Bring SerDes out of Reset */  in ks2_serdes_cmu_comlane_enable()
144 	if (serdes->intf == SERDES_PHY_PCSR)  in ks2_serdes_cmu_comlane_enable()
149 	if (serdes->intf == SERDES_PHY_PCSR)  in ks2_serdes_cmu_comlane_enable()
155 static void ks2_serdes_pll_enable(u32 base, struct ks2_serdes *serdes)  in ks2_serdes_pll_enable()  argument
157 	writel(serdes_cfg_pll_enable[serdes->intf],  in ks2_serdes_pll_enable()
172 				   struct ks2_serdes *serdes, u32 lane)  in ks2_serdes_lane_enable()  argument
177 	writel(SERDES_LANE_EN_VAL(serdes_cfg_lane_enable, serdes->intf,  in ks2_serdes_lane_enable()
178 				  serdes->rate_mode),  in ks2_serdes_lane_enable()
182 	if (serdes->loopback)  in ks2_serdes_lane_enable()
187 int ks2_serdes_init(u32 base, struct ks2_serdes *serdes, u32 num_lanes)  in ks2_serdes_init()  argument
193 		if (serdes->clk == cfgs[i].clk && serdes->rate == cfgs[i].rate)  in ks2_serdes_init()
197 		puts("Cannot find keystone SerDes configuration");  in ks2_serdes_init()
203 	ks2_serdes_cmu_comlane_enable(base, serdes);  in ks2_serdes_init()
205 		ks2_serdes_lane_enable(base, serdes, i);  in ks2_serdes_init()
207 	ks2_serdes_pll_enable(base, serdes);  in ks2_serdes_init()