Lines Matching +full:vf610 +full:- +full:lpuart
4 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/imx-regs.h>
99 struct lpuart_serial_platdata *plat = dev->platdata; in is_lpuart32()
101 return plat->flags & LPUART_FLAG_REGMAP_32BIT_REG; in is_lpuart32()
107 struct lpuart_fsl *base = plat->reg; in _lpuart_serial_setbrg()
113 /* place adjustment later - n/32 BRFA */ in _lpuart_serial_setbrg()
114 __raw_writeb(sbr >> 8, &base->ubdh); in _lpuart_serial_setbrg()
115 __raw_writeb(sbr & 0xff, &base->ubdl); in _lpuart_serial_setbrg()
120 struct lpuart_fsl *base = plat->reg; in _lpuart_serial_getc()
121 while (!(__raw_readb(&base->us1) & (US1_RDRF | US1_OR))) in _lpuart_serial_getc()
126 return __raw_readb(&base->ud); in _lpuart_serial_getc()
132 struct lpuart_fsl *base = plat->reg; in _lpuart_serial_putc()
134 while (!(__raw_readb(&base->us1) & US1_TDRE)) in _lpuart_serial_putc()
137 __raw_writeb(c, &base->ud); in _lpuart_serial_putc()
143 struct lpuart_fsl *base = plat->reg; in _lpuart_serial_tstc()
145 if (__raw_readb(&base->urcfifo) == 0) in _lpuart_serial_tstc()
157 struct lpuart_fsl *base = (struct lpuart_fsl *)plat->reg; in _lpuart_serial_init()
160 ctrl = __raw_readb(&base->uc2); in _lpuart_serial_init()
163 __raw_writeb(ctrl, &base->uc2); in _lpuart_serial_init()
165 __raw_writeb(0, &base->umodem); in _lpuart_serial_init()
166 __raw_writeb(0, &base->uc1); in _lpuart_serial_init()
169 __raw_writeb(0x0, &base->upfifo); in _lpuart_serial_init()
170 __raw_writeb(0x0, &base->utwfifo); in _lpuart_serial_init()
171 __raw_writeb(0x1, &base->urwfifo); in _lpuart_serial_init()
172 __raw_writeb(CFIFO_TXFLUSH | CFIFO_RXFLUSH, &base->ucfifo); in _lpuart_serial_init()
175 _lpuart_serial_setbrg(plat, gd->baudrate); in _lpuart_serial_init()
177 __raw_writeb(UC2_RE | UC2_TE, &base->uc2); in _lpuart_serial_init()
185 struct lpuart_fsl_reg32 *base = plat->reg; in _lpuart32_serial_setbrg_7ulp()
201 tmp_diff = tmp_diff - baudrate; in _lpuart32_serial_setbrg_7ulp()
204 if (tmp_diff > (baudrate - (clk / (tmp_osr * (tmp_sbr + 1))))) { in _lpuart32_serial_setbrg_7ulp()
205 tmp_diff = baudrate - (clk / (tmp_osr * (tmp_sbr + 1))); in _lpuart32_serial_setbrg_7ulp()
218 * if (baudDiff > ((config->baudRate_Bps / 100) * 3)) in _lpuart32_serial_setbrg_7ulp()
224 tmp = in_le32(&base->baud); in _lpuart32_serial_setbrg_7ulp()
230 tmp |= LPUART_BAUD_OSR(osr-1); in _lpuart32_serial_setbrg_7ulp()
238 out_le32(&base->baud, tmp); in _lpuart32_serial_setbrg_7ulp()
244 struct lpuart_fsl_reg32 *base = plat->reg; in _lpuart32_serial_setbrg()
250 /* place adjustment later - n/32 BRFA */ in _lpuart32_serial_setbrg()
251 lpuart_write32(plat->flags, &base->baud, sbr); in _lpuart32_serial_setbrg()
256 struct lpuart_fsl_reg32 *base = plat->reg; in _lpuart32_serial_getc()
259 lpuart_read32(plat->flags, &base->stat, &stat); in _lpuart32_serial_getc()
261 lpuart_write32(plat->flags, &base->stat, STAT_FLAGS); in _lpuart32_serial_getc()
263 lpuart_read32(plat->flags, &base->stat, &stat); in _lpuart32_serial_getc()
266 lpuart_read32(plat->flags, &base->data, &val); in _lpuart32_serial_getc()
268 if (plat->devtype & DEV_MX7ULP) { in _lpuart32_serial_getc()
269 lpuart_read32(plat->flags, &base->stat, &stat); in _lpuart32_serial_getc()
271 lpuart_write32(plat->flags, &base->stat, STAT_OR); in _lpuart32_serial_getc()
280 struct lpuart_fsl_reg32 *base = plat->reg; in _lpuart32_serial_putc()
283 if (plat->devtype & DEV_MX7ULP) { in _lpuart32_serial_putc()
289 lpuart_read32(plat->flags, &base->stat, &stat); in _lpuart32_serial_putc()
297 lpuart_write32(plat->flags, &base->data, c); in _lpuart32_serial_putc()
303 struct lpuart_fsl_reg32 *base = plat->reg; in _lpuart32_serial_tstc()
306 lpuart_read32(plat->flags, &base->water, &water); in _lpuart32_serial_tstc()
320 struct lpuart_fsl_reg32 *base = (struct lpuart_fsl_reg32 *)plat->reg; in _lpuart32_serial_init()
323 lpuart_read32(plat->flags, &base->ctrl, &ctrl); in _lpuart32_serial_init()
326 lpuart_write32(plat->flags, &base->ctrl, ctrl); in _lpuart32_serial_init()
328 lpuart_write32(plat->flags, &base->modir, 0); in _lpuart32_serial_init()
329 lpuart_write32(plat->flags, &base->fifo, ~(FIFO_TXFE | FIFO_RXFE)); in _lpuart32_serial_init()
331 lpuart_write32(plat->flags, &base->match, 0); in _lpuart32_serial_init()
333 if (plat->devtype & DEV_MX7ULP) { in _lpuart32_serial_init()
334 _lpuart32_serial_setbrg_7ulp(plat, gd->baudrate); in _lpuart32_serial_init()
337 _lpuart32_serial_setbrg(plat, gd->baudrate); in _lpuart32_serial_init()
340 lpuart_write32(plat->flags, &base->ctrl, CTRL_RE | CTRL_TE); in _lpuart32_serial_init()
347 struct lpuart_serial_platdata *plat = dev->platdata; in lpuart_serial_setbrg()
350 if (plat->devtype & DEV_MX7ULP) in lpuart_serial_setbrg()
363 struct lpuart_serial_platdata *plat = dev->platdata; in lpuart_serial_getc()
373 struct lpuart_serial_platdata *plat = dev->platdata; in lpuart_serial_putc()
385 struct lpuart_serial_platdata *plat = dev->platdata; in lpuart_serial_pending()
386 struct lpuart_fsl *reg = plat->reg; in lpuart_serial_pending()
387 struct lpuart_fsl_reg32 *reg32 = plat->reg; in lpuart_serial_pending()
394 lpuart_read32(plat->flags, ®32->stat, &stat); in lpuart_serial_pending()
402 return __raw_readb(®->us1) & US1_TDRE ? 0 : 1; in lpuart_serial_pending()
407 struct lpuart_serial_platdata *plat = dev->platdata; in lpuart_serial_probe()
417 struct lpuart_serial_platdata *plat = dev->platdata; in lpuart_serial_ofdata_to_platdata()
418 const void *blob = gd->fdt_blob; in lpuart_serial_ofdata_to_platdata()
424 return -EINVAL; in lpuart_serial_ofdata_to_platdata()
426 plat->reg = (void *)addr; in lpuart_serial_ofdata_to_platdata()
427 plat->flags = dev_get_driver_data(dev); in lpuart_serial_ofdata_to_platdata()
429 if (!fdt_node_check_compatible(blob, node, "fsl,ls1021a-lpuart")) in lpuart_serial_ofdata_to_platdata()
430 plat->devtype = DEV_LS1021A; in lpuart_serial_ofdata_to_platdata()
431 else if (!fdt_node_check_compatible(blob, node, "fsl,imx7ulp-lpuart")) in lpuart_serial_ofdata_to_platdata()
432 plat->devtype = DEV_MX7ULP; in lpuart_serial_ofdata_to_platdata()
433 else if (!fdt_node_check_compatible(blob, node, "fsl,vf610-lpuart")) in lpuart_serial_ofdata_to_platdata()
434 plat->devtype = DEV_VF610; in lpuart_serial_ofdata_to_platdata()
447 { .compatible = "fsl,ls1021a-lpuart", .data =
449 { .compatible = "fsl,imx7ulp-lpuart",
451 { .compatible = "fsl,vf610-lpuart"},