2  * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
4  * SPDX-License-Identifier: GPL-2.0+
80 		diff = abs(baudrate - baud);  in ar933x_serial_get_scale_step()
101 	writel(val, priv->regs + AR933X_UART_CLK_REG);  in ar933x_serial_setbrg()
111 	data = readl(priv->regs + AR933X_UART_DATA_REG);  in ar933x_serial_putc()
113 		return -EAGAIN;  in ar933x_serial_putc()
116 	writel(data, priv->regs + AR933X_UART_DATA_REG);  in ar933x_serial_putc()
126 	data = readl(priv->regs + AR933X_UART_DATA_REG);  in ar933x_serial_getc()
128 		return -EAGAIN;  in ar933x_serial_getc()
130 	writel(AR933X_UART_DATA_RX_CSR, priv->regs + AR933X_UART_DATA_REG);  in ar933x_serial_getc()
139 	data = readl(priv->regs + AR933X_UART_DATA_REG);  in ar933x_serial_pending()
154 		return -EINVAL;  in ar933x_serial_probe()
156 	priv->regs = map_physmem(addr, AR933X_UART_SIZE,  in ar933x_serial_probe()
160 	 * UART controller configuration:  in ar933x_serial_probe()
161 	 * - no DMA  in ar933x_serial_probe()
162 	 * - no interrupt  in ar933x_serial_probe()
163 	 * - DCE mode  in ar933x_serial_probe()
164 	 * - no flow control  in ar933x_serial_probe()
165 	 * - set RX ready oride  in ar933x_serial_probe()
166 	 * - set TX ready oride  in ar933x_serial_probe()
170 	writel(val, priv->regs + AR933X_UART_CS_REG);  in ar933x_serial_probe()
182 	{ .compatible = "qca,ar9330-uart" },
206 	 * UART controller configuration:  in _debug_uart_init()
207 	 * - no DMA  in _debug_uart_init()
208 	 * - no interrupt  in _debug_uart_init()
209 	 * - DCE mode  in _debug_uart_init()
210 	 * - no flow control  in _debug_uart_init()
211 	 * - set RX ready oride  in _debug_uart_init()
212 	 * - set TX ready oride  in _debug_uart_init()