Lines Matching +full:reseed +full:- +full:disable

1 // SPDX-License-Identifier: GPL-2.0
6 #include <clk-uclass.h>
9 #include <asm/arch-rockchip/hardware.h>
97 #define trng_write(pdata, pos, val) writel(val, (pdata)->base + (pos))
98 #define trng_read(pdata, pos) readl((pdata)->base + (pos))
116 if (!pdata->hclk.dev) in rk_rng_do_enable_clk()
119 ret = enable ? clk_enable(&pdata->hclk) : clk_disable(&pdata->hclk); in rk_rng_do_enable_clk()
120 if (ret == -ENOSYS || !ret) in rk_rng_do_enable_clk()
124 enable ? "enable" : "disable", ret); in rk_rng_do_enable_clk()
145 return -EINVAL; in rk_rng_read_regs()
153 size -= tmp_len; in rk_rng_read_regs()
154 count--; in rk_rng_read_regs()
167 return -EINVAL; in cryptov1_rng_read()
171 pdata->base + CRYPTO_V1_TRNG_CTRL); in cryptov1_rng_read()
173 rk_clrsetreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START, in cryptov1_rng_read()
176 retval = readl_poll_timeout(pdata->base + CRYPTO_V1_CTRL, reg, in cryptov1_rng_read()
182 rk_rng_read_regs(pdata->base + CRYPTO_V1_TRNG_DOUT_0, data, len); in cryptov1_rng_read()
186 rk_clrreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START); in cryptov1_rng_read()
198 return -EINVAL; in cryptov2_rng_read()
201 writel(100, pdata->base + CRYPTO_V2_RNG_SAMPLE_CNT); in cryptov2_rng_read()
208 rk_clrsetreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff, reg); in cryptov2_rng_read()
210 retval = readl_poll_timeout(pdata->base + CRYPTO_V2_RNG_CTL, reg, in cryptov2_rng_read()
216 rk_rng_read_regs(pdata->base + CRYPTO_V2_RNG_DOUT_0, data, len); in cryptov2_rng_read()
220 rk_clrreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff); in cryptov2_rng_read()
235 return -EFAULT; in trngv1_init()
239 readl_poll_timeout(pdata->base + TRNG_V1_ISTAT, status, in trngv1_init()
246 /* auto reseed after (auto_reseed_cnt * 16) byte rand generate */ in trngv1_init()
259 return -EINVAL; in trngv1_rng_read()
264 retval = readl_poll_timeout(pdata->base + TRNG_V1_ISTAT, reg, in trngv1_rng_read()
273 rk_rng_read_regs(pdata->base + TRNG_V1_RAND0, data, len); in trngv1_rng_read()
287 rk_clrreg(pdata->base + RKRNG_CTRL, 0xffff); in rkrng_init()
302 return -EINVAL; in rkrng_rng_read()
308 rk_clrsetreg(pdata->base + RKRNG_CTRL, 0xffff, reg); in rkrng_rng_read()
310 retval = readl_poll_timeout(pdata->base + RKRNG_STATE, reg, in rkrng_rng_read()
318 rk_rng_read_regs(pdata->base + RKRNG_DRNG_DATA_0, data, len); in rkrng_rng_read()
322 rk_clrreg(pdata->base + RKRNG_CTRL, 0xffff); in rkrng_rng_read()
333 int ret = -EIO; in rockchip_rng_read()
340 if (!pdata->soc_data || !pdata->soc_data->rk_rng_read) in rockchip_rng_read()
341 return -EINVAL; in rockchip_rng_read()
344 ret = pdata->soc_data->rk_rng_read(dev, buf, RK_HW_RNG_MAX); in rockchip_rng_read()
350 ret = pdata->soc_data->rk_rng_read(dev, buf, in rockchip_rng_read()
363 pdata->base = (fdt_addr_t)dev_read_addr_ptr(dev); in rockchip_rng_ofdata_to_platdata()
364 if (!pdata->base) in rockchip_rng_ofdata_to_platdata()
365 return -ENOMEM; in rockchip_rng_ofdata_to_platdata()
367 clk_get_by_index(dev, 0, &pdata->hclk); in rockchip_rng_ofdata_to_platdata()
377 pdata->soc_data = (struct rk_rng_soc_data *)dev_get_driver_data(dev); in rockchip_rng_probe()
379 if (pdata->soc_data->rk_rng_init) in rockchip_rng_probe()
380 ret = pdata->soc_data->rk_rng_init(dev); in rockchip_rng_probe()
409 .compatible = "rockchip,cryptov1-rng",
413 .compatible = "rockchip,cryptov2-rng",
428 .name = "rockchip-rng",