194 	union MTRANS_CFG_T master_reg;  in nandc_xfer_start()  local
243 		master_reg.d32 =  nandc_readl(NANDC_V9_MTRANS_CFG);  in nandc_xfer_start()
244 		master_reg.V9.incr_num = 16;  in nandc_xfer_start()
245 		master_reg.V9.burst = 7;  in nandc_xfer_start()
246 		master_reg.V9.hsize = 2;  in nandc_xfer_start()
247 		master_reg.V9.bus_mode = 1;  in nandc_xfer_start()
248 		master_reg.V9.ahb_wr = !dir;  in nandc_xfer_start()
249 		master_reg.V9.ahb_wr_st = 1;  in nandc_xfer_start()
250 		master_reg.V9.redundance_size = 0;  in nandc_xfer_start()
252 		nandc_writel(master_reg.d32, NANDC_V9_MTRANS_CFG);  in nandc_xfer_start()
269 		master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);  in nandc_xfer_start()
270 		master_reg.V6.bus_mode = 0;  in nandc_xfer_start()
305 		master_reg.d32 = 0;  in nandc_xfer_start()
306 		master_reg.V6.incr_num = 16;  in nandc_xfer_start()
307 		master_reg.V6.burst = 7;  in nandc_xfer_start()
308 		master_reg.V6.hsize = 2;  in nandc_xfer_start()
309 		master_reg.V6.bus_mode = 1;  in nandc_xfer_start()
310 		master_reg.V6.ahb_wr = !dir;  in nandc_xfer_start()
311 		master_reg.V6.ahb_wr_st = 1;  in nandc_xfer_start()
313 		nandc_writel(master_reg.d32, NANDC_MTRANS_CFG);  in nandc_xfer_start()
327 	union MTRANS_CFG_T master_reg;  in nandc_xfer_done()  local
332 		master_reg.d32 = nandc_readl(NANDC_V9_MTRANS_CFG);  in nandc_xfer_done()
333 		if (master_reg.V9.ahb_wr != 0) {  in nandc_xfer_done()
348 		master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);  in nandc_xfer_done()
349 		if (master_reg.V6.bus_mode != 0) {  in nandc_xfer_done()
352 		if (master_reg.V6.ahb_wr != 0) {  in nandc_xfer_done()